blob: 6ae36a38beb25b8b1f9930f74dcb250173c627e7 [file] [log] [blame]
Florian Fainelli49122142013-01-09 20:56:07 +01001/*
2 * Device Tree file for Marvell Armada 370 Reference Design board
3 * (RD-88F6710-A1)
4 *
5 * Copied from arch/arm/boot/dts/armada-370-db.dts
6 *
7 * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
8 *
Gregory CLEMENT7f2965a2015-01-26 15:15:50 +01009 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
12 * whole.
13 *
14 * a) This file is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of the
17 * License, or (at your option) any later version.
18 *
19 * This file is distributed in the hope that it will be useful
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * Or, alternatively
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
Thomas Petazzoni32c741d2014-09-17 15:45:39 +020046 *
47 * Note: this Device Tree assumes that the bootloader has remapped the
48 * internal registers to 0xf1000000 (instead of the default
49 * 0xd0000000). The 0xf1000000 is the default used by the recent,
50 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
51 * boards were delivered with an older version of the bootloader that
52 * left internal registers mapped at 0xd0000000. If you are in this
53 * situation, you should either update your bootloader (preferred
54 * solution) or the below Device Tree should be adjusted.
Florian Fainelli49122142013-01-09 20:56:07 +010055 */
56
57/dts-v1/;
Thomas Petazzoni5c0169d2014-02-11 18:07:13 +010058#include <dt-bindings/input/input.h>
Thomas Petazzoni29e74f82014-02-11 18:07:12 +010059#include <dt-bindings/gpio/gpio.h>
Ezequiel Garcia38149882013-07-26 10:17:56 -030060#include "armada-370.dtsi"
Florian Fainelli49122142013-01-09 20:56:07 +010061
62/ {
63 model = "Marvell Armada 370 Reference Design";
64 compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
65
66 chosen {
67 bootargs = "console=ttyS0,115200 earlyprintk";
68 };
69
70 memory {
71 device_type = "memory";
72 reg = <0x00000000 0x20000000>; /* 512 MB */
73 };
74
75 soc {
Thomas Petazzoni32c741d2014-09-17 15:45:39 +020076 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
Ezequiel Garcia0cd37542013-07-26 10:17:58 -030077 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
Ezequiel Garcia5e12a612013-07-26 10:17:57 -030078
Ezequiel Garcia0af83302013-08-08 18:03:09 -030079 pcie-controller {
80 status = "okay";
81
82 /* Internal mini-PCIe connector */
83 pcie@1,0 {
84 /* Port 0, Lane 0 */
85 status = "okay";
86 };
87
88 /* Internal mini-PCIe connector */
89 pcie@2,0 {
90 /* Port 1, Lane 0 */
91 status = "okay";
92 };
93 };
94
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020095 internal-regs {
96 serial@12000 {
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020097 status = "okay";
98 };
99 sata@a0000 {
100 nr-ports = <2>;
101 status = "okay";
Florian Fainelli49122142013-01-09 20:56:07 +0100102 };
103
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200104 mdio {
Ezequiel Garcia9dfb5c42014-08-11 09:14:41 -0300105 pinctrl-0 = <&mdio_pins>;
106 pinctrl-names = "default";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200107 phy0: ethernet-phy@0 {
108 reg = <0>;
109 };
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200110 };
111
112 ethernet@70000 {
113 status = "okay";
114 phy = <&phy0>;
115 phy-mode = "sgmii";
116 };
117 ethernet@74000 {
Ezequiel Garcia9dfb5c42014-08-11 09:14:41 -0300118 pinctrl-0 = <&ge1_rgmii_pins>;
119 pinctrl-names = "default";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200120 status = "okay";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200121 phy-mode = "rgmii-id";
Andrew Lunn9ef90cb2014-11-05 20:02:00 +0100122 fixed-link {
123 speed = <1000>;
124 full-duplex;
125 };
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200126 };
127
128 mvsdio@d4000 {
129 pinctrl-0 = <&sdio_pins1>;
130 pinctrl-names = "default";
131 status = "okay";
132 /* No CD or WP GPIOs */
Simon Baatzd87b5fb2013-05-13 23:18:58 +0200133 broken-cd;
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200134 };
135
136 usb@50000 {
137 status = "okay";
138 };
139
140 usb@51000 {
141 status = "okay";
142 };
143
144 gpio-keys {
145 compatible = "gpio-keys";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 button@1 {
149 label = "Software Button";
Thomas Petazzoni5c0169d2014-02-11 18:07:13 +0100150 linux,code = <KEY_POWER>;
Thomas Petazzoni29e74f82014-02-11 18:07:12 +0100151 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200152 };
Florian Fainelli49122142013-01-09 20:56:07 +0100153 };
Ezequiel Garcia69e18e22013-12-11 19:28:39 -0300154
Thomas Petazzonie8db78d2014-09-11 11:56:56 +0200155 gpio-fan {
156 compatible = "gpio-fan";
157 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
158 gpio-fan,speed-map = <0 0 3000 1>;
159 pinctrl-0 = <&fan_pins>;
160 pinctrl-names = "default";
161 };
162
Thomas Petazzoni5b1e9e82014-09-11 11:56:57 +0200163 gpio_leds {
164 compatible = "gpio-leds";
165 pinctrl-names = "default";
166 pinctrl-0 = <&led_pins>;
167
168 sw_led {
169 label = "370rd:green:sw";
170 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
171 default-state = "keep";
172 };
173 };
174
Ezequiel Garcia69e18e22013-12-11 19:28:39 -0300175 nand@d0000 {
176 status = "okay";
177 num-cs = <1>;
178 marvell,nand-keep-config;
179 marvell,nand-enable-arbiter;
180 nand-on-flash-bbt;
181
182 partition@0 {
183 label = "U-Boot";
184 reg = <0 0x800000>;
185 };
186 partition@800000 {
187 label = "Linux";
188 reg = <0x800000 0x800000>;
189 };
190 partition@1000000 {
191 label = "Filesystem";
192 reg = <0x1000000 0x3f000000>;
193 };
194 };
Florian Fainelli49122142013-01-09 20:56:07 +0100195 };
Florian Fainelli49122142013-01-09 20:56:07 +0100196 };
Andrew Lunn9ef90cb2014-11-05 20:02:00 +0100197
198 dsa@0 {
199 compatible = "marvell,dsa";
200 #address-cells = <2>;
201 #size-cells = <0>;
202
203 dsa,ethernet = <&eth1>;
204 dsa,mii-bus = <&mdio>;
205
206 switch@0 {
207 #address-cells = <1>;
208 #size-cells = <0>;
209 reg = <0x10 0>; /* MDIO address 16, switch 0 in tree */
210
211 port@0 {
212 reg = <0>;
213 label = "lan0";
214 };
215
216 port@1 {
217 reg = <1>;
218 label = "lan1";
219 };
220
221 port@2 {
222 reg = <2>;
223 label = "lan2";
224 };
225
226 port@3 {
227 reg = <3>;
228 label = "lan3";
229 };
230
231 port@5 {
232 reg = <5>;
233 label = "cpu";
234 };
235 };
236 };
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200237 };
Arnaud Ebalard4904a822014-11-22 00:45:56 +0100238
239&pinctrl {
240 fan_pins: fan-pins {
241 marvell,pins = "mpp8";
242 marvell,function = "gpio";
243 };
244
245 led_pins: led-pins {
246 marvell,pins = "mpp32";
247 marvell,function = "gpio";
248 };
249};