blob: 85a6fe766b21f2c4981e04203d57f298221f9729 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Paulius Zaleckas28853ac2009-03-25 13:10:01 +02002/*
3 * linux/arch/arm/mm/tlb-fa.S
4 *
5 * Copyright (C) 2005 Faraday Corp.
6 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
7 *
8 * Based on tlb-v4wbi.S:
9 * Copyright (C) 1997-2002 Russell King
10 *
Paulius Zaleckas28853ac2009-03-25 13:10:01 +020011 * ARM architecture version 4, Faraday variation.
12 * This assume an unified TLBs, with a write buffer, and branch target buffer (BTB)
13 *
14 * Processors: FA520 FA526 FA626
15 */
16#include <linux/linkage.h>
17#include <linux/init.h>
Ard Biesheuvel6b0ef272024-04-23 08:25:41 +010018#include <linux/cfi_types.h>
Russell King6ebbf2c2014-06-30 16:29:12 +010019#include <asm/assembler.h>
Paulius Zaleckas28853ac2009-03-25 13:10:01 +020020#include <asm/asm-offsets.h>
21#include <asm/tlbflush.h>
22#include "proc-macros.S"
23
24
25/*
26 * flush_user_tlb_range(start, end, mm)
27 *
28 * Invalidate a range of TLB entries in the specified address space.
29 *
30 * - start - range start address
31 * - end - range end address
32 * - mm - mm_struct describing address space
33 */
34 .align 4
Ard Biesheuvel6b0ef272024-04-23 08:25:41 +010035SYM_TYPED_FUNC_START(fa_flush_user_tlb_range)
Paulius Zaleckas28853ac2009-03-25 13:10:01 +020036 vma_vm_mm ip, r2
37 act_mm r3 @ get current->active_mm
38 eors r3, ip, r3 @ == mm ?
Russell King6ebbf2c2014-06-30 16:29:12 +010039 retne lr @ no, we dont do anything
Paulius Zaleckas28853ac2009-03-25 13:10:01 +020040 mov r3, #0
41 mcr p15, 0, r3, c7, c10, 4 @ drain WB
42 bic r0, r0, #0x0ff
43 bic r0, r0, #0xf00
441: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry
45 add r0, r0, #PAGE_SZ
46 cmp r0, r1
47 blo 1b
Paulius Zaleckas28853ac2009-03-25 13:10:01 +020048 mcr p15, 0, r3, c7, c10, 4 @ data write barrier
Russell King6ebbf2c2014-06-30 16:29:12 +010049 ret lr
Ard Biesheuvel6b0ef272024-04-23 08:25:41 +010050SYM_FUNC_END(fa_flush_user_tlb_range)
Paulius Zaleckas28853ac2009-03-25 13:10:01 +020051
52
Ard Biesheuvel6b0ef272024-04-23 08:25:41 +010053SYM_TYPED_FUNC_START(fa_flush_kern_tlb_range)
Paulius Zaleckas28853ac2009-03-25 13:10:01 +020054 mov r3, #0
55 mcr p15, 0, r3, c7, c10, 4 @ drain WB
56 bic r0, r0, #0x0ff
57 bic r0, r0, #0xf00
581: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry
59 add r0, r0, #PAGE_SZ
60 cmp r0, r1
61 blo 1b
Paulius Zaleckas28853ac2009-03-25 13:10:01 +020062 mcr p15, 0, r3, c7, c10, 4 @ data write barrier
Russell King43488102011-07-05 09:01:13 +010063 mcr p15, 0, r3, c7, c5, 4 @ prefetch flush (isb)
Russell King6ebbf2c2014-06-30 16:29:12 +010064 ret lr
Ard Biesheuvel6b0ef272024-04-23 08:25:41 +010065SYM_FUNC_END(fa_flush_kern_tlb_range)