Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2013 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
Ben Skeggs | a8c4362 | 2015-01-14 14:48:16 +1000 | [diff] [blame] | 24 | #include "nv50.h" |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 25 | |
| 26 | #include <subdev/bios.h> |
| 27 | #include <subdev/bios/bit.h> |
| 28 | #include <subdev/bios/pmu.h> |
Ben Skeggs | b7f44ef | 2022-06-01 20:47:48 +1000 | [diff] [blame] | 29 | #include <subdev/pmu.h> |
Ben Skeggs | 920c58a | 2016-11-08 11:54:24 +1000 | [diff] [blame] | 30 | #include <subdev/timer.h> |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 31 | |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 32 | static void |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 33 | pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 34 | { |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 35 | struct nvkm_device *device = init->base.subdev.device; |
| 36 | struct nvkm_bios *bios = device->bios; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 37 | int i; |
| 38 | |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 39 | nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 40 | for (i = 0; i < len; i += 4) { |
| 41 | if ((i & 0xff) == 0) |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 42 | nvkm_wr32(device, 0x10a188, (pmu + i) >> 8); |
Ben Skeggs | 7f5f518 | 2015-08-20 14:54:13 +1000 | [diff] [blame] | 43 | nvkm_wr32(device, 0x10a184, nvbios_rd32(bios, img + i)); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 44 | } |
| 45 | |
| 46 | while (i & 0xff) { |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 47 | nvkm_wr32(device, 0x10a184, 0x00000000); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 48 | i += 4; |
| 49 | } |
| 50 | } |
| 51 | |
| 52 | static void |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 53 | pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len) |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 54 | { |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 55 | struct nvkm_device *device = init->base.subdev.device; |
| 56 | struct nvkm_bios *bios = device->bios; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 57 | int i; |
| 58 | |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 59 | nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 60 | for (i = 0; i < len; i += 4) |
Ben Skeggs | 7f5f518 | 2015-08-20 14:54:13 +1000 | [diff] [blame] | 61 | nvkm_wr32(device, 0x10a1c4, nvbios_rd32(bios, img + i)); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | static u32 |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 65 | pmu_args(struct nv50_devinit *init, u32 argp, u32 argi) |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 66 | { |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 67 | struct nvkm_device *device = init->base.subdev.device; |
| 68 | nvkm_wr32(device, 0x10a1c0, argp); |
| 69 | nvkm_wr32(device, 0x10a1c0, nvkm_rd32(device, 0x10a1c4) + argi); |
| 70 | return nvkm_rd32(device, 0x10a1c4); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | static void |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 74 | pmu_exec(struct nv50_devinit *init, u32 init_addr) |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 75 | { |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 76 | struct nvkm_device *device = init->base.subdev.device; |
| 77 | nvkm_wr32(device, 0x10a104, init_addr); |
| 78 | nvkm_wr32(device, 0x10a10c, 0x00000000); |
| 79 | nvkm_wr32(device, 0x10a100, 0x00000002); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 80 | } |
| 81 | |
| 82 | static int |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 83 | pmu_load(struct nv50_devinit *init, u8 type, bool post, |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 84 | u32 *init_addr_pmu, u32 *args_addr_pmu) |
| 85 | { |
Ben Skeggs | aa860e4 | 2015-08-20 14:54:12 +1000 | [diff] [blame] | 86 | struct nvkm_subdev *subdev = &init->base.subdev; |
| 87 | struct nvkm_bios *bios = subdev->device->bios; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 88 | struct nvbios_pmuR pmu; |
Ben Skeggs | b7f44ef | 2022-06-01 20:47:48 +1000 | [diff] [blame] | 89 | int ret; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 90 | |
Ben Skeggs | 3483f081 | 2018-09-13 10:56:38 +1000 | [diff] [blame] | 91 | if (!nvbios_pmuRm(bios, type, &pmu)) |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 92 | return -EINVAL; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 93 | |
Ben Skeggs | b7f44ef | 2022-06-01 20:47:48 +1000 | [diff] [blame] | 94 | if (!post || !subdev->device->pmu) |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 95 | return 0; |
| 96 | |
Ben Skeggs | b7f44ef | 2022-06-01 20:47:48 +1000 | [diff] [blame] | 97 | ret = nvkm_falcon_reset(&subdev->device->pmu->falcon); |
| 98 | if (ret) |
| 99 | return ret; |
| 100 | |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 101 | pmu_code(init, pmu.boot_addr_pmu, pmu.boot_addr, pmu.boot_size, false); |
| 102 | pmu_code(init, pmu.code_addr_pmu, pmu.code_addr, pmu.code_size, true); |
| 103 | pmu_data(init, pmu.data_addr_pmu, pmu.data_addr, pmu.data_size); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 104 | |
| 105 | if (init_addr_pmu) { |
| 106 | *init_addr_pmu = pmu.init_addr_pmu; |
| 107 | *args_addr_pmu = pmu.args_addr_pmu; |
| 108 | return 0; |
| 109 | } |
| 110 | |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 111 | return pmu_exec(init, pmu.init_addr_pmu), 0; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 112 | } |
| 113 | |
Ben Skeggs | a31e24a | 2018-12-11 14:50:02 +1000 | [diff] [blame] | 114 | void |
| 115 | gm200_devinit_preos(struct nv50_devinit *init, bool post) |
| 116 | { |
| 117 | /* Optional: Execute PRE_OS application on PMU, which should at |
| 118 | * least take care of fans until a full PMU has been loaded. |
| 119 | */ |
| 120 | pmu_load(init, 0x01, post, NULL, NULL); |
| 121 | } |
| 122 | |
Ben Skeggs | 8769dc98 | 2018-05-08 20:39:47 +1000 | [diff] [blame] | 123 | int |
Ben Skeggs | db1eb52 | 2016-02-11 08:35:32 +1000 | [diff] [blame] | 124 | gm200_devinit_post(struct nvkm_devinit *base, bool post) |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 125 | { |
Ben Skeggs | 151abd4 | 2015-08-20 14:54:20 +1000 | [diff] [blame] | 126 | struct nv50_devinit *init = nv50_devinit(base); |
| 127 | struct nvkm_subdev *subdev = &init->base.subdev; |
Ben Skeggs | aa860e4 | 2015-08-20 14:54:12 +1000 | [diff] [blame] | 128 | struct nvkm_device *device = subdev->device; |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 129 | struct nvkm_bios *bios = device->bios; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 130 | struct bit_entry bit_I; |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 131 | u32 exec, args; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 132 | int ret; |
| 133 | |
| 134 | if (bit_entry(bios, 'I', &bit_I) || bit_I.version != 1 || |
| 135 | bit_I.length < 0x1c) { |
Ben Skeggs | aa860e4 | 2015-08-20 14:54:12 +1000 | [diff] [blame] | 136 | nvkm_error(subdev, "VBIOS PMU init data not found\n"); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 137 | return -EINVAL; |
| 138 | } |
| 139 | |
Ben Skeggs | 3483f081 | 2018-09-13 10:56:38 +1000 | [diff] [blame] | 140 | /* Upload DEVINIT application from VBIOS onto PMU. */ |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 141 | ret = pmu_load(init, 0x04, post, &exec, &args); |
Ben Skeggs | 3483f081 | 2018-09-13 10:56:38 +1000 | [diff] [blame] | 142 | if (ret) { |
| 143 | nvkm_error(subdev, "VBIOS PMU/DEVINIT not found\n"); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 144 | return ret; |
Ben Skeggs | 3483f081 | 2018-09-13 10:56:38 +1000 | [diff] [blame] | 145 | } |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 146 | |
Ben Skeggs | 3483f081 | 2018-09-13 10:56:38 +1000 | [diff] [blame] | 147 | /* Upload tables required by opcodes in boot scripts. */ |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 148 | if (post) { |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 149 | u32 pmu = pmu_args(init, args + 0x08, 0x08); |
Ben Skeggs | 7f5f518 | 2015-08-20 14:54:13 +1000 | [diff] [blame] | 150 | u32 img = nvbios_rd16(bios, bit_I.offset + 0x14); |
| 151 | u32 len = nvbios_rd16(bios, bit_I.offset + 0x16); |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 152 | pmu_data(init, pmu, img, len); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 153 | } |
| 154 | |
Ben Skeggs | 3483f081 | 2018-09-13 10:56:38 +1000 | [diff] [blame] | 155 | /* Upload boot scripts. */ |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 156 | if (post) { |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 157 | u32 pmu = pmu_args(init, args + 0x08, 0x10); |
Ben Skeggs | 7f5f518 | 2015-08-20 14:54:13 +1000 | [diff] [blame] | 158 | u32 img = nvbios_rd16(bios, bit_I.offset + 0x18); |
| 159 | u32 len = nvbios_rd16(bios, bit_I.offset + 0x1a); |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 160 | pmu_data(init, pmu, img, len); |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 161 | } |
| 162 | |
Ben Skeggs | 3483f081 | 2018-09-13 10:56:38 +1000 | [diff] [blame] | 163 | /* Execute DEVINIT. */ |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 164 | if (post) { |
Ben Skeggs | 8ac3f64 | 2015-08-20 14:54:09 +1000 | [diff] [blame] | 165 | nvkm_wr32(device, 0x10a040, 0x00005000); |
Ben Skeggs | 266f8b5 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 166 | pmu_exec(init, exec); |
Ben Skeggs | 920c58a | 2016-11-08 11:54:24 +1000 | [diff] [blame] | 167 | if (nvkm_msec(device, 2000, |
| 168 | if (nvkm_rd32(device, 0x10a040) & 0x00002000) |
| 169 | break; |
| 170 | ) < 0) |
| 171 | return -ETIMEDOUT; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 172 | } |
| 173 | |
Ben Skeggs | a31e24a | 2018-12-11 14:50:02 +1000 | [diff] [blame] | 174 | gm200_devinit_preos(init, post); |
Ben Skeggs | 0a6986c | 2018-09-04 15:56:57 +1000 | [diff] [blame] | 175 | return 0; |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 176 | } |
| 177 | |
Ben Skeggs | 151abd4 | 2015-08-20 14:54:20 +1000 | [diff] [blame] | 178 | static const struct nvkm_devinit_func |
Ben Skeggs | db1eb52 | 2016-02-11 08:35:32 +1000 | [diff] [blame] | 179 | gm200_devinit = { |
Alexandre Courbot | a6a0f67 | 2016-02-11 11:10:04 +0900 | [diff] [blame] | 180 | .preinit = gf100_devinit_preinit, |
Ben Skeggs | 151abd4 | 2015-08-20 14:54:20 +1000 | [diff] [blame] | 181 | .init = nv50_devinit_init, |
Ben Skeggs | db1eb52 | 2016-02-11 08:35:32 +1000 | [diff] [blame] | 182 | .post = gm200_devinit_post, |
Ben Skeggs | a8c4362 | 2015-01-14 14:48:16 +1000 | [diff] [blame] | 183 | .pll_set = gf100_devinit_pll_set, |
Ben Skeggs | ba6e34e | 2014-09-23 15:42:45 +1000 | [diff] [blame] | 184 | .disable = gm107_devinit_disable, |
Ben Skeggs | 151abd4 | 2015-08-20 14:54:20 +1000 | [diff] [blame] | 185 | }; |
| 186 | |
| 187 | int |
Ben Skeggs | 4a34fd0 | 2020-12-04 11:04:41 +1000 | [diff] [blame] | 188 | gm200_devinit_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, |
| 189 | struct nvkm_devinit **pinit) |
Ben Skeggs | 151abd4 | 2015-08-20 14:54:20 +1000 | [diff] [blame] | 190 | { |
Ben Skeggs | 4a34fd0 | 2020-12-04 11:04:41 +1000 | [diff] [blame] | 191 | return nv50_devinit_new_(&gm200_devinit, device, type, inst, pinit); |
Ben Skeggs | 151abd4 | 2015-08-20 14:54:20 +1000 | [diff] [blame] | 192 | } |