R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 1 | Kernel driver sis5595 |
| 2 | ===================== |
| 3 | |
| 4 | Supported chips: |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 5 | |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 6 | * Silicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitor |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 7 | |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 8 | Prefix: 'sis5595' |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 9 | |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 10 | Addresses scanned: ISA in PCI-space encoded address |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 11 | |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 12 | Datasheet: Publicly available at the Silicon Integrated Systems Corp. site. |
| 13 | |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 14 | |
| 15 | |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 16 | Authors: |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 17 | |
| 18 | - Kyösti Mälkki <kmalkki@cc.hut.fi>, |
| 19 | - Mark D. Studebaker <mdsxyz123@yahoo.com>, |
| 20 | - Aurelien Jarno <aurelien@aurel32.net> 2.6 port |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 21 | |
| 22 | SiS southbridge has a LM78-like chip integrated on the same IC. |
| 23 | This driver is a customized copy of lm78.c |
| 24 | |
| 25 | Supports following revisions: |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 26 | |
| 27 | =============== =============== ============== |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 28 | Version PCI ID PCI Revision |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 29 | =============== =============== ============== |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 30 | 1 1039/0008 AF or less |
| 31 | 2 1039/0008 B0 or greater |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 32 | =============== =============== ============== |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 33 | |
| 34 | Note: these chips contain a 0008 device which is incompatible with the |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 35 | 5595. We recognize these by the presence of the listed |
| 36 | "blacklist" PCI ID and refuse to load. |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 37 | |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 38 | =================== =============== ================ |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 39 | NOT SUPPORTED PCI ID BLACKLIST PCI ID |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 40 | =================== =============== ================ |
| 41 | 540 0008 0540 |
| 42 | 550 0008 0550 |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 43 | 5513 0008 5511 |
| 44 | 5581 0008 5597 |
| 45 | 5582 0008 5597 |
| 46 | 5597 0008 5597 |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 47 | 630 0008 0630 |
| 48 | 645 0008 0645 |
| 49 | 730 0008 0730 |
| 50 | 735 0008 0735 |
| 51 | =================== =============== ================ |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 52 | |
| 53 | |
| 54 | Module Parameters |
| 55 | ----------------- |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 56 | |
| 57 | ======================= ===================================================== |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 58 | force_addr=0xaddr Set the I/O base address. Useful for boards |
| 59 | that don't set the address in the BIOS. Does not do a |
| 60 | PCI force; the device must still be present in lspci. |
| 61 | Don't use this unless the driver complains that the |
| 62 | base address is not set. |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 63 | |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 64 | Example: 'modprobe sis5595 force_addr=0x290' |
Mauro Carvalho Chehab | b04f2f7 | 2019-04-17 06:46:28 -0300 | [diff] [blame] | 65 | ======================= ===================================================== |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 66 | |
| 67 | |
| 68 | Description |
| 69 | ----------- |
| 70 | |
| 71 | The SiS5595 southbridge has integrated hardware monitor functions. It also |
| 72 | has an I2C bus, but this driver only supports the hardware monitor. For the |
| 73 | I2C bus driver see i2c-sis5595. |
| 74 | |
| 75 | The SiS5595 implements zero or one temperature sensor, two fan speed |
| 76 | sensors, four or five voltage sensors, and alarms. |
| 77 | |
| 78 | On the first version of the chip, there are four voltage sensors and one |
| 79 | temperature sensor. |
| 80 | |
| 81 | On the second version of the chip, the temperature sensor (temp) and the |
| 82 | fifth voltage sensor (in4) share a pin which is configurable, but not |
| 83 | through the driver. Sorry. The driver senses the configuration of the pin, |
| 84 | which was hopefully set by the BIOS. |
| 85 | |
| 86 | Temperatures are measured in degrees Celsius. An alarm is triggered once |
| 87 | when the max is crossed; it is also triggered when it drops below the min |
| 88 | value. Measurements are guaranteed between -55 and +125 degrees, with a |
| 89 | resolution of 1 degree. |
| 90 | |
| 91 | Fan rotation speeds are reported in RPM (rotations per minute). An alarm is |
| 92 | triggered if the rotation speed has dropped below a programmable limit. Fan |
| 93 | readings can be divided by a programmable divider (1, 2, 4 or 8) to give |
| 94 | the readings more range or accuracy. Not all RPM values can accurately be |
| 95 | represented, so some rounding is done. With a divider of 2, the lowest |
| 96 | representable value is around 2600 RPM. |
| 97 | |
| 98 | Voltage sensors (also known as IN sensors) report their values in volts. An |
| 99 | alarm is triggered if the voltage has crossed a programmable minimum or |
| 100 | maximum limit. Note that minimum in this case always means 'closest to |
| 101 | zero'; this is important for negative voltage measurements. All voltage |
| 102 | inputs can measure voltages between 0 and 4.08 volts, with a resolution of |
| 103 | 0.016 volt. |
| 104 | |
| 105 | In addition to the alarms described above, there is a BTI alarm, which gets |
| 106 | triggered when an external chip has crossed its limits. Usually, this is |
| 107 | connected to some LM75-like chip; if at least one crosses its limits, this |
| 108 | bit gets set. |
| 109 | |
| 110 | If an alarm triggers, it will remain triggered until the hardware register |
| 111 | is read at least once. This means that the cause for the alarm may already |
| 112 | have disappeared! Note that in the current implementation, all hardware |
| 113 | registers are read whenever any data is read (unless it is less than 1.5 |
| 114 | seconds since the last update). This means that you can easily miss |
| 115 | once-only alarms. |
| 116 | |
| 117 | The SiS5595 only updates its values each 1.5 seconds; reading it more often |
| 118 | will do no harm, but will return 'old' values. |
| 119 | |
| 120 | Problems |
| 121 | -------- |
| 122 | Some chips refuse to be enabled. We don't know why. |
| 123 | The driver will recognize this and print a message in dmesg. |