Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Russell King | 4baa992 | 2008-08-02 10:55:55 +0100 | [diff] [blame] | 2 | * arch/arm/include/asm/assembler.h |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 1996-2000 Russell King |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This file contains arm architecture specific defines |
| 11 | * for the different processors. |
| 12 | * |
| 13 | * Do not include any C declarations in this file - it is included by |
| 14 | * assembler source. |
| 15 | */ |
| 16 | #ifndef __ASSEMBLY__ |
| 17 | #error "Only include this from assembly code" |
| 18 | #endif |
| 19 | |
| 20 | #include <asm/ptrace.h> |
Catalin Marinas | 247055a | 2010-09-13 16:03:21 +0100 | [diff] [blame] | 21 | #include <asm/domain.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
| 23 | /* |
| 24 | * Endian independent macros for shifting bytes within registers. |
| 25 | */ |
| 26 | #ifndef __ARMEB__ |
| 27 | #define pull lsr |
| 28 | #define push lsl |
| 29 | #define get_byte_0 lsl #0 |
| 30 | #define get_byte_1 lsr #8 |
| 31 | #define get_byte_2 lsr #16 |
| 32 | #define get_byte_3 lsr #24 |
| 33 | #define put_byte_0 lsl #0 |
| 34 | #define put_byte_1 lsl #8 |
| 35 | #define put_byte_2 lsl #16 |
| 36 | #define put_byte_3 lsl #24 |
| 37 | #else |
| 38 | #define pull lsl |
| 39 | #define push lsr |
| 40 | #define get_byte_0 lsr #24 |
| 41 | #define get_byte_1 lsr #16 |
| 42 | #define get_byte_2 lsr #8 |
| 43 | #define get_byte_3 lsl #0 |
| 44 | #define put_byte_0 lsl #24 |
| 45 | #define put_byte_1 lsl #16 |
| 46 | #define put_byte_2 lsl #8 |
| 47 | #define put_byte_3 lsl #0 |
| 48 | #endif |
| 49 | |
| 50 | /* |
| 51 | * Data preload for architectures that support it |
| 52 | */ |
| 53 | #if __LINUX_ARM_ARCH__ >= 5 |
| 54 | #define PLD(code...) code |
| 55 | #else |
| 56 | #define PLD(code...) |
| 57 | #endif |
| 58 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | /* |
Nicolas Pitre | 2239aff | 2008-03-31 12:38:31 -0400 | [diff] [blame] | 60 | * This can be used to enable code to cacheline align the destination |
| 61 | * pointer when bulk writing to memory. Experiments on StrongARM and |
| 62 | * XScale didn't show this a worthwhile thing to do when the cache is not |
| 63 | * set to write-allocate (this would need further testing on XScale when WA |
| 64 | * is used). |
| 65 | * |
| 66 | * On Feroceon there is much to gain however, regardless of cache mode. |
| 67 | */ |
| 68 | #ifdef CONFIG_CPU_FEROCEON |
| 69 | #define CALGN(code...) code |
| 70 | #else |
| 71 | #define CALGN(code...) |
| 72 | #endif |
| 73 | |
| 74 | /* |
Russell King | 9c42954 | 2006-03-23 16:59:37 +0000 | [diff] [blame] | 75 | * Enable and disable interrupts |
| 76 | */ |
| 77 | #if __LINUX_ARM_ARCH__ >= 6 |
Uwe Kleine-König | 0d928b0 | 2009-08-13 20:38:17 +0200 | [diff] [blame] | 78 | .macro disable_irq_notrace |
Russell King | 9c42954 | 2006-03-23 16:59:37 +0000 | [diff] [blame] | 79 | cpsid i |
| 80 | .endm |
| 81 | |
Uwe Kleine-König | 0d928b0 | 2009-08-13 20:38:17 +0200 | [diff] [blame] | 82 | .macro enable_irq_notrace |
Russell King | 9c42954 | 2006-03-23 16:59:37 +0000 | [diff] [blame] | 83 | cpsie i |
| 84 | .endm |
| 85 | #else |
Uwe Kleine-König | 0d928b0 | 2009-08-13 20:38:17 +0200 | [diff] [blame] | 86 | .macro disable_irq_notrace |
Russell King | 9c42954 | 2006-03-23 16:59:37 +0000 | [diff] [blame] | 87 | msr cpsr_c, #PSR_I_BIT | SVC_MODE |
| 88 | .endm |
| 89 | |
Uwe Kleine-König | 0d928b0 | 2009-08-13 20:38:17 +0200 | [diff] [blame] | 90 | .macro enable_irq_notrace |
Russell King | 9c42954 | 2006-03-23 16:59:37 +0000 | [diff] [blame] | 91 | msr cpsr_c, #SVC_MODE |
| 92 | .endm |
| 93 | #endif |
| 94 | |
Uwe Kleine-König | 0d928b0 | 2009-08-13 20:38:17 +0200 | [diff] [blame] | 95 | .macro asm_trace_hardirqs_off |
| 96 | #if defined(CONFIG_TRACE_IRQFLAGS) |
| 97 | stmdb sp!, {r0-r3, ip, lr} |
| 98 | bl trace_hardirqs_off |
| 99 | ldmia sp!, {r0-r3, ip, lr} |
| 100 | #endif |
| 101 | .endm |
| 102 | |
| 103 | .macro asm_trace_hardirqs_on_cond, cond |
| 104 | #if defined(CONFIG_TRACE_IRQFLAGS) |
| 105 | /* |
| 106 | * actually the registers should be pushed and pop'd conditionally, but |
| 107 | * after bl the flags are certainly clobbered |
| 108 | */ |
| 109 | stmdb sp!, {r0-r3, ip, lr} |
| 110 | bl\cond trace_hardirqs_on |
| 111 | ldmia sp!, {r0-r3, ip, lr} |
| 112 | #endif |
| 113 | .endm |
| 114 | |
| 115 | .macro asm_trace_hardirqs_on |
| 116 | asm_trace_hardirqs_on_cond al |
| 117 | .endm |
| 118 | |
| 119 | .macro disable_irq |
| 120 | disable_irq_notrace |
| 121 | asm_trace_hardirqs_off |
| 122 | .endm |
| 123 | |
| 124 | .macro enable_irq |
| 125 | asm_trace_hardirqs_on |
| 126 | enable_irq_notrace |
| 127 | .endm |
Russell King | 9c42954 | 2006-03-23 16:59:37 +0000 | [diff] [blame] | 128 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | * Save the current IRQ state and disable IRQs. Note that this macro |
| 130 | * assumes FIQs are enabled, and that the processor is in SVC mode. |
| 131 | */ |
Russell King | 59d1ff3 | 2005-11-09 15:04:22 +0000 | [diff] [blame] | 132 | .macro save_and_disable_irqs, oldcpsr |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | mrs \oldcpsr, cpsr |
Russell King | 9c42954 | 2006-03-23 16:59:37 +0000 | [diff] [blame] | 134 | disable_irq |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | .endm |
| 136 | |
| 137 | /* |
| 138 | * Restore interrupt state previously stored in a register. We don't |
| 139 | * guarantee that this will preserve the flags. |
| 140 | */ |
Uwe Kleine-König | 0d928b0 | 2009-08-13 20:38:17 +0200 | [diff] [blame] | 141 | .macro restore_irqs_notrace, oldcpsr |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | msr cpsr_c, \oldcpsr |
| 143 | .endm |
| 144 | |
Uwe Kleine-König | 0d928b0 | 2009-08-13 20:38:17 +0200 | [diff] [blame] | 145 | .macro restore_irqs, oldcpsr |
| 146 | tst \oldcpsr, #PSR_I_BIT |
| 147 | asm_trace_hardirqs_on_cond eq |
| 148 | restore_irqs_notrace \oldcpsr |
| 149 | .endm |
| 150 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | #define USER(x...) \ |
| 152 | 9999: x; \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 153 | .pushsection __ex_table,"a"; \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | .align 3; \ |
| 155 | .long 9999b,9001f; \ |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 156 | .popsection |
Russell King | bac4e96 | 2009-05-25 20:58:00 +0100 | [diff] [blame] | 157 | |
Russell King | f00ec48 | 2010-09-04 10:47:48 +0100 | [diff] [blame] | 158 | #ifdef CONFIG_SMP |
| 159 | #define ALT_SMP(instr...) \ |
| 160 | 9998: instr |
Dave Martin | ed3768a | 2010-12-01 15:39:23 +0100 | [diff] [blame] | 161 | /* |
| 162 | * Note: if you get assembler errors from ALT_UP() when building with |
| 163 | * CONFIG_THUMB2_KERNEL, you almost certainly need to use |
| 164 | * ALT_SMP( W(instr) ... ) |
| 165 | */ |
Russell King | f00ec48 | 2010-09-04 10:47:48 +0100 | [diff] [blame] | 166 | #define ALT_UP(instr...) \ |
| 167 | .pushsection ".alt.smp.init", "a" ;\ |
| 168 | .long 9998b ;\ |
Dave Martin | ed3768a | 2010-12-01 15:39:23 +0100 | [diff] [blame] | 169 | 9997: instr ;\ |
| 170 | .if . - 9997b != 4 ;\ |
| 171 | .error "ALT_UP() content must assemble to exactly 4 bytes";\ |
| 172 | .endif ;\ |
Russell King | f00ec48 | 2010-09-04 10:47:48 +0100 | [diff] [blame] | 173 | .popsection |
| 174 | #define ALT_UP_B(label) \ |
| 175 | .equ up_b_offset, label - 9998b ;\ |
| 176 | .pushsection ".alt.smp.init", "a" ;\ |
| 177 | .long 9998b ;\ |
Dave Martin | ed3768a | 2010-12-01 15:39:23 +0100 | [diff] [blame] | 178 | W(b) . + up_b_offset ;\ |
Russell King | f00ec48 | 2010-09-04 10:47:48 +0100 | [diff] [blame] | 179 | .popsection |
| 180 | #else |
| 181 | #define ALT_SMP(instr...) |
| 182 | #define ALT_UP(instr...) instr |
| 183 | #define ALT_UP_B(label) b label |
| 184 | #endif |
| 185 | |
Russell King | bac4e96 | 2009-05-25 20:58:00 +0100 | [diff] [blame] | 186 | /* |
| 187 | * SMP data memory barrier |
| 188 | */ |
Dave Martin | ed3768a | 2010-12-01 15:39:23 +0100 | [diff] [blame] | 189 | .macro smp_dmb mode |
Russell King | bac4e96 | 2009-05-25 20:58:00 +0100 | [diff] [blame] | 190 | #ifdef CONFIG_SMP |
| 191 | #if __LINUX_ARM_ARCH__ >= 7 |
Dave Martin | ed3768a | 2010-12-01 15:39:23 +0100 | [diff] [blame] | 192 | .ifeqs "\mode","arm" |
Russell King | f00ec48 | 2010-09-04 10:47:48 +0100 | [diff] [blame] | 193 | ALT_SMP(dmb) |
Dave Martin | ed3768a | 2010-12-01 15:39:23 +0100 | [diff] [blame] | 194 | .else |
| 195 | ALT_SMP(W(dmb)) |
| 196 | .endif |
Russell King | bac4e96 | 2009-05-25 20:58:00 +0100 | [diff] [blame] | 197 | #elif __LINUX_ARM_ARCH__ == 6 |
Russell King | f00ec48 | 2010-09-04 10:47:48 +0100 | [diff] [blame] | 198 | ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb |
| 199 | #else |
| 200 | #error Incompatible SMP platform |
Russell King | bac4e96 | 2009-05-25 20:58:00 +0100 | [diff] [blame] | 201 | #endif |
Dave Martin | ed3768a | 2010-12-01 15:39:23 +0100 | [diff] [blame] | 202 | .ifeqs "\mode","arm" |
Russell King | f00ec48 | 2010-09-04 10:47:48 +0100 | [diff] [blame] | 203 | ALT_UP(nop) |
Dave Martin | ed3768a | 2010-12-01 15:39:23 +0100 | [diff] [blame] | 204 | .else |
| 205 | ALT_UP(W(nop)) |
| 206 | .endif |
Russell King | bac4e96 | 2009-05-25 20:58:00 +0100 | [diff] [blame] | 207 | #endif |
| 208 | .endm |
Catalin Marinas | b86040a | 2009-07-24 12:32:54 +0100 | [diff] [blame] | 209 | |
| 210 | #ifdef CONFIG_THUMB2_KERNEL |
| 211 | .macro setmode, mode, reg |
| 212 | mov \reg, #\mode |
| 213 | msr cpsr_c, \reg |
| 214 | .endm |
| 215 | #else |
| 216 | .macro setmode, mode, reg |
| 217 | msr cpsr_c, #\mode |
| 218 | .endm |
| 219 | #endif |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 220 | |
| 221 | /* |
| 222 | * STRT/LDRT access macros with ARM and Thumb-2 variants |
| 223 | */ |
| 224 | #ifdef CONFIG_THUMB2_KERNEL |
| 225 | |
Catalin Marinas | 247055a | 2010-09-13 16:03:21 +0100 | [diff] [blame] | 226 | .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=T() |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 227 | 9999: |
| 228 | .if \inc == 1 |
Catalin Marinas | 247055a | 2010-09-13 16:03:21 +0100 | [diff] [blame] | 229 | \instr\cond\()b\()\t\().w \reg, [\ptr, #\off] |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 230 | .elseif \inc == 4 |
Catalin Marinas | 247055a | 2010-09-13 16:03:21 +0100 | [diff] [blame] | 231 | \instr\cond\()\t\().w \reg, [\ptr, #\off] |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 232 | .else |
| 233 | .error "Unsupported inc macro argument" |
| 234 | .endif |
| 235 | |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 236 | .pushsection __ex_table,"a" |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 237 | .align 3 |
| 238 | .long 9999b, \abort |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 239 | .popsection |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 240 | .endm |
| 241 | |
| 242 | .macro usracc, instr, reg, ptr, inc, cond, rept, abort |
| 243 | @ explicit IT instruction needed because of the label |
| 244 | @ introduced by the USER macro |
| 245 | .ifnc \cond,al |
| 246 | .if \rept == 1 |
| 247 | itt \cond |
| 248 | .elseif \rept == 2 |
| 249 | ittt \cond |
| 250 | .else |
| 251 | .error "Unsupported rept macro argument" |
| 252 | .endif |
| 253 | .endif |
| 254 | |
| 255 | @ Slightly optimised to avoid incrementing the pointer twice |
| 256 | usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort |
| 257 | .if \rept == 2 |
Will Deacon | 1142b71 | 2010-11-19 13:18:31 +0100 | [diff] [blame] | 258 | usraccoff \instr, \reg, \ptr, \inc, \inc, \cond, \abort |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 259 | .endif |
| 260 | |
| 261 | add\cond \ptr, #\rept * \inc |
| 262 | .endm |
| 263 | |
| 264 | #else /* !CONFIG_THUMB2_KERNEL */ |
| 265 | |
Catalin Marinas | 247055a | 2010-09-13 16:03:21 +0100 | [diff] [blame] | 266 | .macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=T() |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 267 | .rept \rept |
| 268 | 9999: |
| 269 | .if \inc == 1 |
Catalin Marinas | 247055a | 2010-09-13 16:03:21 +0100 | [diff] [blame] | 270 | \instr\cond\()b\()\t \reg, [\ptr], #\inc |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 271 | .elseif \inc == 4 |
Catalin Marinas | 247055a | 2010-09-13 16:03:21 +0100 | [diff] [blame] | 272 | \instr\cond\()\t \reg, [\ptr], #\inc |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 273 | .else |
| 274 | .error "Unsupported inc macro argument" |
| 275 | .endif |
| 276 | |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 277 | .pushsection __ex_table,"a" |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 278 | .align 3 |
| 279 | .long 9999b, \abort |
Russell King | 4260415 | 2010-04-19 10:15:03 +0100 | [diff] [blame] | 280 | .popsection |
Catalin Marinas | 8b59278 | 2009-07-24 12:32:57 +0100 | [diff] [blame] | 281 | .endr |
| 282 | .endm |
| 283 | |
| 284 | #endif /* CONFIG_THUMB2_KERNEL */ |
| 285 | |
| 286 | .macro strusr, reg, ptr, inc, cond=al, rept=1, abort=9001f |
| 287 | usracc str, \reg, \ptr, \inc, \cond, \rept, \abort |
| 288 | .endm |
| 289 | |
| 290 | .macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f |
| 291 | usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort |
| 292 | .endm |