Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 2 | /* |
| 3 | * Based on sound/arm/pxa2xx-ac97.c and sound/soc/pxa/pxa2xx-ac97.c |
| 4 | * which contain: |
| 5 | * |
| 6 | * Author: Nicolas Pitre |
| 7 | * Created: Dec 02, 2004 |
| 8 | * Copyright: MontaVista Software Inc. |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/interrupt.h> |
| 14 | #include <linux/clk.h> |
| 15 | #include <linux/delay.h> |
Paul Gortmaker | da155d5 | 2011-07-15 12:38:28 -0400 | [diff] [blame] | 16 | #include <linux/module.h> |
Rob Herring | 23019a7 | 2012-03-20 14:33:19 -0500 | [diff] [blame] | 17 | #include <linux/io.h> |
Mike Dunn | 3b4bc7b | 2013-01-07 13:55:13 -0800 | [diff] [blame] | 18 | #include <linux/gpio.h> |
Robert Jarzmik | a451952 | 2018-06-17 12:50:01 +0200 | [diff] [blame] | 19 | #include <linux/of_gpio.h> |
Arnd Bergmann | 08d3df8 | 2019-09-01 22:26:10 +0200 | [diff] [blame] | 20 | #include <linux/soc/pxa/cpu.h> |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 21 | |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 22 | #include <sound/pxa2xx-lib.h> |
| 23 | |
Arnd Bergmann | 22f0866 | 2019-09-02 00:02:08 +0200 | [diff] [blame] | 24 | #include <linux/platform_data/asoc-pxa.h> |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 25 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 26 | #include "pxa2xx-ac97-regs.h" |
| 27 | |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 28 | static DEFINE_MUTEX(car_mutex); |
| 29 | static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); |
| 30 | static volatile long gsr_bits; |
| 31 | static struct clk *ac97_clk; |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 32 | static struct clk *ac97conf_clk; |
Robert Jarzmik | 26ade89 | 2009-03-15 14:10:54 +0100 | [diff] [blame] | 33 | static int reset_gpio; |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 34 | static void __iomem *ac97_reg_base; |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 35 | |
| 36 | /* |
| 37 | * Beware PXA27x bugs: |
| 38 | * |
| 39 | * o Slot 12 read from modem space will hang controller. |
| 40 | * o CDONE, SDONE interrupt fails after any slot 12 IO. |
| 41 | * |
| 42 | * We therefore have an hybrid approach for waiting on SDONE (interrupt or |
| 43 | * 1 jiffy timeout if interrupt never comes). |
| 44 | */ |
| 45 | |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 46 | int pxa2xx_ac97_read(int slot, unsigned short reg) |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 47 | { |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 48 | int val = -ENODEV; |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 49 | u32 __iomem *reg_addr; |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 50 | |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 51 | if (slot > 0) |
| 52 | return -ENODEV; |
| 53 | |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 54 | mutex_lock(&car_mutex); |
| 55 | |
| 56 | /* set up primary or secondary codec space */ |
Marc Zyngier | 8825e8e | 2008-10-14 09:57:05 +0100 | [diff] [blame] | 57 | if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS) |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 58 | reg_addr = ac97_reg_base + |
| 59 | (slot ? SMC_REG_BASE : PMC_REG_BASE); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 60 | else |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 61 | reg_addr = ac97_reg_base + |
| 62 | (slot ? SAC_REG_BASE : PAC_REG_BASE); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 63 | reg_addr += (reg >> 1); |
| 64 | |
| 65 | /* start read access across the ac97 link */ |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 66 | writel(GSR_CDONE | GSR_SDONE, ac97_reg_base + GSR); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 67 | gsr_bits = 0; |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 68 | val = (readl(reg_addr) & 0xffff); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 69 | if (reg == AC97_GPIO_STATUS) |
| 70 | goto out; |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 71 | if (wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE, 1) <= 0 && |
| 72 | !((readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE)) { |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 73 | printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n", |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 74 | __func__, reg, readl(ac97_reg_base + GSR) | gsr_bits); |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 75 | val = -ETIMEDOUT; |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 76 | goto out; |
| 77 | } |
| 78 | |
| 79 | /* valid data now */ |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 80 | writel(GSR_CDONE | GSR_SDONE, ac97_reg_base + GSR); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 81 | gsr_bits = 0; |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 82 | val = (readl(reg_addr) & 0xffff); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 83 | /* but we've just started another cycle... */ |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 84 | wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE, 1); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 85 | |
| 86 | out: mutex_unlock(&car_mutex); |
| 87 | return val; |
| 88 | } |
| 89 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_read); |
| 90 | |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 91 | int pxa2xx_ac97_write(int slot, unsigned short reg, unsigned short val) |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 92 | { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 93 | u32 __iomem *reg_addr; |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 94 | int ret = 0; |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 95 | |
| 96 | mutex_lock(&car_mutex); |
| 97 | |
| 98 | /* set up primary or secondary codec space */ |
Marc Zyngier | 8825e8e | 2008-10-14 09:57:05 +0100 | [diff] [blame] | 99 | if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS) |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 100 | reg_addr = ac97_reg_base + |
| 101 | (slot ? SMC_REG_BASE : PMC_REG_BASE); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 102 | else |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 103 | reg_addr = ac97_reg_base + |
| 104 | (slot ? SAC_REG_BASE : PAC_REG_BASE); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 105 | reg_addr += (reg >> 1); |
| 106 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 107 | writel(GSR_CDONE | GSR_SDONE, ac97_reg_base + GSR); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 108 | gsr_bits = 0; |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 109 | writel(val, reg_addr); |
| 110 | if (wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_CDONE, 1) <= 0 && |
| 111 | !((readl(ac97_reg_base + GSR) | gsr_bits) & GSR_CDONE)) { |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 112 | printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n", |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 113 | __func__, reg, readl(ac97_reg_base + GSR) | gsr_bits); |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 114 | ret = -EIO; |
| 115 | } |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 116 | |
| 117 | mutex_unlock(&car_mutex); |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 118 | return ret; |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 119 | } |
| 120 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_write); |
| 121 | |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 122 | #ifdef CONFIG_PXA25x |
| 123 | static inline void pxa_ac97_warm_pxa25x(void) |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 124 | { |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 125 | gsr_bits = 0; |
| 126 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 127 | writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 128 | } |
| 129 | |
| 130 | static inline void pxa_ac97_cold_pxa25x(void) |
| 131 | { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 132 | writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */ |
| 133 | writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */ |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 134 | |
| 135 | gsr_bits = 0; |
| 136 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 137 | writel(GCR_COLD_RST, ac97_reg_base + GCR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 138 | } |
| 139 | #endif |
| 140 | |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 141 | #ifdef CONFIG_PXA27x |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 142 | static inline void pxa_ac97_warm_pxa27x(void) |
| 143 | { |
| 144 | gsr_bits = 0; |
| 145 | |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 146 | /* warm reset broken on Bulverde, so manually keep AC97 reset high */ |
Mike Dunn | 053fe0f | 2013-01-07 13:55:14 -0800 | [diff] [blame] | 147 | pxa27x_configure_ac97reset(reset_gpio, true); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 148 | udelay(10); |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 149 | writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); |
Mike Dunn | 053fe0f | 2013-01-07 13:55:14 -0800 | [diff] [blame] | 150 | pxa27x_configure_ac97reset(reset_gpio, false); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 151 | udelay(500); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 152 | } |
| 153 | |
| 154 | static inline void pxa_ac97_cold_pxa27x(void) |
| 155 | { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 156 | writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */ |
| 157 | writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */ |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 158 | |
| 159 | gsr_bits = 0; |
| 160 | |
| 161 | /* PXA27x Developers Manual section 13.5.2.2.1 */ |
Robert Jarzmik | 4091d34 | 2014-06-09 21:59:12 +0200 | [diff] [blame] | 162 | clk_prepare_enable(ac97conf_clk); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 163 | udelay(5); |
Robert Jarzmik | 4091d34 | 2014-06-09 21:59:12 +0200 | [diff] [blame] | 164 | clk_disable_unprepare(ac97conf_clk); |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 165 | writel(GCR_COLD_RST | GCR_WARM_RST, ac97_reg_base + GCR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 166 | } |
| 167 | #endif |
| 168 | |
| 169 | #ifdef CONFIG_PXA3xx |
| 170 | static inline void pxa_ac97_warm_pxa3xx(void) |
| 171 | { |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 172 | gsr_bits = 0; |
| 173 | |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 174 | /* Can't use interrupts */ |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 175 | writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 176 | } |
| 177 | |
| 178 | static inline void pxa_ac97_cold_pxa3xx(void) |
| 179 | { |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 180 | /* Hold CLKBPB for 100us */ |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 181 | writel(0, ac97_reg_base + GCR); |
| 182 | writel(GCR_CLKBPB, ac97_reg_base + GCR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 183 | udelay(100); |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 184 | writel(0, ac97_reg_base + GCR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 185 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 186 | writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything but nCRST */ |
| 187 | writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */ |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 188 | |
| 189 | gsr_bits = 0; |
| 190 | |
| 191 | /* Can't use interrupts on PXA3xx */ |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 192 | writel(readl(ac97_reg_base + GCR) & (~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN)), ac97_reg_base + GCR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 193 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 194 | writel(GCR_WARM_RST | GCR_COLD_RST, ac97_reg_base + GCR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 195 | } |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 196 | #endif |
| 197 | |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 198 | bool pxa2xx_ac97_try_warm_reset(void) |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 199 | { |
Luotao Fu | 057de50 | 2009-03-26 13:18:03 +0100 | [diff] [blame] | 200 | unsigned long gsr; |
Dmitry Eremin-Solenikov | beb02cd | 2013-10-17 14:01:35 +0400 | [diff] [blame] | 201 | unsigned int timeout = 100; |
Luotao Fu | 057de50 | 2009-03-26 13:18:03 +0100 | [diff] [blame] | 202 | |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 203 | #ifdef CONFIG_PXA25x |
Marc Zyngier | 8825e8e | 2008-10-14 09:57:05 +0100 | [diff] [blame] | 204 | if (cpu_is_pxa25x()) |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 205 | pxa_ac97_warm_pxa25x(); |
| 206 | else |
| 207 | #endif |
| 208 | #ifdef CONFIG_PXA27x |
| 209 | if (cpu_is_pxa27x()) |
| 210 | pxa_ac97_warm_pxa27x(); |
| 211 | else |
| 212 | #endif |
| 213 | #ifdef CONFIG_PXA3xx |
| 214 | if (cpu_is_pxa3xx()) |
| 215 | pxa_ac97_warm_pxa3xx(); |
| 216 | else |
| 217 | #endif |
Takashi Iwai | 88ec7ae | 2013-11-05 15:33:40 +0100 | [diff] [blame] | 218 | snd_BUG(); |
Dmitry Eremin-Solenikov | beb02cd | 2013-10-17 14:01:35 +0400 | [diff] [blame] | 219 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 220 | while (!((readl(ac97_reg_base + GSR) | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) |
Dmitry Eremin-Solenikov | beb02cd | 2013-10-17 14:01:35 +0400 | [diff] [blame] | 221 | mdelay(1); |
| 222 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 223 | gsr = readl(ac97_reg_base + GSR) | gsr_bits; |
Luotao Fu | 057de50 | 2009-03-26 13:18:03 +0100 | [diff] [blame] | 224 | if (!(gsr & (GSR_PCR | GSR_SCR))) { |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 225 | printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n", |
Luotao Fu | 057de50 | 2009-03-26 13:18:03 +0100 | [diff] [blame] | 226 | __func__, gsr); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 227 | |
| 228 | return false; |
| 229 | } |
| 230 | |
| 231 | return true; |
| 232 | } |
| 233 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_try_warm_reset); |
| 234 | |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 235 | bool pxa2xx_ac97_try_cold_reset(void) |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 236 | { |
Luotao Fu | 057de50 | 2009-03-26 13:18:03 +0100 | [diff] [blame] | 237 | unsigned long gsr; |
Dmitry Eremin-Solenikov | beb02cd | 2013-10-17 14:01:35 +0400 | [diff] [blame] | 238 | unsigned int timeout = 1000; |
Luotao Fu | 057de50 | 2009-03-26 13:18:03 +0100 | [diff] [blame] | 239 | |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 240 | #ifdef CONFIG_PXA25x |
Marc Zyngier | 8825e8e | 2008-10-14 09:57:05 +0100 | [diff] [blame] | 241 | if (cpu_is_pxa25x()) |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 242 | pxa_ac97_cold_pxa25x(); |
| 243 | else |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 244 | #endif |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 245 | #ifdef CONFIG_PXA27x |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 246 | if (cpu_is_pxa27x()) |
| 247 | pxa_ac97_cold_pxa27x(); |
| 248 | else |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 249 | #endif |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 250 | #ifdef CONFIG_PXA3xx |
| 251 | if (cpu_is_pxa3xx()) |
| 252 | pxa_ac97_cold_pxa3xx(); |
| 253 | else |
| 254 | #endif |
Takashi Iwai | 88ec7ae | 2013-11-05 15:33:40 +0100 | [diff] [blame] | 255 | snd_BUG(); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 256 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 257 | while (!((readl(ac97_reg_base + GSR) | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) |
Dmitry Eremin-Solenikov | beb02cd | 2013-10-17 14:01:35 +0400 | [diff] [blame] | 258 | mdelay(1); |
| 259 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 260 | gsr = readl(ac97_reg_base + GSR) | gsr_bits; |
Luotao Fu | 057de50 | 2009-03-26 13:18:03 +0100 | [diff] [blame] | 261 | if (!(gsr & (GSR_PCR | GSR_SCR))) { |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 262 | printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n", |
Luotao Fu | 057de50 | 2009-03-26 13:18:03 +0100 | [diff] [blame] | 263 | __func__, gsr); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 264 | |
| 265 | return false; |
| 266 | } |
| 267 | |
| 268 | return true; |
| 269 | } |
| 270 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_try_cold_reset); |
| 271 | |
| 272 | |
Robert Jarzmik | 6f8acad | 2017-09-02 21:54:06 +0200 | [diff] [blame] | 273 | void pxa2xx_ac97_finish_reset(void) |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 274 | { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 275 | u32 gcr = readl(ac97_reg_base + GCR); |
| 276 | gcr &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); |
| 277 | gcr |= GCR_SDONE_IE|GCR_CDONE_IE; |
| 278 | writel(gcr, ac97_reg_base + GCR); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 279 | } |
| 280 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_finish_reset); |
| 281 | |
| 282 | static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id) |
| 283 | { |
| 284 | long status; |
| 285 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 286 | status = readl(ac97_reg_base + GSR); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 287 | if (status) { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 288 | writel(status, ac97_reg_base + GSR); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 289 | gsr_bits |= status; |
| 290 | wake_up(&gsr_wq); |
| 291 | |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 292 | /* Although we don't use those we still need to clear them |
| 293 | since they tend to spuriously trigger when MMC is used |
| 294 | (hardware bug? go figure)... */ |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 295 | if (cpu_is_pxa27x()) { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 296 | writel(MISR_EOC, ac97_reg_base + MISR); |
| 297 | writel(PISR_EOC, ac97_reg_base + PISR); |
| 298 | writel(MCSR_EOC, ac97_reg_base + MCSR); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 299 | } |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 300 | |
| 301 | return IRQ_HANDLED; |
| 302 | } |
| 303 | |
| 304 | return IRQ_NONE; |
| 305 | } |
| 306 | |
| 307 | #ifdef CONFIG_PM |
| 308 | int pxa2xx_ac97_hw_suspend(void) |
| 309 | { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 310 | writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR); |
Robert Jarzmik | 4091d34 | 2014-06-09 21:59:12 +0200 | [diff] [blame] | 311 | clk_disable_unprepare(ac97_clk); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 312 | return 0; |
| 313 | } |
| 314 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_suspend); |
| 315 | |
| 316 | int pxa2xx_ac97_hw_resume(void) |
| 317 | { |
Robert Jarzmik | 4091d34 | 2014-06-09 21:59:12 +0200 | [diff] [blame] | 318 | clk_prepare_enable(ac97_clk); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 319 | return 0; |
| 320 | } |
| 321 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume); |
| 322 | #endif |
| 323 | |
Bill Pemberton | e21596b | 2012-12-06 12:35:12 -0500 | [diff] [blame] | 324 | int pxa2xx_ac97_hw_probe(struct platform_device *dev) |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 325 | { |
| 326 | int ret; |
Arnd Bergmann | 2548e6c | 2019-09-10 15:23:52 +0200 | [diff] [blame] | 327 | int irq; |
Mark Brown | eae1775 | 2009-04-13 11:48:03 +0100 | [diff] [blame] | 328 | pxa2xx_audio_ops_t *pdata = dev->dev.platform_data; |
Robert Jarzmik | 26ade89 | 2009-03-15 14:10:54 +0100 | [diff] [blame] | 329 | |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 330 | ac97_reg_base = devm_platform_ioremap_resource(dev, 0); |
| 331 | if (IS_ERR(ac97_reg_base)) { |
| 332 | dev_err(&dev->dev, "Missing MMIO resource\n"); |
| 333 | return PTR_ERR(ac97_reg_base); |
| 334 | } |
| 335 | |
Robert Jarzmik | 26ade89 | 2009-03-15 14:10:54 +0100 | [diff] [blame] | 336 | if (pdata) { |
| 337 | switch (pdata->reset_gpio) { |
| 338 | case 95: |
| 339 | case 113: |
| 340 | reset_gpio = pdata->reset_gpio; |
| 341 | break; |
| 342 | case 0: |
| 343 | reset_gpio = 113; |
| 344 | break; |
| 345 | case -1: |
| 346 | break; |
| 347 | default: |
Takashi Iwai | 1f218695 | 2009-03-19 14:08:58 +0100 | [diff] [blame] | 348 | dev_err(&dev->dev, "Invalid reset GPIO %d\n", |
Robert Jarzmik | 26ade89 | 2009-03-15 14:10:54 +0100 | [diff] [blame] | 349 | pdata->reset_gpio); |
| 350 | } |
Robert Jarzmik | a451952 | 2018-06-17 12:50:01 +0200 | [diff] [blame] | 351 | } else if (!pdata && dev->dev.of_node) { |
| 352 | pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL); |
| 353 | if (!pdata) |
| 354 | return -ENOMEM; |
| 355 | pdata->reset_gpio = of_get_named_gpio(dev->dev.of_node, |
| 356 | "reset-gpios", 0); |
| 357 | if (pdata->reset_gpio == -ENOENT) |
| 358 | pdata->reset_gpio = -1; |
| 359 | else if (pdata->reset_gpio < 0) |
| 360 | return pdata->reset_gpio; |
| 361 | reset_gpio = pdata->reset_gpio; |
Robert Jarzmik | 26ade89 | 2009-03-15 14:10:54 +0100 | [diff] [blame] | 362 | } else { |
| 363 | if (cpu_is_pxa27x()) |
| 364 | reset_gpio = 113; |
| 365 | } |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 366 | |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 367 | if (cpu_is_pxa27x()) { |
Mike Dunn | 3b4bc7b | 2013-01-07 13:55:13 -0800 | [diff] [blame] | 368 | /* |
| 369 | * This gpio is needed for a work-around to a bug in the ac97 |
| 370 | * controller during warm reset. The direction and level is set |
| 371 | * here so that it is an output driven high when switching from |
| 372 | * AC97_nRESET alt function to generic gpio. |
| 373 | */ |
| 374 | ret = gpio_request_one(reset_gpio, GPIOF_OUT_INIT_HIGH, |
| 375 | "pxa27x ac97 reset"); |
| 376 | if (ret < 0) { |
| 377 | pr_err("%s: gpio_request_one() failed: %d\n", |
| 378 | __func__, ret); |
| 379 | goto err_conf; |
| 380 | } |
Mike Dunn | 053fe0f | 2013-01-07 13:55:14 -0800 | [diff] [blame] | 381 | pxa27x_configure_ac97reset(reset_gpio, false); |
Mike Dunn | 3b4bc7b | 2013-01-07 13:55:13 -0800 | [diff] [blame] | 382 | |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 383 | ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); |
| 384 | if (IS_ERR(ac97conf_clk)) { |
| 385 | ret = PTR_ERR(ac97conf_clk); |
| 386 | ac97conf_clk = NULL; |
Dmitry Baryshkov | 7961233 | 2009-01-05 12:58:06 +0300 | [diff] [blame] | 387 | goto err_conf; |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 388 | } |
| 389 | } |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 390 | |
| 391 | ac97_clk = clk_get(&dev->dev, "AC97CLK"); |
| 392 | if (IS_ERR(ac97_clk)) { |
| 393 | ret = PTR_ERR(ac97_clk); |
| 394 | ac97_clk = NULL; |
Dmitry Baryshkov | 7961233 | 2009-01-05 12:58:06 +0300 | [diff] [blame] | 395 | goto err_clk; |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 396 | } |
| 397 | |
Robert Jarzmik | 4091d34 | 2014-06-09 21:59:12 +0200 | [diff] [blame] | 398 | ret = clk_prepare_enable(ac97_clk); |
Dmitry Baryshkov | 7961233 | 2009-01-05 12:58:06 +0300 | [diff] [blame] | 399 | if (ret) |
| 400 | goto err_clk2; |
| 401 | |
Arnd Bergmann | 2548e6c | 2019-09-10 15:23:52 +0200 | [diff] [blame] | 402 | irq = platform_get_irq(dev, 0); |
Yang Yingliang | 46cf195 | 2022-10-29 16:20:01 +0800 | [diff] [blame] | 403 | if (irq < 0) { |
| 404 | ret = irq; |
Arnd Bergmann | 2548e6c | 2019-09-10 15:23:52 +0200 | [diff] [blame] | 405 | goto err_irq; |
Yang Yingliang | 46cf195 | 2022-10-29 16:20:01 +0800 | [diff] [blame] | 406 | } |
Arnd Bergmann | 2548e6c | 2019-09-10 15:23:52 +0200 | [diff] [blame] | 407 | |
| 408 | ret = request_irq(irq, pxa2xx_ac97_irq, 0, "AC97", NULL); |
Dmitry Baryshkov | 7961233 | 2009-01-05 12:58:06 +0300 | [diff] [blame] | 409 | if (ret < 0) |
| 410 | goto err_irq; |
| 411 | |
| 412 | return 0; |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 413 | |
| 414 | err_irq: |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 415 | writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR); |
Dmitry Baryshkov | 7961233 | 2009-01-05 12:58:06 +0300 | [diff] [blame] | 416 | err_clk2: |
| 417 | clk_put(ac97_clk); |
| 418 | ac97_clk = NULL; |
| 419 | err_clk: |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 420 | if (ac97conf_clk) { |
| 421 | clk_put(ac97conf_clk); |
| 422 | ac97conf_clk = NULL; |
| 423 | } |
Dmitry Baryshkov | 7961233 | 2009-01-05 12:58:06 +0300 | [diff] [blame] | 424 | err_conf: |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 425 | return ret; |
| 426 | } |
| 427 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_probe); |
| 428 | |
| 429 | void pxa2xx_ac97_hw_remove(struct platform_device *dev) |
| 430 | { |
Mike Dunn | 3b4bc7b | 2013-01-07 13:55:13 -0800 | [diff] [blame] | 431 | if (cpu_is_pxa27x()) |
| 432 | gpio_free(reset_gpio); |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 433 | writel(readl(ac97_reg_base + GCR) | (GCR_ACLINK_OFF), ac97_reg_base + GCR); |
Arnd Bergmann | 2548e6c | 2019-09-10 15:23:52 +0200 | [diff] [blame] | 434 | free_irq(platform_get_irq(dev, 0), NULL); |
Dmitry Baryshkov | 9d1cf39 | 2008-09-10 05:01:18 +0400 | [diff] [blame] | 435 | if (ac97conf_clk) { |
| 436 | clk_put(ac97conf_clk); |
| 437 | ac97conf_clk = NULL; |
| 438 | } |
Robert Jarzmik | 4091d34 | 2014-06-09 21:59:12 +0200 | [diff] [blame] | 439 | clk_disable_unprepare(ac97_clk); |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 440 | clk_put(ac97_clk); |
| 441 | ac97_clk = NULL; |
| 442 | } |
| 443 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_remove); |
| 444 | |
Arnd Bergmann | e217b08 | 2019-09-18 09:55:23 +0200 | [diff] [blame] | 445 | u32 pxa2xx_ac97_read_modr(void) |
| 446 | { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 447 | if (!ac97_reg_base) |
| 448 | return 0; |
| 449 | |
| 450 | return readl(ac97_reg_base + MODR); |
Arnd Bergmann | e217b08 | 2019-09-18 09:55:23 +0200 | [diff] [blame] | 451 | } |
| 452 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_read_modr); |
| 453 | |
| 454 | u32 pxa2xx_ac97_read_misr(void) |
| 455 | { |
Arnd Bergmann | 8ff0645 | 2019-09-18 10:52:31 +0200 | [diff] [blame] | 456 | if (!ac97_reg_base) |
| 457 | return 0; |
| 458 | |
| 459 | return readl(ac97_reg_base + MISR); |
Arnd Bergmann | e217b08 | 2019-09-18 09:55:23 +0200 | [diff] [blame] | 460 | } |
| 461 | EXPORT_SYMBOL_GPL(pxa2xx_ac97_read_misr); |
| 462 | |
Dmitry Baryshkov | 9c63634 | 2008-09-10 05:01:17 +0400 | [diff] [blame] | 463 | MODULE_AUTHOR("Nicolas Pitre"); |
| 464 | MODULE_DESCRIPTION("Intel/Marvell PXA sound library"); |
| 465 | MODULE_LICENSE("GPL"); |
| 466 | |