Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 2 | /* |
Philipp Zabel | d8dde6c | 2014-06-03 06:35:54 -0300 | [diff] [blame] | 3 | * Driver for MT9V022, MT9V024, MT9V032, and MT9V034 CMOS Image Sensors |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 4 | * |
| 5 | * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| 6 | * |
| 7 | * Based on the MT9M001 driver, |
| 8 | * |
| 9 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 10 | */ |
| 11 | |
Laurent Pinchart | 3300a8f | 2013-07-05 07:16:02 -0300 | [diff] [blame] | 12 | #include <linux/clk.h> |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 13 | #include <linux/delay.h> |
Markus Pargmann | 28d5bdb | 2015-12-14 12:41:51 -0200 | [diff] [blame] | 14 | #include <linux/gpio/consumer.h> |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 15 | #include <linux/i2c.h> |
| 16 | #include <linux/log2.h> |
| 17 | #include <linux/mutex.h> |
Laurent Pinchart | f2272e1 | 2014-01-01 14:40:35 -0300 | [diff] [blame] | 18 | #include <linux/of.h> |
Sakari Ailus | 859969b | 2016-08-26 20:17:25 -0300 | [diff] [blame] | 19 | #include <linux/of_graph.h> |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 20 | #include <linux/regmap.h> |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 21 | #include <linux/slab.h> |
| 22 | #include <linux/videodev2.h> |
| 23 | #include <linux/v4l2-mediabus.h> |
Paul Gortmaker | 7a707b8 | 2011-07-03 14:03:12 -0400 | [diff] [blame] | 24 | #include <linux/module.h> |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 25 | |
Mauro Carvalho Chehab | b5dcee22 | 2015-11-10 12:01:44 -0200 | [diff] [blame] | 26 | #include <media/i2c/mt9v032.h> |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 27 | #include <media/v4l2-ctrls.h> |
| 28 | #include <media/v4l2-device.h> |
Sakari Ailus | 859969b | 2016-08-26 20:17:25 -0300 | [diff] [blame] | 29 | #include <media/v4l2-fwnode.h> |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 30 | #include <media/v4l2-subdev.h> |
| 31 | |
Laurent Pinchart | 2b9e9f7 | 2013-12-02 11:52:44 -0300 | [diff] [blame] | 32 | /* The first four rows are black rows. The active area spans 753x481 pixels. */ |
| 33 | #define MT9V032_PIXEL_ARRAY_HEIGHT 485 |
| 34 | #define MT9V032_PIXEL_ARRAY_WIDTH 753 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 35 | |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 36 | #define MT9V032_SYSCLK_FREQ_DEF 26600000 |
| 37 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 38 | #define MT9V032_CHIP_VERSION 0x00 |
| 39 | #define MT9V032_CHIP_ID_REV1 0x1311 |
| 40 | #define MT9V032_CHIP_ID_REV3 0x1313 |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 41 | #define MT9V034_CHIP_ID_REV1 0X1324 |
Laurent Pinchart | 86cf786 | 2010-11-28 15:07:20 -0300 | [diff] [blame] | 42 | #define MT9V032_COLUMN_START 0x01 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 43 | #define MT9V032_COLUMN_START_MIN 1 |
Laurent Pinchart | 86cf786 | 2010-11-28 15:07:20 -0300 | [diff] [blame] | 44 | #define MT9V032_COLUMN_START_DEF 1 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 45 | #define MT9V032_COLUMN_START_MAX 752 |
Laurent Pinchart | 86cf786 | 2010-11-28 15:07:20 -0300 | [diff] [blame] | 46 | #define MT9V032_ROW_START 0x02 |
| 47 | #define MT9V032_ROW_START_MIN 4 |
| 48 | #define MT9V032_ROW_START_DEF 5 |
| 49 | #define MT9V032_ROW_START_MAX 482 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 50 | #define MT9V032_WINDOW_HEIGHT 0x03 |
| 51 | #define MT9V032_WINDOW_HEIGHT_MIN 1 |
| 52 | #define MT9V032_WINDOW_HEIGHT_DEF 480 |
| 53 | #define MT9V032_WINDOW_HEIGHT_MAX 480 |
| 54 | #define MT9V032_WINDOW_WIDTH 0x04 |
| 55 | #define MT9V032_WINDOW_WIDTH_MIN 1 |
| 56 | #define MT9V032_WINDOW_WIDTH_DEF 752 |
| 57 | #define MT9V032_WINDOW_WIDTH_MAX 752 |
| 58 | #define MT9V032_HORIZONTAL_BLANKING 0x05 |
| 59 | #define MT9V032_HORIZONTAL_BLANKING_MIN 43 |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 60 | #define MT9V034_HORIZONTAL_BLANKING_MIN 61 |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 61 | #define MT9V032_HORIZONTAL_BLANKING_DEF 94 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 62 | #define MT9V032_HORIZONTAL_BLANKING_MAX 1023 |
| 63 | #define MT9V032_VERTICAL_BLANKING 0x06 |
| 64 | #define MT9V032_VERTICAL_BLANKING_MIN 4 |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 65 | #define MT9V034_VERTICAL_BLANKING_MIN 2 |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 66 | #define MT9V032_VERTICAL_BLANKING_DEF 45 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 67 | #define MT9V032_VERTICAL_BLANKING_MAX 3000 |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 68 | #define MT9V034_VERTICAL_BLANKING_MAX 32288 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 69 | #define MT9V032_CHIP_CONTROL 0x07 |
| 70 | #define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3) |
| 71 | #define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7) |
| 72 | #define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8) |
| 73 | #define MT9V032_SHUTTER_WIDTH1 0x08 |
| 74 | #define MT9V032_SHUTTER_WIDTH2 0x09 |
| 75 | #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a |
| 76 | #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b |
| 77 | #define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1 |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 78 | #define MT9V034_TOTAL_SHUTTER_WIDTH_MIN 0 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 79 | #define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480 |
| 80 | #define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767 |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 81 | #define MT9V034_TOTAL_SHUTTER_WIDTH_MAX 32765 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 82 | #define MT9V032_RESET 0x0c |
| 83 | #define MT9V032_READ_MODE 0x0d |
| 84 | #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0) |
| 85 | #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0 |
| 86 | #define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2) |
| 87 | #define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2 |
| 88 | #define MT9V032_READ_MODE_ROW_FLIP (1 << 4) |
| 89 | #define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5) |
| 90 | #define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6) |
| 91 | #define MT9V032_READ_MODE_DARK_ROWS (1 << 7) |
Philipp Zabel | d131e54 | 2014-06-03 06:35:53 -0300 | [diff] [blame] | 92 | #define MT9V032_READ_MODE_RESERVED 0x0300 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 93 | #define MT9V032_PIXEL_OPERATION_MODE 0x0f |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 94 | #define MT9V034_PIXEL_OPERATION_MODE_HDR (1 << 0) |
| 95 | #define MT9V034_PIXEL_OPERATION_MODE_COLOR (1 << 1) |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 96 | #define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2) |
| 97 | #define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6) |
| 98 | #define MT9V032_ANALOG_GAIN 0x35 |
| 99 | #define MT9V032_ANALOG_GAIN_MIN 16 |
| 100 | #define MT9V032_ANALOG_GAIN_DEF 16 |
| 101 | #define MT9V032_ANALOG_GAIN_MAX 64 |
| 102 | #define MT9V032_MAX_ANALOG_GAIN 0x36 |
| 103 | #define MT9V032_MAX_ANALOG_GAIN_MAX 127 |
| 104 | #define MT9V032_FRAME_DARK_AVERAGE 0x42 |
| 105 | #define MT9V032_DARK_AVG_THRESH 0x46 |
| 106 | #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0) |
| 107 | #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0 |
| 108 | #define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8) |
| 109 | #define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8 |
| 110 | #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70 |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 111 | #define MT9V034_ROW_NOISE_CORR_ENABLE (1 << 0) |
| 112 | #define MT9V034_ROW_NOISE_CORR_USE_BLK_AVG (1 << 1) |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 113 | #define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5) |
| 114 | #define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7) |
| 115 | #define MT9V032_PIXEL_CLOCK 0x74 |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 116 | #define MT9V034_PIXEL_CLOCK 0x72 |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 117 | #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0) |
| 118 | #define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1) |
| 119 | #define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2) |
| 120 | #define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3) |
| 121 | #define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4) |
| 122 | #define MT9V032_TEST_PATTERN 0x7f |
| 123 | #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0) |
| 124 | #define MT9V032_TEST_PATTERN_DATA_SHIFT 0 |
| 125 | #define MT9V032_TEST_PATTERN_USE_DATA (1 << 10) |
| 126 | #define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11) |
| 127 | #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11) |
| 128 | #define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11) |
| 129 | #define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11) |
| 130 | #define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11) |
| 131 | #define MT9V032_TEST_PATTERN_ENABLE (1 << 13) |
| 132 | #define MT9V032_TEST_PATTERN_FLIP (1 << 14) |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 133 | #define MT9V032_AEGC_DESIRED_BIN 0xa5 |
| 134 | #define MT9V032_AEC_UPDATE_FREQUENCY 0xa6 |
| 135 | #define MT9V032_AEC_LPF 0xa8 |
| 136 | #define MT9V032_AGC_UPDATE_FREQUENCY 0xa9 |
| 137 | #define MT9V032_AGC_LPF 0xaa |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 138 | #define MT9V032_AEC_AGC_ENABLE 0xaf |
| 139 | #define MT9V032_AEC_ENABLE (1 << 0) |
| 140 | #define MT9V032_AGC_ENABLE (1 << 1) |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 141 | #define MT9V034_AEC_MAX_SHUTTER_WIDTH 0xad |
| 142 | #define MT9V032_AEC_MAX_SHUTTER_WIDTH 0xbd |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 143 | #define MT9V032_THERMAL_INFO 0xc1 |
| 144 | |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 145 | enum mt9v032_model { |
Philipp Zabel | d8dde6c | 2014-06-03 06:35:54 -0300 | [diff] [blame] | 146 | MT9V032_MODEL_V022_COLOR, /* MT9V022IX7ATC */ |
| 147 | MT9V032_MODEL_V022_MONO, /* MT9V022IX7ATM */ |
| 148 | MT9V032_MODEL_V024_COLOR, /* MT9V024IA7XTC */ |
| 149 | MT9V032_MODEL_V024_MONO, /* MT9V024IA7XTM */ |
| 150 | MT9V032_MODEL_V032_COLOR, /* MT9V032C12STM */ |
| 151 | MT9V032_MODEL_V032_MONO, /* MT9V032C12STC */ |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 152 | MT9V032_MODEL_V034_COLOR, |
| 153 | MT9V032_MODEL_V034_MONO, |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 154 | }; |
| 155 | |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 156 | struct mt9v032_model_version { |
| 157 | unsigned int version; |
| 158 | const char *name; |
| 159 | }; |
| 160 | |
| 161 | struct mt9v032_model_data { |
| 162 | unsigned int min_row_time; |
| 163 | unsigned int min_hblank; |
| 164 | unsigned int min_vblank; |
| 165 | unsigned int max_vblank; |
| 166 | unsigned int min_shutter; |
| 167 | unsigned int max_shutter; |
| 168 | unsigned int pclk_reg; |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 169 | unsigned int aec_max_shutter_reg; |
| 170 | const struct v4l2_ctrl_config * const aec_max_shutter_v4l2_ctrl; |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 171 | }; |
| 172 | |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 173 | struct mt9v032_model_info { |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 174 | const struct mt9v032_model_data *data; |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 175 | bool color; |
| 176 | }; |
| 177 | |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 178 | static const struct mt9v032_model_version mt9v032_versions[] = { |
Philipp Zabel | d8dde6c | 2014-06-03 06:35:54 -0300 | [diff] [blame] | 179 | { MT9V032_CHIP_ID_REV1, "MT9V022/MT9V032 rev1/2" }, |
| 180 | { MT9V032_CHIP_ID_REV3, "MT9V022/MT9V032 rev3" }, |
| 181 | { MT9V034_CHIP_ID_REV1, "MT9V024/MT9V034 rev1" }, |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 182 | }; |
| 183 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 184 | struct mt9v032 { |
| 185 | struct v4l2_subdev subdev; |
| 186 | struct media_pad pad; |
| 187 | |
| 188 | struct v4l2_mbus_framefmt format; |
| 189 | struct v4l2_rect crop; |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 190 | unsigned int hratio; |
| 191 | unsigned int vratio; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 192 | |
| 193 | struct v4l2_ctrl_handler ctrls; |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 194 | struct { |
| 195 | struct v4l2_ctrl *link_freq; |
| 196 | struct v4l2_ctrl *pixel_rate; |
| 197 | }; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 198 | |
| 199 | struct mutex power_lock; |
| 200 | int power_count; |
| 201 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 202 | struct regmap *regmap; |
Laurent Pinchart | 3300a8f | 2013-07-05 07:16:02 -0300 | [diff] [blame] | 203 | struct clk *clk; |
Markus Pargmann | 28d5bdb | 2015-12-14 12:41:51 -0200 | [diff] [blame] | 204 | struct gpio_desc *reset_gpio; |
| 205 | struct gpio_desc *standby_gpio; |
Laurent Pinchart | 3300a8f | 2013-07-05 07:16:02 -0300 | [diff] [blame] | 206 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 207 | struct mt9v032_platform_data *pdata; |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 208 | const struct mt9v032_model_info *model; |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 209 | const struct mt9v032_model_version *version; |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 210 | |
| 211 | u32 sysclk; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 212 | u16 aec_agc; |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 213 | u16 hblank; |
Lad, Prabhakar | b28d701 | 2012-09-25 09:35:43 -0300 | [diff] [blame] | 214 | struct { |
| 215 | struct v4l2_ctrl *test_pattern; |
| 216 | struct v4l2_ctrl *test_pattern_color; |
| 217 | }; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 218 | }; |
| 219 | |
| 220 | static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd) |
| 221 | { |
| 222 | return container_of(sd, struct mt9v032, subdev); |
| 223 | } |
| 224 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 225 | static int |
| 226 | mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable) |
| 227 | { |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 228 | struct regmap *map = mt9v032->regmap; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 229 | u16 value = mt9v032->aec_agc; |
| 230 | int ret; |
| 231 | |
| 232 | if (enable) |
| 233 | value |= which; |
| 234 | else |
| 235 | value &= ~which; |
| 236 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 237 | ret = regmap_write(map, MT9V032_AEC_AGC_ENABLE, value); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 238 | if (ret < 0) |
| 239 | return ret; |
| 240 | |
| 241 | mt9v032->aec_agc = value; |
| 242 | return 0; |
| 243 | } |
| 244 | |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 245 | static int |
| 246 | mt9v032_update_hblank(struct mt9v032 *mt9v032) |
| 247 | { |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 248 | struct v4l2_rect *crop = &mt9v032->crop; |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 249 | unsigned int min_hblank = mt9v032->model->data->min_hblank; |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 250 | unsigned int hblank; |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 251 | |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 252 | if (mt9v032->version->version == MT9V034_CHIP_ID_REV1) |
| 253 | min_hblank += (mt9v032->hratio - 1) * 10; |
Philipp Zabel | f17bc3f | 2014-05-26 10:55:51 -0300 | [diff] [blame] | 254 | min_hblank = max_t(int, mt9v032->model->data->min_row_time - crop->width, |
| 255 | min_hblank); |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 256 | hblank = max_t(unsigned int, mt9v032->hblank, min_hblank); |
| 257 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 258 | return regmap_write(mt9v032->regmap, MT9V032_HORIZONTAL_BLANKING, |
| 259 | hblank); |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 260 | } |
| 261 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 262 | static int mt9v032_power_on(struct mt9v032 *mt9v032) |
| 263 | { |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 264 | struct regmap *map = mt9v032->regmap; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 265 | int ret; |
| 266 | |
Laurent Pinchart | 7082903 | 2016-01-26 16:11:51 -0200 | [diff] [blame] | 267 | gpiod_set_value_cansleep(mt9v032->reset_gpio, 1); |
Markus Pargmann | 28d5bdb | 2015-12-14 12:41:51 -0200 | [diff] [blame] | 268 | |
Lad, Prabhakar | 7901919 | 2014-01-17 06:22:47 -0300 | [diff] [blame] | 269 | ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk); |
| 270 | if (ret < 0) |
| 271 | return ret; |
| 272 | |
Markus Pargmann | 28d5bdb | 2015-12-14 12:41:51 -0200 | [diff] [blame] | 273 | /* System clock has to be enabled before releasing the reset */ |
Lad, Prabhakar | 7901919 | 2014-01-17 06:22:47 -0300 | [diff] [blame] | 274 | ret = clk_prepare_enable(mt9v032->clk); |
| 275 | if (ret) |
| 276 | return ret; |
| 277 | |
Laurent Pinchart | 3300a8f | 2013-07-05 07:16:02 -0300 | [diff] [blame] | 278 | udelay(1); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 279 | |
Markus Pargmann | 28d5bdb | 2015-12-14 12:41:51 -0200 | [diff] [blame] | 280 | if (mt9v032->reset_gpio) { |
| 281 | gpiod_set_value_cansleep(mt9v032->reset_gpio, 0); |
| 282 | |
| 283 | /* After releasing reset we need to wait 10 clock cycles |
| 284 | * before accessing the sensor over I2C. As the minimum SYSCLK |
| 285 | * frequency is 13MHz, waiting 1µs will be enough in the worst |
| 286 | * case. |
| 287 | */ |
| 288 | udelay(1); |
| 289 | } |
| 290 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 291 | /* Reset the chip and stop data read out */ |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 292 | ret = regmap_write(map, MT9V032_RESET, 1); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 293 | if (ret < 0) |
Alexey Khoroshilov | 7df66d7 | 2017-11-24 17:04:37 -0500 | [diff] [blame] | 294 | goto err; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 295 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 296 | ret = regmap_write(map, MT9V032_RESET, 0); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 297 | if (ret < 0) |
Alexey Khoroshilov | 7df66d7 | 2017-11-24 17:04:37 -0500 | [diff] [blame] | 298 | goto err; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 299 | |
Alexey Khoroshilov | 7df66d7 | 2017-11-24 17:04:37 -0500 | [diff] [blame] | 300 | ret = regmap_write(map, MT9V032_CHIP_CONTROL, |
| 301 | MT9V032_CHIP_CONTROL_MASTER_MODE); |
| 302 | if (ret < 0) |
| 303 | goto err; |
| 304 | |
| 305 | return 0; |
| 306 | |
| 307 | err: |
| 308 | clk_disable_unprepare(mt9v032->clk); |
| 309 | return ret; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 310 | } |
| 311 | |
| 312 | static void mt9v032_power_off(struct mt9v032 *mt9v032) |
| 313 | { |
Laurent Pinchart | 3300a8f | 2013-07-05 07:16:02 -0300 | [diff] [blame] | 314 | clk_disable_unprepare(mt9v032->clk); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 315 | } |
| 316 | |
| 317 | static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on) |
| 318 | { |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 319 | struct regmap *map = mt9v032->regmap; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 320 | int ret; |
| 321 | |
| 322 | if (!on) { |
| 323 | mt9v032_power_off(mt9v032); |
| 324 | return 0; |
| 325 | } |
| 326 | |
| 327 | ret = mt9v032_power_on(mt9v032); |
| 328 | if (ret < 0) |
| 329 | return ret; |
| 330 | |
| 331 | /* Configure the pixel clock polarity */ |
| 332 | if (mt9v032->pdata && mt9v032->pdata->clk_pol) { |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 333 | ret = regmap_write(map, mt9v032->model->data->pclk_reg, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 334 | MT9V032_PIXEL_CLOCK_INV_PXL_CLK); |
| 335 | if (ret < 0) |
| 336 | return ret; |
| 337 | } |
| 338 | |
| 339 | /* Disable the noise correction algorithm and restore the controls. */ |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 340 | ret = regmap_write(map, MT9V032_ROW_NOISE_CORR_CONTROL, 0); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 341 | if (ret < 0) |
| 342 | return ret; |
| 343 | |
| 344 | return v4l2_ctrl_handler_setup(&mt9v032->ctrls); |
| 345 | } |
| 346 | |
| 347 | /* ----------------------------------------------------------------------------- |
| 348 | * V4L2 subdev video operations |
| 349 | */ |
| 350 | |
| 351 | static struct v4l2_mbus_framefmt * |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 352 | __mt9v032_get_pad_format(struct mt9v032 *mt9v032, |
| 353 | struct v4l2_subdev_state *sd_state, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 354 | unsigned int pad, enum v4l2_subdev_format_whence which) |
| 355 | { |
| 356 | switch (which) { |
| 357 | case V4L2_SUBDEV_FORMAT_TRY: |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 358 | return v4l2_subdev_get_try_format(&mt9v032->subdev, sd_state, |
| 359 | pad); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 360 | case V4L2_SUBDEV_FORMAT_ACTIVE: |
| 361 | return &mt9v032->format; |
| 362 | default: |
| 363 | return NULL; |
| 364 | } |
| 365 | } |
| 366 | |
| 367 | static struct v4l2_rect * |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 368 | __mt9v032_get_pad_crop(struct mt9v032 *mt9v032, |
| 369 | struct v4l2_subdev_state *sd_state, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 370 | unsigned int pad, enum v4l2_subdev_format_whence which) |
| 371 | { |
| 372 | switch (which) { |
| 373 | case V4L2_SUBDEV_FORMAT_TRY: |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 374 | return v4l2_subdev_get_try_crop(&mt9v032->subdev, sd_state, |
| 375 | pad); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 376 | case V4L2_SUBDEV_FORMAT_ACTIVE: |
| 377 | return &mt9v032->crop; |
| 378 | default: |
| 379 | return NULL; |
| 380 | } |
| 381 | } |
| 382 | |
| 383 | static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable) |
| 384 | { |
Markus Pargmann | 78060d5 | 2015-12-14 12:41:52 -0200 | [diff] [blame] | 385 | const u16 mode = MT9V032_CHIP_CONTROL_DOUT_ENABLE |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 386 | | MT9V032_CHIP_CONTROL_SEQUENTIAL; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 387 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 388 | struct v4l2_rect *crop = &mt9v032->crop; |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 389 | struct regmap *map = mt9v032->regmap; |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 390 | unsigned int hbin; |
| 391 | unsigned int vbin; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 392 | int ret; |
| 393 | |
| 394 | if (!enable) |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 395 | return regmap_update_bits(map, MT9V032_CHIP_CONTROL, mode, 0); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 396 | |
| 397 | /* Configure the window size and row/column bin */ |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 398 | hbin = fls(mt9v032->hratio) - 1; |
| 399 | vbin = fls(mt9v032->vratio) - 1; |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 400 | ret = regmap_update_bits(map, MT9V032_READ_MODE, |
| 401 | ~MT9V032_READ_MODE_RESERVED, |
| 402 | hbin << MT9V032_READ_MODE_COLUMN_BIN_SHIFT | |
| 403 | vbin << MT9V032_READ_MODE_ROW_BIN_SHIFT); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 404 | if (ret < 0) |
| 405 | return ret; |
| 406 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 407 | ret = regmap_write(map, MT9V032_COLUMN_START, crop->left); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 408 | if (ret < 0) |
| 409 | return ret; |
| 410 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 411 | ret = regmap_write(map, MT9V032_ROW_START, crop->top); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 412 | if (ret < 0) |
| 413 | return ret; |
| 414 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 415 | ret = regmap_write(map, MT9V032_WINDOW_WIDTH, crop->width); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 416 | if (ret < 0) |
| 417 | return ret; |
| 418 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 419 | ret = regmap_write(map, MT9V032_WINDOW_HEIGHT, crop->height); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 420 | if (ret < 0) |
| 421 | return ret; |
| 422 | |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 423 | ret = mt9v032_update_hblank(mt9v032); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 424 | if (ret < 0) |
| 425 | return ret; |
| 426 | |
| 427 | /* Switch to master "normal" mode */ |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 428 | return regmap_update_bits(map, MT9V032_CHIP_CONTROL, mode, mode); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 429 | } |
| 430 | |
| 431 | static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev, |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 432 | struct v4l2_subdev_state *sd_state, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 433 | struct v4l2_subdev_mbus_code_enum *code) |
| 434 | { |
Eugen Hristev | 1451d5a | 2019-11-21 08:55:24 +0100 | [diff] [blame] | 435 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
| 436 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 437 | if (code->index > 0) |
| 438 | return -EINVAL; |
| 439 | |
Eugen Hristev | 1451d5a | 2019-11-21 08:55:24 +0100 | [diff] [blame] | 440 | code->code = mt9v032->format.code; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 441 | return 0; |
| 442 | } |
| 443 | |
| 444 | static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev, |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 445 | struct v4l2_subdev_state *sd_state, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 446 | struct v4l2_subdev_frame_size_enum *fse) |
| 447 | { |
Eugen Hristev | 1451d5a | 2019-11-21 08:55:24 +0100 | [diff] [blame] | 448 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
| 449 | |
| 450 | if (fse->index >= 3) |
| 451 | return -EINVAL; |
| 452 | if (mt9v032->format.code != fse->code) |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 453 | return -EINVAL; |
| 454 | |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 455 | fse->min_width = MT9V032_WINDOW_WIDTH_DEF / (1 << fse->index); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 456 | fse->max_width = fse->min_width; |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 457 | fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / (1 << fse->index); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 458 | fse->max_height = fse->min_height; |
| 459 | |
| 460 | return 0; |
| 461 | } |
| 462 | |
| 463 | static int mt9v032_get_format(struct v4l2_subdev *subdev, |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 464 | struct v4l2_subdev_state *sd_state, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 465 | struct v4l2_subdev_format *format) |
| 466 | { |
| 467 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
| 468 | |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 469 | format->format = *__mt9v032_get_pad_format(mt9v032, sd_state, |
| 470 | format->pad, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 471 | format->which); |
| 472 | return 0; |
| 473 | } |
| 474 | |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 475 | static void mt9v032_configure_pixel_rate(struct mt9v032 *mt9v032) |
Sakari Ailus | 41a33a0 | 2012-03-15 18:01:39 -0300 | [diff] [blame] | 476 | { |
| 477 | struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev); |
| 478 | int ret; |
| 479 | |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 480 | ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate, |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 481 | mt9v032->sysclk / mt9v032->hratio); |
Sakari Ailus | 41a33a0 | 2012-03-15 18:01:39 -0300 | [diff] [blame] | 482 | if (ret < 0) |
| 483 | dev_warn(&client->dev, "failed to set pixel rate (%d)\n", ret); |
| 484 | } |
| 485 | |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 486 | static unsigned int mt9v032_calc_ratio(unsigned int input, unsigned int output) |
| 487 | { |
| 488 | /* Compute the power-of-two binning factor closest to the input size to |
| 489 | * output size ratio. Given that the output size is bounded by input/4 |
| 490 | * and input, a generic implementation would be an ineffective luxury. |
| 491 | */ |
| 492 | if (output * 3 > input * 2) |
| 493 | return 1; |
| 494 | if (output * 3 > input) |
| 495 | return 2; |
| 496 | return 4; |
| 497 | } |
| 498 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 499 | static int mt9v032_set_format(struct v4l2_subdev *subdev, |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 500 | struct v4l2_subdev_state *sd_state, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 501 | struct v4l2_subdev_format *format) |
| 502 | { |
| 503 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
| 504 | struct v4l2_mbus_framefmt *__format; |
| 505 | struct v4l2_rect *__crop; |
| 506 | unsigned int width; |
| 507 | unsigned int height; |
| 508 | unsigned int hratio; |
| 509 | unsigned int vratio; |
| 510 | |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 511 | __crop = __mt9v032_get_pad_crop(mt9v032, sd_state, format->pad, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 512 | format->which); |
| 513 | |
| 514 | /* Clamp the width and height to avoid dividing by zero. */ |
Ricardo Ribalda | f90580c | 2013-11-26 05:31:42 -0300 | [diff] [blame] | 515 | width = clamp(ALIGN(format->format.width, 2), |
| 516 | max_t(unsigned int, __crop->width / 4, |
| 517 | MT9V032_WINDOW_WIDTH_MIN), |
| 518 | __crop->width); |
| 519 | height = clamp(ALIGN(format->format.height, 2), |
| 520 | max_t(unsigned int, __crop->height / 4, |
| 521 | MT9V032_WINDOW_HEIGHT_MIN), |
| 522 | __crop->height); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 523 | |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 524 | hratio = mt9v032_calc_ratio(__crop->width, width); |
| 525 | vratio = mt9v032_calc_ratio(__crop->height, height); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 526 | |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 527 | __format = __mt9v032_get_pad_format(mt9v032, sd_state, format->pad, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 528 | format->which); |
| 529 | __format->width = __crop->width / hratio; |
| 530 | __format->height = __crop->height / vratio; |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 531 | |
| 532 | if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) { |
| 533 | mt9v032->hratio = hratio; |
| 534 | mt9v032->vratio = vratio; |
| 535 | mt9v032_configure_pixel_rate(mt9v032); |
| 536 | } |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 537 | |
| 538 | format->format = *__format; |
| 539 | |
| 540 | return 0; |
| 541 | } |
| 542 | |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 543 | static int mt9v032_get_selection(struct v4l2_subdev *subdev, |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 544 | struct v4l2_subdev_state *sd_state, |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 545 | struct v4l2_subdev_selection *sel) |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 546 | { |
| 547 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
| 548 | |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 549 | if (sel->target != V4L2_SEL_TGT_CROP) |
| 550 | return -EINVAL; |
| 551 | |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 552 | sel->r = *__mt9v032_get_pad_crop(mt9v032, sd_state, sel->pad, |
| 553 | sel->which); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 554 | return 0; |
| 555 | } |
| 556 | |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 557 | static int mt9v032_set_selection(struct v4l2_subdev *subdev, |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 558 | struct v4l2_subdev_state *sd_state, |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 559 | struct v4l2_subdev_selection *sel) |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 560 | { |
| 561 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
| 562 | struct v4l2_mbus_framefmt *__format; |
| 563 | struct v4l2_rect *__crop; |
| 564 | struct v4l2_rect rect; |
| 565 | |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 566 | if (sel->target != V4L2_SEL_TGT_CROP) |
| 567 | return -EINVAL; |
| 568 | |
Laurent Pinchart | 86cf786 | 2010-11-28 15:07:20 -0300 | [diff] [blame] | 569 | /* Clamp the crop rectangle boundaries and align them to a non multiple |
| 570 | * of 2 pixels to ensure a GRBG Bayer pattern. |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 571 | */ |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 572 | rect.left = clamp(ALIGN(sel->r.left + 1, 2) - 1, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 573 | MT9V032_COLUMN_START_MIN, |
| 574 | MT9V032_COLUMN_START_MAX); |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 575 | rect.top = clamp(ALIGN(sel->r.top + 1, 2) - 1, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 576 | MT9V032_ROW_START_MIN, |
| 577 | MT9V032_ROW_START_MAX); |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 578 | rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2), |
Ricardo Ribalda | f90580c | 2013-11-26 05:31:42 -0300 | [diff] [blame] | 579 | MT9V032_WINDOW_WIDTH_MIN, |
| 580 | MT9V032_WINDOW_WIDTH_MAX); |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 581 | rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2), |
Ricardo Ribalda | f90580c | 2013-11-26 05:31:42 -0300 | [diff] [blame] | 582 | MT9V032_WINDOW_HEIGHT_MIN, |
| 583 | MT9V032_WINDOW_HEIGHT_MAX); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 584 | |
Ricardo Ribalda | f90580c | 2013-11-26 05:31:42 -0300 | [diff] [blame] | 585 | rect.width = min_t(unsigned int, |
| 586 | rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left); |
| 587 | rect.height = min_t(unsigned int, |
| 588 | rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 589 | |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 590 | __crop = __mt9v032_get_pad_crop(mt9v032, sd_state, sel->pad, |
| 591 | sel->which); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 592 | |
| 593 | if (rect.width != __crop->width || rect.height != __crop->height) { |
| 594 | /* Reset the output image size if the crop rectangle size has |
| 595 | * been modified. |
| 596 | */ |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 597 | __format = __mt9v032_get_pad_format(mt9v032, sd_state, |
| 598 | sel->pad, |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 599 | sel->which); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 600 | __format->width = rect.width; |
| 601 | __format->height = rect.height; |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 602 | if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE) { |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 603 | mt9v032->hratio = 1; |
| 604 | mt9v032->vratio = 1; |
| 605 | mt9v032_configure_pixel_rate(mt9v032); |
| 606 | } |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 607 | } |
| 608 | |
| 609 | *__crop = rect; |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 610 | sel->r = rect; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 611 | |
| 612 | return 0; |
| 613 | } |
| 614 | |
| 615 | /* ----------------------------------------------------------------------------- |
| 616 | * V4L2 subdev control operations |
| 617 | */ |
| 618 | |
Lad, Prabhakar | b28d701 | 2012-09-25 09:35:43 -0300 | [diff] [blame] | 619 | #define V4L2_CID_TEST_PATTERN_COLOR (V4L2_CID_USER_BASE | 0x1001) |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 620 | /* |
| 621 | * Value between 1 and 64 to set the desired bin. This is effectively a measure |
| 622 | * of how bright the image is supposed to be. Both AGC and AEC try to reach |
| 623 | * this. |
| 624 | */ |
| 625 | #define V4L2_CID_AEGC_DESIRED_BIN (V4L2_CID_USER_BASE | 0x1002) |
| 626 | /* |
| 627 | * LPF is the low pass filter capability of the chip. Both AEC and AGC have |
| 628 | * this setting. This limits the speed in which AGC/AEC adjust their settings. |
| 629 | * Possible values are 0-2. 0 means no LPF. For 1 and 2 this equation is used: |
| 630 | * |
| 631 | * if |(calculated new exp - current exp)| > (current exp / 4) |
| 632 | * next exp = calculated new exp |
| 633 | * else |
| 634 | * next exp = current exp + ((calculated new exp - current exp) / 2^LPF) |
| 635 | */ |
| 636 | #define V4L2_CID_AEC_LPF (V4L2_CID_USER_BASE | 0x1003) |
| 637 | #define V4L2_CID_AGC_LPF (V4L2_CID_USER_BASE | 0x1004) |
| 638 | /* |
| 639 | * Value between 0 and 15. This is the number of frames being skipped before |
| 640 | * updating the auto exposure/gain. |
| 641 | */ |
| 642 | #define V4L2_CID_AEC_UPDATE_INTERVAL (V4L2_CID_USER_BASE | 0x1005) |
| 643 | #define V4L2_CID_AGC_UPDATE_INTERVAL (V4L2_CID_USER_BASE | 0x1006) |
| 644 | /* |
| 645 | * Maximum shutter width used for AEC. |
| 646 | */ |
| 647 | #define V4L2_CID_AEC_MAX_SHUTTER_WIDTH (V4L2_CID_USER_BASE | 0x1007) |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 648 | |
| 649 | static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl) |
| 650 | { |
| 651 | struct mt9v032 *mt9v032 = |
| 652 | container_of(ctrl->handler, struct mt9v032, ctrls); |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 653 | struct regmap *map = mt9v032->regmap; |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 654 | u32 freq; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 655 | u16 data; |
| 656 | |
| 657 | switch (ctrl->id) { |
| 658 | case V4L2_CID_AUTOGAIN: |
| 659 | return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE, |
| 660 | ctrl->val); |
| 661 | |
| 662 | case V4L2_CID_GAIN: |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 663 | return regmap_write(map, MT9V032_ANALOG_GAIN, ctrl->val); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 664 | |
| 665 | case V4L2_CID_EXPOSURE_AUTO: |
| 666 | return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE, |
Kartik Mohta | 5c37598 | 2012-05-02 19:19:08 -0300 | [diff] [blame] | 667 | !ctrl->val); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 668 | |
| 669 | case V4L2_CID_EXPOSURE: |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 670 | return regmap_write(map, MT9V032_TOTAL_SHUTTER_WIDTH, |
| 671 | ctrl->val); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 672 | |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 673 | case V4L2_CID_HBLANK: |
| 674 | mt9v032->hblank = ctrl->val; |
| 675 | return mt9v032_update_hblank(mt9v032); |
| 676 | |
| 677 | case V4L2_CID_VBLANK: |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 678 | return regmap_write(map, MT9V032_VERTICAL_BLANKING, |
| 679 | ctrl->val); |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 680 | |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 681 | case V4L2_CID_PIXEL_RATE: |
| 682 | case V4L2_CID_LINK_FREQ: |
| 683 | if (mt9v032->link_freq == NULL) |
| 684 | break; |
| 685 | |
| 686 | freq = mt9v032->pdata->link_freqs[mt9v032->link_freq->val]; |
Hans Verkuil | 2a9ec37 | 2014-04-27 03:38:13 -0300 | [diff] [blame] | 687 | *mt9v032->pixel_rate->p_new.p_s64 = freq; |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 688 | mt9v032->sysclk = freq; |
| 689 | break; |
| 690 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 691 | case V4L2_CID_TEST_PATTERN: |
Lad, Prabhakar | b28d701 | 2012-09-25 09:35:43 -0300 | [diff] [blame] | 692 | switch (mt9v032->test_pattern->val) { |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 693 | case 0: |
| 694 | data = 0; |
| 695 | break; |
| 696 | case 1: |
| 697 | data = MT9V032_TEST_PATTERN_GRAY_VERTICAL |
| 698 | | MT9V032_TEST_PATTERN_ENABLE; |
| 699 | break; |
| 700 | case 2: |
| 701 | data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL |
| 702 | | MT9V032_TEST_PATTERN_ENABLE; |
| 703 | break; |
| 704 | case 3: |
| 705 | data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL |
| 706 | | MT9V032_TEST_PATTERN_ENABLE; |
| 707 | break; |
| 708 | default: |
Lad, Prabhakar | b28d701 | 2012-09-25 09:35:43 -0300 | [diff] [blame] | 709 | data = (mt9v032->test_pattern_color->val << |
| 710 | MT9V032_TEST_PATTERN_DATA_SHIFT) |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 711 | | MT9V032_TEST_PATTERN_USE_DATA |
| 712 | | MT9V032_TEST_PATTERN_ENABLE |
| 713 | | MT9V032_TEST_PATTERN_FLIP; |
| 714 | break; |
| 715 | } |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 716 | return regmap_write(map, MT9V032_TEST_PATTERN, data); |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 717 | |
| 718 | case V4L2_CID_AEGC_DESIRED_BIN: |
| 719 | return regmap_write(map, MT9V032_AEGC_DESIRED_BIN, ctrl->val); |
| 720 | |
| 721 | case V4L2_CID_AEC_LPF: |
| 722 | return regmap_write(map, MT9V032_AEC_LPF, ctrl->val); |
| 723 | |
| 724 | case V4L2_CID_AGC_LPF: |
| 725 | return regmap_write(map, MT9V032_AGC_LPF, ctrl->val); |
| 726 | |
| 727 | case V4L2_CID_AEC_UPDATE_INTERVAL: |
| 728 | return regmap_write(map, MT9V032_AEC_UPDATE_FREQUENCY, |
| 729 | ctrl->val); |
| 730 | |
| 731 | case V4L2_CID_AGC_UPDATE_INTERVAL: |
| 732 | return regmap_write(map, MT9V032_AGC_UPDATE_FREQUENCY, |
| 733 | ctrl->val); |
| 734 | |
| 735 | case V4L2_CID_AEC_MAX_SHUTTER_WIDTH: |
| 736 | return regmap_write(map, |
| 737 | mt9v032->model->data->aec_max_shutter_reg, |
| 738 | ctrl->val); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 739 | } |
| 740 | |
| 741 | return 0; |
| 742 | } |
| 743 | |
Julia Lawall | 217bdb0 | 2015-11-13 20:05:17 -0200 | [diff] [blame] | 744 | static const struct v4l2_ctrl_ops mt9v032_ctrl_ops = { |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 745 | .s_ctrl = mt9v032_s_ctrl, |
| 746 | }; |
| 747 | |
Lad, Prabhakar | b28d701 | 2012-09-25 09:35:43 -0300 | [diff] [blame] | 748 | static const char * const mt9v032_test_pattern_menu[] = { |
| 749 | "Disabled", |
| 750 | "Gray Vertical Shade", |
| 751 | "Gray Horizontal Shade", |
| 752 | "Gray Diagonal Shade", |
| 753 | "Plain", |
| 754 | }; |
| 755 | |
| 756 | static const struct v4l2_ctrl_config mt9v032_test_pattern_color = { |
| 757 | .ops = &mt9v032_ctrl_ops, |
| 758 | .id = V4L2_CID_TEST_PATTERN_COLOR, |
| 759 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 760 | .name = "Test Pattern Color", |
| 761 | .min = 0, |
| 762 | .max = 1023, |
| 763 | .step = 1, |
| 764 | .def = 0, |
| 765 | .flags = 0, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 766 | }; |
| 767 | |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 768 | static const struct v4l2_ctrl_config mt9v032_aegc_controls[] = { |
| 769 | { |
| 770 | .ops = &mt9v032_ctrl_ops, |
| 771 | .id = V4L2_CID_AEGC_DESIRED_BIN, |
| 772 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 773 | .name = "AEC/AGC Desired Bin", |
| 774 | .min = 1, |
| 775 | .max = 64, |
| 776 | .step = 1, |
| 777 | .def = 58, |
| 778 | .flags = 0, |
| 779 | }, { |
| 780 | .ops = &mt9v032_ctrl_ops, |
| 781 | .id = V4L2_CID_AEC_LPF, |
| 782 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 783 | .name = "AEC Low Pass Filter", |
| 784 | .min = 0, |
| 785 | .max = 2, |
| 786 | .step = 1, |
| 787 | .def = 0, |
| 788 | .flags = 0, |
| 789 | }, { |
| 790 | .ops = &mt9v032_ctrl_ops, |
| 791 | .id = V4L2_CID_AGC_LPF, |
| 792 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 793 | .name = "AGC Low Pass Filter", |
| 794 | .min = 0, |
| 795 | .max = 2, |
| 796 | .step = 1, |
| 797 | .def = 2, |
| 798 | .flags = 0, |
| 799 | }, { |
| 800 | .ops = &mt9v032_ctrl_ops, |
| 801 | .id = V4L2_CID_AEC_UPDATE_INTERVAL, |
| 802 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 803 | .name = "AEC Update Interval", |
| 804 | .min = 0, |
| 805 | .max = 16, |
| 806 | .step = 1, |
| 807 | .def = 2, |
| 808 | .flags = 0, |
| 809 | }, { |
| 810 | .ops = &mt9v032_ctrl_ops, |
| 811 | .id = V4L2_CID_AGC_UPDATE_INTERVAL, |
| 812 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 813 | .name = "AGC Update Interval", |
| 814 | .min = 0, |
| 815 | .max = 16, |
| 816 | .step = 1, |
| 817 | .def = 2, |
| 818 | .flags = 0, |
| 819 | } |
| 820 | }; |
| 821 | |
| 822 | static const struct v4l2_ctrl_config mt9v032_aec_max_shutter_width = { |
| 823 | .ops = &mt9v032_ctrl_ops, |
| 824 | .id = V4L2_CID_AEC_MAX_SHUTTER_WIDTH, |
| 825 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 826 | .name = "AEC Max Shutter Width", |
| 827 | .min = 1, |
| 828 | .max = 2047, |
| 829 | .step = 1, |
| 830 | .def = 480, |
| 831 | .flags = 0, |
| 832 | }; |
| 833 | |
| 834 | static const struct v4l2_ctrl_config mt9v034_aec_max_shutter_width = { |
| 835 | .ops = &mt9v032_ctrl_ops, |
| 836 | .id = V4L2_CID_AEC_MAX_SHUTTER_WIDTH, |
| 837 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 838 | .name = "AEC Max Shutter Width", |
| 839 | .min = 1, |
| 840 | .max = 32765, |
| 841 | .step = 1, |
| 842 | .def = 480, |
| 843 | .flags = 0, |
| 844 | }; |
| 845 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 846 | /* ----------------------------------------------------------------------------- |
| 847 | * V4L2 subdev core operations |
| 848 | */ |
| 849 | |
| 850 | static int mt9v032_set_power(struct v4l2_subdev *subdev, int on) |
| 851 | { |
| 852 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
| 853 | int ret = 0; |
| 854 | |
| 855 | mutex_lock(&mt9v032->power_lock); |
| 856 | |
| 857 | /* If the power count is modified from 0 to != 0 or from != 0 to 0, |
| 858 | * update the power state. |
| 859 | */ |
| 860 | if (mt9v032->power_count == !on) { |
| 861 | ret = __mt9v032_set_power(mt9v032, !!on); |
| 862 | if (ret < 0) |
| 863 | goto done; |
| 864 | } |
| 865 | |
| 866 | /* Update the power count. */ |
| 867 | mt9v032->power_count += on ? 1 : -1; |
| 868 | WARN_ON(mt9v032->power_count < 0); |
| 869 | |
| 870 | done: |
| 871 | mutex_unlock(&mt9v032->power_lock); |
| 872 | return ret; |
| 873 | } |
| 874 | |
| 875 | /* ----------------------------------------------------------------------------- |
| 876 | * V4L2 subdev internal operations |
| 877 | */ |
| 878 | |
| 879 | static int mt9v032_registered(struct v4l2_subdev *subdev) |
| 880 | { |
| 881 | struct i2c_client *client = v4l2_get_subdevdata(subdev); |
| 882 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 883 | unsigned int i; |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 884 | u32 version; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 885 | int ret; |
| 886 | |
| 887 | dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n", |
| 888 | client->addr); |
| 889 | |
| 890 | ret = mt9v032_power_on(mt9v032); |
| 891 | if (ret < 0) { |
| 892 | dev_err(&client->dev, "MT9V032 power up failed\n"); |
| 893 | return ret; |
| 894 | } |
| 895 | |
| 896 | /* Read and check the sensor version */ |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 897 | ret = regmap_read(mt9v032->regmap, MT9V032_CHIP_VERSION, &version); |
Alexey Khoroshilov | 7df66d7 | 2017-11-24 17:04:37 -0500 | [diff] [blame] | 898 | |
| 899 | mt9v032_power_off(mt9v032); |
| 900 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 901 | if (ret < 0) { |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 902 | dev_err(&client->dev, "Failed reading chip version\n"); |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 903 | return ret; |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 904 | } |
| 905 | |
| 906 | for (i = 0; i < ARRAY_SIZE(mt9v032_versions); ++i) { |
| 907 | if (mt9v032_versions[i].version == version) { |
| 908 | mt9v032->version = &mt9v032_versions[i]; |
| 909 | break; |
| 910 | } |
| 911 | } |
| 912 | |
| 913 | if (mt9v032->version == NULL) { |
| 914 | dev_err(&client->dev, "Unsupported chip version 0x%04x\n", |
| 915 | version); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 916 | return -ENODEV; |
| 917 | } |
| 918 | |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 919 | dev_info(&client->dev, "%s detected at address 0x%02x\n", |
| 920 | mt9v032->version->name, client->addr); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 921 | |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 922 | mt9v032_configure_pixel_rate(mt9v032); |
Sakari Ailus | 41a33a0 | 2012-03-15 18:01:39 -0300 | [diff] [blame] | 923 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 924 | return ret; |
| 925 | } |
| 926 | |
| 927 | static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) |
| 928 | { |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 929 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 930 | struct v4l2_mbus_framefmt *format; |
| 931 | struct v4l2_rect *crop; |
| 932 | |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 933 | crop = v4l2_subdev_get_try_crop(subdev, fh->state, 0); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 934 | crop->left = MT9V032_COLUMN_START_DEF; |
| 935 | crop->top = MT9V032_ROW_START_DEF; |
| 936 | crop->width = MT9V032_WINDOW_WIDTH_DEF; |
| 937 | crop->height = MT9V032_WINDOW_HEIGHT_DEF; |
| 938 | |
Tomi Valkeinen | 0d346d2 | 2021-06-10 17:55:58 +0300 | [diff] [blame] | 939 | format = v4l2_subdev_get_try_format(subdev, fh->state, 0); |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 940 | |
| 941 | if (mt9v032->model->color) |
Boris BREZILLON | f5fe58f | 2014-11-10 14:28:29 -0300 | [diff] [blame] | 942 | format->code = MEDIA_BUS_FMT_SGRBG10_1X10; |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 943 | else |
Boris BREZILLON | f5fe58f | 2014-11-10 14:28:29 -0300 | [diff] [blame] | 944 | format->code = MEDIA_BUS_FMT_Y10_1X10; |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 945 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 946 | format->width = MT9V032_WINDOW_WIDTH_DEF; |
| 947 | format->height = MT9V032_WINDOW_HEIGHT_DEF; |
| 948 | format->field = V4L2_FIELD_NONE; |
| 949 | format->colorspace = V4L2_COLORSPACE_SRGB; |
| 950 | |
| 951 | return mt9v032_set_power(subdev, 1); |
| 952 | } |
| 953 | |
| 954 | static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) |
| 955 | { |
| 956 | return mt9v032_set_power(subdev, 0); |
| 957 | } |
| 958 | |
Bhumika Goyal | 7c137c6 | 2016-12-12 05:45:32 -0200 | [diff] [blame] | 959 | static const struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = { |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 960 | .s_power = mt9v032_set_power, |
| 961 | }; |
| 962 | |
Bhumika Goyal | 7c137c6 | 2016-12-12 05:45:32 -0200 | [diff] [blame] | 963 | static const struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = { |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 964 | .s_stream = mt9v032_s_stream, |
| 965 | }; |
| 966 | |
Bhumika Goyal | 7c137c6 | 2016-12-12 05:45:32 -0200 | [diff] [blame] | 967 | static const struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = { |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 968 | .enum_mbus_code = mt9v032_enum_mbus_code, |
| 969 | .enum_frame_size = mt9v032_enum_frame_size, |
| 970 | .get_fmt = mt9v032_get_format, |
| 971 | .set_fmt = mt9v032_set_format, |
Hans Verkuil | 1a023fe | 2014-12-04 06:54:52 -0300 | [diff] [blame] | 972 | .get_selection = mt9v032_get_selection, |
| 973 | .set_selection = mt9v032_set_selection, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 974 | }; |
| 975 | |
Bhumika Goyal | 7c137c6 | 2016-12-12 05:45:32 -0200 | [diff] [blame] | 976 | static const struct v4l2_subdev_ops mt9v032_subdev_ops = { |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 977 | .core = &mt9v032_subdev_core_ops, |
| 978 | .video = &mt9v032_subdev_video_ops, |
| 979 | .pad = &mt9v032_subdev_pad_ops, |
| 980 | }; |
| 981 | |
| 982 | static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = { |
| 983 | .registered = mt9v032_registered, |
| 984 | .open = mt9v032_open, |
| 985 | .close = mt9v032_close, |
| 986 | }; |
| 987 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 988 | static const struct regmap_config mt9v032_regmap_config = { |
| 989 | .reg_bits = 8, |
| 990 | .val_bits = 16, |
| 991 | .max_register = 0xff, |
| 992 | .cache_type = REGCACHE_RBTREE, |
| 993 | }; |
| 994 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 995 | /* ----------------------------------------------------------------------------- |
| 996 | * Driver initialization and probing |
| 997 | */ |
| 998 | |
Laurent Pinchart | f2272e1 | 2014-01-01 14:40:35 -0300 | [diff] [blame] | 999 | static struct mt9v032_platform_data * |
| 1000 | mt9v032_get_pdata(struct i2c_client *client) |
| 1001 | { |
Hans Verkuil | 8e8a6b2 | 2015-07-28 05:33:55 -0300 | [diff] [blame] | 1002 | struct mt9v032_platform_data *pdata = NULL; |
Sakari Ailus | 60359a2 | 2018-07-31 05:15:50 -0400 | [diff] [blame] | 1003 | struct v4l2_fwnode_endpoint endpoint = { .bus_type = 0 }; |
Laurent Pinchart | f2272e1 | 2014-01-01 14:40:35 -0300 | [diff] [blame] | 1004 | struct device_node *np; |
| 1005 | struct property *prop; |
| 1006 | |
| 1007 | if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node) |
| 1008 | return client->dev.platform_data; |
| 1009 | |
| 1010 | np = of_graph_get_next_endpoint(client->dev.of_node, NULL); |
| 1011 | if (!np) |
| 1012 | return NULL; |
| 1013 | |
Sakari Ailus | 859969b | 2016-08-26 20:17:25 -0300 | [diff] [blame] | 1014 | if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &endpoint) < 0) |
Laurent Pinchart | f2272e1 | 2014-01-01 14:40:35 -0300 | [diff] [blame] | 1015 | goto done; |
| 1016 | |
| 1017 | pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); |
| 1018 | if (!pdata) |
| 1019 | goto done; |
| 1020 | |
| 1021 | prop = of_find_property(np, "link-frequencies", NULL); |
| 1022 | if (prop) { |
| 1023 | u64 *link_freqs; |
| 1024 | size_t size = prop->length / sizeof(*link_freqs); |
| 1025 | |
| 1026 | link_freqs = devm_kcalloc(&client->dev, size, |
| 1027 | sizeof(*link_freqs), GFP_KERNEL); |
| 1028 | if (!link_freqs) |
| 1029 | goto done; |
| 1030 | |
| 1031 | if (of_property_read_u64_array(np, "link-frequencies", |
| 1032 | link_freqs, size) < 0) |
| 1033 | goto done; |
| 1034 | |
| 1035 | pdata->link_freqs = link_freqs; |
| 1036 | pdata->link_def_freq = link_freqs[0]; |
| 1037 | } |
| 1038 | |
| 1039 | pdata->clk_pol = !!(endpoint.bus.parallel.flags & |
| 1040 | V4L2_MBUS_PCLK_SAMPLE_RISING); |
| 1041 | |
| 1042 | done: |
| 1043 | of_node_put(np); |
| 1044 | return pdata; |
| 1045 | } |
| 1046 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1047 | static int mt9v032_probe(struct i2c_client *client, |
| 1048 | const struct i2c_device_id *did) |
| 1049 | { |
Laurent Pinchart | f2272e1 | 2014-01-01 14:40:35 -0300 | [diff] [blame] | 1050 | struct mt9v032_platform_data *pdata = mt9v032_get_pdata(client); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1051 | struct mt9v032 *mt9v032; |
| 1052 | unsigned int i; |
| 1053 | int ret; |
| 1054 | |
Laurent Pinchart | c02b211 | 2013-05-02 08:29:43 -0300 | [diff] [blame] | 1055 | mt9v032 = devm_kzalloc(&client->dev, sizeof(*mt9v032), GFP_KERNEL); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1056 | if (!mt9v032) |
| 1057 | return -ENOMEM; |
| 1058 | |
Philipp Zabel | 80b44ef | 2014-06-04 13:57:03 -0300 | [diff] [blame] | 1059 | mt9v032->regmap = devm_regmap_init_i2c(client, &mt9v032_regmap_config); |
| 1060 | if (IS_ERR(mt9v032->regmap)) |
| 1061 | return PTR_ERR(mt9v032->regmap); |
| 1062 | |
Laurent Pinchart | 3300a8f | 2013-07-05 07:16:02 -0300 | [diff] [blame] | 1063 | mt9v032->clk = devm_clk_get(&client->dev, NULL); |
| 1064 | if (IS_ERR(mt9v032->clk)) |
| 1065 | return PTR_ERR(mt9v032->clk); |
| 1066 | |
Markus Pargmann | 28d5bdb | 2015-12-14 12:41:51 -0200 | [diff] [blame] | 1067 | mt9v032->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", |
| 1068 | GPIOD_OUT_HIGH); |
| 1069 | if (IS_ERR(mt9v032->reset_gpio)) |
| 1070 | return PTR_ERR(mt9v032->reset_gpio); |
| 1071 | |
| 1072 | mt9v032->standby_gpio = devm_gpiod_get_optional(&client->dev, "standby", |
| 1073 | GPIOD_OUT_LOW); |
| 1074 | if (IS_ERR(mt9v032->standby_gpio)) |
| 1075 | return PTR_ERR(mt9v032->standby_gpio); |
| 1076 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1077 | mutex_init(&mt9v032->power_lock); |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 1078 | mt9v032->pdata = pdata; |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 1079 | mt9v032->model = (const void *)did->driver_data; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1080 | |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 1081 | v4l2_ctrl_handler_init(&mt9v032->ctrls, 11 + |
| 1082 | ARRAY_SIZE(mt9v032_aegc_controls)); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1083 | |
| 1084 | v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, |
| 1085 | V4L2_CID_AUTOGAIN, 0, 1, 1, 1); |
| 1086 | v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, |
| 1087 | V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN, |
| 1088 | MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF); |
| 1089 | v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops, |
| 1090 | V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0, |
| 1091 | V4L2_EXPOSURE_AUTO); |
| 1092 | v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 1093 | V4L2_CID_EXPOSURE, mt9v032->model->data->min_shutter, |
| 1094 | mt9v032->model->data->max_shutter, 1, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1095 | MT9V032_TOTAL_SHUTTER_WIDTH_DEF); |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 1096 | v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 1097 | V4L2_CID_HBLANK, mt9v032->model->data->min_hblank, |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 1098 | MT9V032_HORIZONTAL_BLANKING_MAX, 1, |
| 1099 | MT9V032_HORIZONTAL_BLANKING_DEF); |
| 1100 | v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, |
Laurent Pinchart | 0a466b6 | 2013-12-02 11:59:52 -0300 | [diff] [blame] | 1101 | V4L2_CID_VBLANK, mt9v032->model->data->min_vblank, |
| 1102 | mt9v032->model->data->max_vblank, 1, |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 1103 | MT9V032_VERTICAL_BLANKING_DEF); |
Lad, Prabhakar | b28d701 | 2012-09-25 09:35:43 -0300 | [diff] [blame] | 1104 | mt9v032->test_pattern = v4l2_ctrl_new_std_menu_items(&mt9v032->ctrls, |
| 1105 | &mt9v032_ctrl_ops, V4L2_CID_TEST_PATTERN, |
| 1106 | ARRAY_SIZE(mt9v032_test_pattern_menu) - 1, 0, 0, |
| 1107 | mt9v032_test_pattern_menu); |
| 1108 | mt9v032->test_pattern_color = v4l2_ctrl_new_custom(&mt9v032->ctrls, |
| 1109 | &mt9v032_test_pattern_color, NULL); |
| 1110 | |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 1111 | v4l2_ctrl_new_custom(&mt9v032->ctrls, |
| 1112 | mt9v032->model->data->aec_max_shutter_v4l2_ctrl, |
| 1113 | NULL); |
| 1114 | for (i = 0; i < ARRAY_SIZE(mt9v032_aegc_controls); ++i) |
| 1115 | v4l2_ctrl_new_custom(&mt9v032->ctrls, &mt9v032_aegc_controls[i], |
| 1116 | NULL); |
| 1117 | |
Lad, Prabhakar | b28d701 | 2012-09-25 09:35:43 -0300 | [diff] [blame] | 1118 | v4l2_ctrl_cluster(2, &mt9v032->test_pattern); |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 1119 | |
Sakari Ailus | 41a33a0 | 2012-03-15 18:01:39 -0300 | [diff] [blame] | 1120 | mt9v032->pixel_rate = |
| 1121 | v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops, |
Hans Verkuil | 0ba2aeb | 2014-04-16 09:41:25 -0300 | [diff] [blame] | 1122 | V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1, 1); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1123 | |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 1124 | if (pdata && pdata->link_freqs) { |
| 1125 | unsigned int def = 0; |
| 1126 | |
| 1127 | for (i = 0; pdata->link_freqs[i]; ++i) { |
| 1128 | if (pdata->link_freqs[i] == pdata->link_def_freq) |
| 1129 | def = i; |
| 1130 | } |
| 1131 | |
| 1132 | mt9v032->link_freq = |
| 1133 | v4l2_ctrl_new_int_menu(&mt9v032->ctrls, |
| 1134 | &mt9v032_ctrl_ops, |
| 1135 | V4L2_CID_LINK_FREQ, i - 1, def, |
| 1136 | pdata->link_freqs); |
| 1137 | v4l2_ctrl_cluster(2, &mt9v032->link_freq); |
| 1138 | } |
| 1139 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1140 | |
| 1141 | mt9v032->subdev.ctrl_handler = &mt9v032->ctrls; |
| 1142 | |
Laurent Pinchart | 2d01209 | 2014-01-01 14:40:35 -0300 | [diff] [blame] | 1143 | if (mt9v032->ctrls.error) { |
| 1144 | dev_err(&client->dev, "control initialization error %d\n", |
| 1145 | mt9v032->ctrls.error); |
| 1146 | ret = mt9v032->ctrls.error; |
| 1147 | goto err; |
| 1148 | } |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1149 | |
| 1150 | mt9v032->crop.left = MT9V032_COLUMN_START_DEF; |
| 1151 | mt9v032->crop.top = MT9V032_ROW_START_DEF; |
| 1152 | mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF; |
| 1153 | mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF; |
| 1154 | |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 1155 | if (mt9v032->model->color) |
Boris BREZILLON | f5fe58f | 2014-11-10 14:28:29 -0300 | [diff] [blame] | 1156 | mt9v032->format.code = MEDIA_BUS_FMT_SGRBG10_1X10; |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 1157 | else |
Boris BREZILLON | f5fe58f | 2014-11-10 14:28:29 -0300 | [diff] [blame] | 1158 | mt9v032->format.code = MEDIA_BUS_FMT_Y10_1X10; |
Laurent Pinchart | 220ddc7 | 2013-12-04 15:31:13 -0300 | [diff] [blame] | 1159 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1160 | mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF; |
| 1161 | mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF; |
| 1162 | mt9v032->format.field = V4L2_FIELD_NONE; |
| 1163 | mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB; |
| 1164 | |
Laurent Pinchart | 637f005 | 2013-12-02 16:39:18 -0300 | [diff] [blame] | 1165 | mt9v032->hratio = 1; |
| 1166 | mt9v032->vratio = 1; |
| 1167 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1168 | mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE; |
Laurent Pinchart | 9ec670e | 2012-07-23 15:03:34 -0300 | [diff] [blame] | 1169 | mt9v032->hblank = MT9V032_HORIZONTAL_BLANKING_DEF; |
Laurent Pinchart | e9a50e4 | 2012-07-26 08:02:50 -0300 | [diff] [blame] | 1170 | mt9v032->sysclk = MT9V032_SYSCLK_FREQ_DEF; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1171 | |
| 1172 | v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops); |
| 1173 | mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops; |
| 1174 | mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; |
| 1175 | |
Hans Verkuil | 173bf6e | 2018-06-18 05:10:28 -0400 | [diff] [blame] | 1176 | mt9v032->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1177 | mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE; |
Mauro Carvalho Chehab | ab22e77 | 2015-12-11 07:44:40 -0200 | [diff] [blame] | 1178 | ret = media_entity_pads_init(&mt9v032->subdev.entity, 1, &mt9v032->pad); |
Laurent Pinchart | c02b211 | 2013-05-02 08:29:43 -0300 | [diff] [blame] | 1179 | if (ret < 0) |
Philipp Zabel | 94b76ce | 2014-06-04 13:57:02 -0300 | [diff] [blame] | 1180 | goto err; |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1181 | |
Philipp Zabel | 94b76ce | 2014-06-04 13:57:02 -0300 | [diff] [blame] | 1182 | mt9v032->subdev.dev = &client->dev; |
| 1183 | ret = v4l2_async_register_subdev(&mt9v032->subdev); |
| 1184 | if (ret < 0) |
| 1185 | goto err; |
| 1186 | |
| 1187 | return 0; |
| 1188 | |
| 1189 | err: |
| 1190 | media_entity_cleanup(&mt9v032->subdev.entity); |
| 1191 | v4l2_ctrl_handler_free(&mt9v032->ctrls); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1192 | return ret; |
| 1193 | } |
| 1194 | |
| 1195 | static int mt9v032_remove(struct i2c_client *client) |
| 1196 | { |
| 1197 | struct v4l2_subdev *subdev = i2c_get_clientdata(client); |
| 1198 | struct mt9v032 *mt9v032 = to_mt9v032(subdev); |
| 1199 | |
Philipp Zabel | 94b76ce | 2014-06-04 13:57:02 -0300 | [diff] [blame] | 1200 | v4l2_async_unregister_subdev(subdev); |
Laurent Pinchart | 9462550 | 2013-05-02 08:34:30 -0300 | [diff] [blame] | 1201 | v4l2_ctrl_handler_free(&mt9v032->ctrls); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1202 | media_entity_cleanup(&subdev->entity); |
Laurent Pinchart | 9462550 | 2013-05-02 08:34:30 -0300 | [diff] [blame] | 1203 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1204 | return 0; |
| 1205 | } |
| 1206 | |
Markus Pargmann | 81ea482 | 2015-12-14 12:41:53 -0200 | [diff] [blame] | 1207 | static const struct mt9v032_model_data mt9v032_model_data[] = { |
| 1208 | { |
| 1209 | /* MT9V022, MT9V032 revisions 1/2/3 */ |
| 1210 | .min_row_time = 660, |
| 1211 | .min_hblank = MT9V032_HORIZONTAL_BLANKING_MIN, |
| 1212 | .min_vblank = MT9V032_VERTICAL_BLANKING_MIN, |
| 1213 | .max_vblank = MT9V032_VERTICAL_BLANKING_MAX, |
| 1214 | .min_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MIN, |
| 1215 | .max_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MAX, |
| 1216 | .pclk_reg = MT9V032_PIXEL_CLOCK, |
| 1217 | .aec_max_shutter_reg = MT9V032_AEC_MAX_SHUTTER_WIDTH, |
| 1218 | .aec_max_shutter_v4l2_ctrl = &mt9v032_aec_max_shutter_width, |
| 1219 | }, { |
| 1220 | /* MT9V024, MT9V034 */ |
| 1221 | .min_row_time = 690, |
| 1222 | .min_hblank = MT9V034_HORIZONTAL_BLANKING_MIN, |
| 1223 | .min_vblank = MT9V034_VERTICAL_BLANKING_MIN, |
| 1224 | .max_vblank = MT9V034_VERTICAL_BLANKING_MAX, |
| 1225 | .min_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MIN, |
| 1226 | .max_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MAX, |
| 1227 | .pclk_reg = MT9V034_PIXEL_CLOCK, |
| 1228 | .aec_max_shutter_reg = MT9V034_AEC_MAX_SHUTTER_WIDTH, |
| 1229 | .aec_max_shutter_v4l2_ctrl = &mt9v034_aec_max_shutter_width, |
| 1230 | }, |
| 1231 | }; |
| 1232 | |
| 1233 | static const struct mt9v032_model_info mt9v032_models[] = { |
| 1234 | [MT9V032_MODEL_V022_COLOR] = { |
| 1235 | .data = &mt9v032_model_data[0], |
| 1236 | .color = true, |
| 1237 | }, |
| 1238 | [MT9V032_MODEL_V022_MONO] = { |
| 1239 | .data = &mt9v032_model_data[0], |
| 1240 | .color = false, |
| 1241 | }, |
| 1242 | [MT9V032_MODEL_V024_COLOR] = { |
| 1243 | .data = &mt9v032_model_data[1], |
| 1244 | .color = true, |
| 1245 | }, |
| 1246 | [MT9V032_MODEL_V024_MONO] = { |
| 1247 | .data = &mt9v032_model_data[1], |
| 1248 | .color = false, |
| 1249 | }, |
| 1250 | [MT9V032_MODEL_V032_COLOR] = { |
| 1251 | .data = &mt9v032_model_data[0], |
| 1252 | .color = true, |
| 1253 | }, |
| 1254 | [MT9V032_MODEL_V032_MONO] = { |
| 1255 | .data = &mt9v032_model_data[0], |
| 1256 | .color = false, |
| 1257 | }, |
| 1258 | [MT9V032_MODEL_V034_COLOR] = { |
| 1259 | .data = &mt9v032_model_data[1], |
| 1260 | .color = true, |
| 1261 | }, |
| 1262 | [MT9V032_MODEL_V034_MONO] = { |
| 1263 | .data = &mt9v032_model_data[1], |
| 1264 | .color = false, |
| 1265 | }, |
| 1266 | }; |
| 1267 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1268 | static const struct i2c_device_id mt9v032_id[] = { |
Philipp Zabel | d8dde6c | 2014-06-03 06:35:54 -0300 | [diff] [blame] | 1269 | { "mt9v022", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V022_COLOR] }, |
| 1270 | { "mt9v022m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V022_MONO] }, |
| 1271 | { "mt9v024", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V024_COLOR] }, |
| 1272 | { "mt9v024m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V024_MONO] }, |
Laurent Pinchart | daecfeb | 2013-12-02 12:01:03 -0300 | [diff] [blame] | 1273 | { "mt9v032", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_COLOR] }, |
| 1274 | { "mt9v032m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_MONO] }, |
| 1275 | { "mt9v034", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_COLOR] }, |
| 1276 | { "mt9v034m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_MONO] }, |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1277 | { } |
| 1278 | }; |
| 1279 | MODULE_DEVICE_TABLE(i2c, mt9v032_id); |
| 1280 | |
Laurent Pinchart | f2272e1 | 2014-01-01 14:40:35 -0300 | [diff] [blame] | 1281 | #if IS_ENABLED(CONFIG_OF) |
| 1282 | static const struct of_device_id mt9v032_of_match[] = { |
| 1283 | { .compatible = "aptina,mt9v022" }, |
| 1284 | { .compatible = "aptina,mt9v022m" }, |
| 1285 | { .compatible = "aptina,mt9v024" }, |
| 1286 | { .compatible = "aptina,mt9v024m" }, |
| 1287 | { .compatible = "aptina,mt9v032" }, |
| 1288 | { .compatible = "aptina,mt9v032m" }, |
| 1289 | { .compatible = "aptina,mt9v034" }, |
| 1290 | { .compatible = "aptina,mt9v034m" }, |
| 1291 | { /* Sentinel */ } |
| 1292 | }; |
| 1293 | MODULE_DEVICE_TABLE(of, mt9v032_of_match); |
| 1294 | #endif |
| 1295 | |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1296 | static struct i2c_driver mt9v032_driver = { |
| 1297 | .driver = { |
| 1298 | .name = "mt9v032", |
Laurent Pinchart | f2272e1 | 2014-01-01 14:40:35 -0300 | [diff] [blame] | 1299 | .of_match_table = of_match_ptr(mt9v032_of_match), |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1300 | }, |
| 1301 | .probe = mt9v032_probe, |
| 1302 | .remove = mt9v032_remove, |
| 1303 | .id_table = mt9v032_id, |
| 1304 | }; |
| 1305 | |
Axel Lin | c6e8d86 | 2012-02-12 06:56:32 -0300 | [diff] [blame] | 1306 | module_i2c_driver(mt9v032_driver); |
Detlev Casanova | 0f2ce16 | 2011-04-05 09:06:21 -0300 | [diff] [blame] | 1307 | |
| 1308 | MODULE_DESCRIPTION("Aptina MT9V032 Camera driver"); |
| 1309 | MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>"); |
| 1310 | MODULE_LICENSE("GPL"); |