blob: a751fcce7c8ebe16e40486827864b55f0f6b94d3 [file] [log] [blame]
Thomas Gleixner9c9cf6b2019-06-01 10:08:19 +02001// SPDX-License-Identifier: GPL-2.0-only
Clemens Ladischd0ce9942007-12-23 19:50:57 +01002/*
Clemens Ladisch873591d2009-03-09 09:12:55 +01003 * C-Media CMI8788 driver for C-Media's reference design and similar models
Clemens Ladischd0ce9942007-12-23 19:50:57 +01004 *
5 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
Clemens Ladischd0ce9942007-12-23 19:50:57 +01006 */
7
8/*
Clemens Ladischdc0adf42009-09-28 11:17:36 +02009 * CMI8788:
10 *
Clemens Ladischde664932010-12-02 11:42:48 +010011 * SPI 0 -> 1st AK4396 (front)
12 * SPI 1 -> 2nd AK4396 (surround)
13 * SPI 2 -> 3rd AK4396 (center/LFE)
14 * SPI 3 -> WM8785
15 * SPI 4 -> 4th AK4396 (back)
Clemens Ladischd0ce9942007-12-23 19:50:57 +010016 *
Clemens Ladischde664932010-12-02 11:42:48 +010017 * GPIO 0 -> DFS0 of AK5385
18 * GPIO 1 -> DFS1 of AK5385
Clemens Ladisch64878df2011-01-10 16:35:38 +010019 *
20 * X-Meridian models:
21 * GPIO 4 -> enable extension S/PDIF input
22 * GPIO 6 -> enable on-board S/PDIF input
23 *
24 * Claro models:
Clemens Ladischd1d70932011-01-11 10:35:29 +010025 * GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
Clemens Ladisch64878df2011-01-10 16:35:38 +010026 * GPIO 8 -> enable headphone amplifier
Clemens Ladischdc0adf42009-09-28 11:17:36 +020027 *
28 * CM9780:
29 *
Clemens Ladischde664932010-12-02 11:42:48 +010030 * LINE_OUT -> input of ADC
31 *
32 * AUX_IN <- aux
33 * CD_IN <- CD
34 * MIC_IN <- mic
35 *
36 * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
Clemens Ladischd0ce9942007-12-23 19:50:57 +010037 */
38
Clemens Ladischdf91bc22008-08-29 13:08:34 +020039#include <linux/delay.h>
Clemens Ladisch902b05c2008-02-22 18:40:56 +010040#include <linux/mutex.h>
Clemens Ladischd0ce9942007-12-23 19:50:57 +010041#include <linux/pci.h>
Paul Gortmakerda155d52011-07-15 12:38:28 -040042#include <linux/module.h>
Clemens Ladisch902b05c2008-02-22 18:40:56 +010043#include <sound/ac97_codec.h>
Clemens Ladischccc80fb2008-01-16 08:32:08 +010044#include <sound/control.h>
Clemens Ladischd0ce9942007-12-23 19:50:57 +010045#include <sound/core.h>
Clemens Ladisch9719fca2010-12-02 11:41:10 +010046#include <sound/info.h>
Clemens Ladischd0ce9942007-12-23 19:50:57 +010047#include <sound/initval.h>
48#include <sound/pcm.h>
49#include <sound/pcm_params.h>
50#include <sound/tlv.h>
51#include "oxygen.h"
Clemens Ladisch66410bf2011-01-10 16:20:29 +010052#include "xonar_dg.h"
Clemens Ladischc6260262008-01-25 08:41:52 +010053#include "ak4396.h"
Clemens Ladischf5b23682008-03-19 08:14:01 +010054#include "wm8785.h"
Clemens Ladischd0ce9942007-12-23 19:50:57 +010055
56MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
57MODULE_DESCRIPTION("C-Media CMI8788 driver");
Clemens Ladischd023dc02008-05-13 09:18:27 +020058MODULE_LICENSE("GPL v2");
Clemens Ladisch66410bf2011-01-10 16:20:29 +010059MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8786}"
60 ",{C-Media,CMI8787}"
61 ",{C-Media,CMI8788}}");
Clemens Ladischd0ce9942007-12-23 19:50:57 +010062
63static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
64static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
Rusty Russella67ff6a2011-12-15 13:49:36 +103065static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
Clemens Ladischd0ce9942007-12-23 19:50:57 +010066
67module_param_array(index, int, NULL, 0444);
68MODULE_PARM_DESC(index, "card index");
69module_param_array(id, charp, NULL, 0444);
70MODULE_PARM_DESC(id, "ID string");
71module_param_array(enable, bool, NULL, 0444);
72MODULE_PARM_DESC(enable, "enable card");
73
Clemens Ladisch2f1b0ec2008-09-22 08:57:24 +020074enum {
Clemens Ladisch18f24832010-11-03 11:36:33 +010075 MODEL_CMEDIA_REF,
76 MODEL_MERIDIAN,
Clemens Ladischa4b16962011-01-10 16:37:19 +010077 MODEL_MERIDIAN_2G,
Clemens Ladisch18f24832010-11-03 11:36:33 +010078 MODEL_CLARO,
79 MODEL_CLARO_HALO,
Clemens Ladisch2146dcf2010-11-03 12:26:35 +010080 MODEL_FANTASIA,
Clemens Ladischa4b16962011-01-10 16:37:19 +010081 MODEL_SERENADE,
Clemens Ladisch2146dcf2010-11-03 12:26:35 +010082 MODEL_2CH_OUTPUT,
Clemens Ladischa4b16962011-01-10 16:37:19 +010083 MODEL_HG2PCI,
Clemens Ladisch66410bf2011-01-10 16:20:29 +010084 MODEL_XONAR_DG,
Clemens Ladisch76bc7a02012-05-01 17:40:30 +020085 MODEL_XONAR_DGX,
Clemens Ladisch2f1b0ec2008-09-22 08:57:24 +020086};
87
Benoit Taine9baa3c32014-08-08 15:56:03 +020088static const struct pci_device_id oxygen_ids[] = {
Clemens Ladisch18f24832010-11-03 11:36:33 +010089 /* C-Media's reference design */
Clemens Ladisch2f1b0ec2008-09-22 08:57:24 +020090 { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
Clemens Ladisch8c50b752011-01-10 16:16:32 +010091 { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
Clemens Ladisch2f1b0ec2008-09-22 08:57:24 +020092 { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
93 { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
94 { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
95 { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
96 { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
97 { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
Clemens Ladisch18f24832010-11-03 11:36:33 +010098 { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
Clemens Ladisch66410bf2011-01-10 16:20:29 +010099 /* Asus Xonar DG */
100 { OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
Clemens Ladisch76bc7a02012-05-01 17:40:30 +0200101 /* Asus Xonar DGX */
102 { OXYGEN_PCI_SUBID(0x1043, 0x8521), .driver_data = MODEL_XONAR_DGX },
Clemens Ladisch8c50b752011-01-10 16:16:32 +0100103 /* PCI 2.0 HD Audio */
104 { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
Clemens Ladisch18f24832010-11-03 11:36:33 +0100105 /* Kuroutoshikou CMI8787-HG2PCI */
Clemens Ladischa4b16962011-01-10 16:37:19 +0100106 { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
Clemens Ladisch18f24832010-11-03 11:36:33 +0100107 /* TempoTec HiFier Fantasia */
Clemens Ladisch2146dcf2010-11-03 12:26:35 +0100108 { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
109 /* TempoTec HiFier Serenade */
Clemens Ladischa4b16962011-01-10 16:37:19 +0100110 { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
Clemens Ladisch18f24832010-11-03 11:36:33 +0100111 /* AuzenTech X-Meridian */
Clemens Ladisch2f1b0ec2008-09-22 08:57:24 +0200112 { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
Clemens Ladisch8443d2e2011-01-10 16:17:26 +0100113 /* AuzenTech X-Meridian 2G */
Clemens Ladischa4b16962011-01-10 16:37:19 +0100114 { OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
Clemens Ladisch18f24832010-11-03 11:36:33 +0100115 /* HT-Omega Claro */
Clemens Ladisch873591d2009-03-09 09:12:55 +0100116 { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
Clemens Ladisch18f24832010-11-03 11:36:33 +0100117 /* HT-Omega Claro halo */
Clemens Ladisch873591d2009-03-09 09:12:55 +0100118 { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100119 { }
120};
121MODULE_DEVICE_TABLE(pci, oxygen_ids);
122
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100123
124#define GPIO_AK5385_DFS_MASK 0x0003
125#define GPIO_AK5385_DFS_NORMAL 0x0000
126#define GPIO_AK5385_DFS_DOUBLE 0x0001
127#define GPIO_AK5385_DFS_QUAD 0x0002
128
Clemens Ladisch64878df2011-01-10 16:35:38 +0100129#define GPIO_MERIDIAN_DIG_MASK 0x0050
130#define GPIO_MERIDIAN_DIG_EXT 0x0010
131#define GPIO_MERIDIAN_DIG_BOARD 0x0040
132
Clemens Ladischd1d70932011-01-11 10:35:29 +0100133#define GPIO_CLARO_DIG_COAX 0x0040
Clemens Ladisch873591d2009-03-09 09:12:55 +0100134#define GPIO_CLARO_HP 0x0100
135
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100136struct generic_data {
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100137 unsigned int dacs;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200138 u8 ak4396_regs[4][5];
Clemens Ladisch1ff04882009-09-28 11:21:51 +0200139 u16 wm8785_regs[3];
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100140};
141
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100142static void ak4396_write(struct oxygen *chip, unsigned int codec,
143 u8 reg, u8 value)
144{
145 /* maps ALSA channel pair number to SPI output */
146 static const u8 codec_spi_map[4] = {
Clemens Ladisch7113e952008-01-14 08:55:03 +0100147 0, 1, 2, 4
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100148 };
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200149 struct generic_data *data = chip->model_data;
150
Clemens Ladischc2353a02008-01-18 09:17:53 +0100151 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100152 OXYGEN_SPI_DATA_LENGTH_2 |
Clemens Ladisch2ea85982008-01-30 08:38:30 +0100153 OXYGEN_SPI_CLOCK_160 |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100154 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
Clemens Ladischc2353a02008-01-18 09:17:53 +0100155 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100156 AK4396_WRITE | (reg << 8) | value);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200157 data->ak4396_regs[codec][reg] = value;
158}
159
160static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
161 u8 reg, u8 value)
162{
163 struct generic_data *data = chip->model_data;
164
165 if (value != data->ak4396_regs[codec][reg])
166 ak4396_write(chip, codec, reg, value);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100167}
168
169static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
170{
Clemens Ladische58aee92008-05-13 09:20:51 +0200171 struct generic_data *data = chip->model_data;
172
Clemens Ladischc2353a02008-01-18 09:17:53 +0100173 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100174 OXYGEN_SPI_DATA_LENGTH_2 |
Clemens Ladisch2ea85982008-01-30 08:38:30 +0100175 OXYGEN_SPI_CLOCK_160 |
Clemens Ladischc2353a02008-01-18 09:17:53 +0100176 (3 << OXYGEN_SPI_CODEC_SHIFT) |
177 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100178 (reg << 9) | value);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200179 if (reg < ARRAY_SIZE(data->wm8785_regs))
180 data->wm8785_regs[reg] = value;
Clemens Ladischbbbfb552008-05-13 09:21:48 +0200181}
182
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200183static void ak4396_registers_init(struct oxygen *chip)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100184{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100185 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100186 unsigned int i;
187
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100188 for (i = 0; i < data->dacs; ++i) {
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200189 ak4396_write(chip, i, AK4396_CONTROL_1,
190 AK4396_DIF_24_MSB | AK4396_RSTN);
191 ak4396_write(chip, i, AK4396_CONTROL_2,
192 data->ak4396_regs[0][AK4396_CONTROL_2]);
193 ak4396_write(chip, i, AK4396_CONTROL_3,
194 AK4396_PCM);
195 ak4396_write(chip, i, AK4396_LCH_ATT,
196 chip->dac_volume[i * 2]);
197 ak4396_write(chip, i, AK4396_RCH_ATT,
198 chip->dac_volume[i * 2 + 1]);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100199 }
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200200}
201
202static void ak4396_init(struct oxygen *chip)
203{
204 struct generic_data *data = chip->model_data;
205
Clemens Ladisch1f4d7be2011-01-10 15:59:38 +0100206 data->dacs = chip->model.dac_channels_pcm / 2;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200207 data->ak4396_regs[0][AK4396_CONTROL_2] =
208 AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200209 ak4396_registers_init(chip);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100210 snd_component_add(chip->card, "AK4396");
211}
212
213static void ak5385_init(struct oxygen *chip)
214{
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100215 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
216 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100217 snd_component_add(chip->card, "AK5385");
218}
219
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200220static void wm8785_registers_init(struct oxygen *chip)
221{
222 struct generic_data *data = chip->model_data;
223
224 wm8785_write(chip, WM8785_R7, 0);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200225 wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
Clemens Ladisch1ff04882009-09-28 11:21:51 +0200226 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200227}
228
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100229static void wm8785_init(struct oxygen *chip)
230{
Clemens Ladische58aee92008-05-13 09:20:51 +0200231 struct generic_data *data = chip->model_data;
232
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200233 data->wm8785_regs[0] =
234 WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
Clemens Ladisch1ff04882009-09-28 11:21:51 +0200235 data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
Clemens Ladisch75146fc2008-05-13 09:22:43 +0200236 wm8785_registers_init(chip);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100237 snd_component_add(chip->card, "WM8785");
238}
239
240static void generic_init(struct oxygen *chip)
241{
242 ak4396_init(chip);
243 wm8785_init(chip);
244}
245
246static void meridian_init(struct oxygen *chip)
247{
Clemens Ladisch64878df2011-01-10 16:35:38 +0100248 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
249 GPIO_MERIDIAN_DIG_MASK);
250 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
251 GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100252 ak4396_init(chip);
253 ak5385_init(chip);
254}
255
Clemens Ladisch873591d2009-03-09 09:12:55 +0100256static void claro_enable_hp(struct oxygen *chip)
257{
258 msleep(300);
259 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
260 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
261}
262
263static void claro_init(struct oxygen *chip)
264{
Clemens Ladischd1d70932011-01-11 10:35:29 +0100265 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
266 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
Clemens Ladisch873591d2009-03-09 09:12:55 +0100267 ak4396_init(chip);
268 wm8785_init(chip);
269 claro_enable_hp(chip);
270}
271
272static void claro_halo_init(struct oxygen *chip)
Clemens Ladischd91b4242009-02-20 09:31:14 +0100273{
Clemens Ladischd1d70932011-01-11 10:35:29 +0100274 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
275 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
Clemens Ladischd91b4242009-02-20 09:31:14 +0100276 ak4396_init(chip);
277 ak5385_init(chip);
Clemens Ladisch873591d2009-03-09 09:12:55 +0100278 claro_enable_hp(chip);
Clemens Ladischd91b4242009-02-20 09:31:14 +0100279}
280
Clemens Ladisch2146dcf2010-11-03 12:26:35 +0100281static void fantasia_init(struct oxygen *chip)
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100282{
283 ak4396_init(chip);
284 snd_component_add(chip->card, "CS5340");
285}
286
Clemens Ladisch2146dcf2010-11-03 12:26:35 +0100287static void stereo_output_init(struct oxygen *chip)
Clemens Ladisch31f86ba2010-11-02 17:18:23 +0100288{
289 ak4396_init(chip);
290}
291
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100292static void generic_cleanup(struct oxygen *chip)
293{
294}
295
Clemens Ladisch873591d2009-03-09 09:12:55 +0100296static void claro_disable_hp(struct oxygen *chip)
297{
298 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
299}
300
301static void claro_cleanup(struct oxygen *chip)
302{
303 claro_disable_hp(chip);
304}
305
306static void claro_suspend(struct oxygen *chip)
307{
308 claro_disable_hp(chip);
309}
310
Clemens Ladisch4a4bc532008-05-13 09:24:39 +0200311static void generic_resume(struct oxygen *chip)
312{
313 ak4396_registers_init(chip);
314 wm8785_registers_init(chip);
315}
316
Clemens Ladischc2bc4ff2008-09-22 09:05:29 +0200317static void meridian_resume(struct oxygen *chip)
318{
319 ak4396_registers_init(chip);
320}
321
Clemens Ladisch873591d2009-03-09 09:12:55 +0100322static void claro_resume(struct oxygen *chip)
Clemens Ladischd91b4242009-02-20 09:31:14 +0100323{
324 ak4396_registers_init(chip);
Clemens Ladisch873591d2009-03-09 09:12:55 +0100325 claro_enable_hp(chip);
Clemens Ladischd91b4242009-02-20 09:31:14 +0100326}
327
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100328static void stereo_resume(struct oxygen *chip)
329{
330 ak4396_registers_init(chip);
331}
332
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100333static void set_ak4396_params(struct oxygen *chip,
334 struct snd_pcm_hw_params *params)
335{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100336 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100337 unsigned int i;
338 u8 value;
339
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200340 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100341 if (params_rate(params) <= 54000)
342 value |= AK4396_DFS_NORMAL;
Clemens Ladisch236c4922008-01-28 08:32:58 +0100343 else if (params_rate(params) <= 108000)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100344 value |= AK4396_DFS_DOUBLE;
345 else
346 value |= AK4396_DFS_QUAD;
Clemens Ladischdf91bc22008-08-29 13:08:34 +0200347
348 msleep(1); /* wait for the new MCLK to become stable */
349
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200350 if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100351 for (i = 0; i < data->dacs; ++i) {
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200352 ak4396_write(chip, i, AK4396_CONTROL_1,
353 AK4396_DIF_24_MSB);
354 ak4396_write(chip, i, AK4396_CONTROL_2, value);
355 ak4396_write(chip, i, AK4396_CONTROL_1,
356 AK4396_DIF_24_MSB | AK4396_RSTN);
357 }
358 }
359}
360
361static void update_ak4396_volume(struct oxygen *chip)
362{
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100363 struct generic_data *data = chip->model_data;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200364 unsigned int i;
365
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100366 for (i = 0; i < data->dacs; ++i) {
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200367 ak4396_write_cached(chip, i, AK4396_LCH_ATT,
368 chip->dac_volume[i * 2]);
369 ak4396_write_cached(chip, i, AK4396_RCH_ATT,
370 chip->dac_volume[i * 2 + 1]);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100371 }
372}
373
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100374static void update_ak4396_mute(struct oxygen *chip)
375{
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100376 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100377 unsigned int i;
378 u8 value;
379
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200380 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100381 if (chip->dac_mute)
382 value |= AK4396_SMUTE;
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100383 for (i = 0; i < data->dacs; ++i)
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200384 ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100385}
386
387static void set_wm8785_params(struct oxygen *chip,
388 struct snd_pcm_hw_params *params)
389{
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200390 struct generic_data *data = chip->model_data;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100391 unsigned int value;
392
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100393 value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
Clemens Ladisch71e22a42008-01-21 08:50:51 +0100394 if (params_rate(params) <= 48000)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100395 value |= WM8785_OSR_SINGLE;
Clemens Ladisch71e22a42008-01-21 08:50:51 +0100396 else if (params_rate(params) <= 96000)
397 value |= WM8785_OSR_DOUBLE;
398 else
399 value |= WM8785_OSR_QUAD;
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200400 if (value != data->wm8785_regs[0]) {
401 wm8785_write(chip, WM8785_R7, 0);
402 wm8785_write(chip, WM8785_R0, value);
Clemens Ladisch1ff04882009-09-28 11:21:51 +0200403 wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
Clemens Ladisch6f0de3c2009-09-28 11:18:45 +0200404 }
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100405}
406
407static void set_ak5385_params(struct oxygen *chip,
408 struct snd_pcm_hw_params *params)
409{
410 unsigned int value;
411
412 if (params_rate(params) <= 54000)
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100413 value = GPIO_AK5385_DFS_NORMAL;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100414 else if (params_rate(params) <= 108000)
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100415 value = GPIO_AK5385_DFS_DOUBLE;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100416 else
Clemens Ladisch878ac3e2008-01-21 08:50:19 +0100417 value = GPIO_AK5385_DFS_QUAD;
418 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
419 value, GPIO_AK5385_DFS_MASK);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100420}
421
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100422static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
423{
424}
425
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200426static int rolloff_info(struct snd_kcontrol *ctl,
427 struct snd_ctl_elem_info *info)
428{
429 static const char *const names[2] = {
430 "Sharp Roll-off", "Slow Roll-off"
431 };
432
Clemens Ladisch96007322011-01-10 16:25:44 +0100433 return snd_ctl_enum_info(info, 1, 2, names);
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200434}
435
436static int rolloff_get(struct snd_kcontrol *ctl,
437 struct snd_ctl_elem_value *value)
438{
439 struct oxygen *chip = ctl->private_data;
440 struct generic_data *data = chip->model_data;
441
442 value->value.enumerated.item[0] =
443 (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
444 return 0;
445}
446
447static int rolloff_put(struct snd_kcontrol *ctl,
448 struct snd_ctl_elem_value *value)
449{
450 struct oxygen *chip = ctl->private_data;
451 struct generic_data *data = chip->model_data;
452 unsigned int i;
453 int changed;
454 u8 reg;
455
456 mutex_lock(&chip->mutex);
457 reg = data->ak4396_regs[0][AK4396_CONTROL_2];
458 if (value->value.enumerated.item[0])
459 reg |= AK4396_SLOW;
460 else
461 reg &= ~AK4396_SLOW;
462 changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
463 if (changed) {
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100464 for (i = 0; i < data->dacs; ++i)
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200465 ak4396_write(chip, i, AK4396_CONTROL_2, reg);
466 }
467 mutex_unlock(&chip->mutex);
468 return changed;
469}
470
471static const struct snd_kcontrol_new rolloff_control = {
472 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
473 .name = "DAC Filter Playback Enum",
474 .info = rolloff_info,
475 .get = rolloff_get,
476 .put = rolloff_put,
477};
478
Clemens Ladisch1ff04882009-09-28 11:21:51 +0200479static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
480{
481 static const char *const names[2] = {
482 "None", "High-pass Filter"
483 };
484
Clemens Ladisch96007322011-01-10 16:25:44 +0100485 return snd_ctl_enum_info(info, 1, 2, names);
Clemens Ladisch1ff04882009-09-28 11:21:51 +0200486}
487
488static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
489{
490 struct oxygen *chip = ctl->private_data;
491 struct generic_data *data = chip->model_data;
492
493 value->value.enumerated.item[0] =
494 (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
495 return 0;
496}
497
498static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
499{
500 struct oxygen *chip = ctl->private_data;
501 struct generic_data *data = chip->model_data;
502 unsigned int reg;
503 int changed;
504
505 mutex_lock(&chip->mutex);
506 reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
507 if (value->value.enumerated.item[0])
508 reg |= WM8785_HPFR | WM8785_HPFL;
509 changed = reg != data->wm8785_regs[WM8785_R2];
510 if (changed)
511 wm8785_write(chip, WM8785_R2, reg);
512 mutex_unlock(&chip->mutex);
513 return changed;
514}
515
516static const struct snd_kcontrol_new hpf_control = {
517 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
518 .name = "ADC Filter Capture Enum",
519 .info = hpf_info,
520 .get = hpf_get,
521 .put = hpf_put,
522};
523
Clemens Ladischd1d70932011-01-11 10:35:29 +0100524static int meridian_dig_source_info(struct snd_kcontrol *ctl,
525 struct snd_ctl_elem_info *info)
Clemens Ladisch64878df2011-01-10 16:35:38 +0100526{
527 static const char *const names[2] = { "On-board", "Extension" };
528
529 return snd_ctl_enum_info(info, 1, 2, names);
530}
531
Clemens Ladischd1d70932011-01-11 10:35:29 +0100532static int claro_dig_source_info(struct snd_kcontrol *ctl,
533 struct snd_ctl_elem_info *info)
534{
535 static const char *const names[2] = { "Optical", "Coaxial" };
536
537 return snd_ctl_enum_info(info, 1, 2, names);
538}
539
540static int meridian_dig_source_get(struct snd_kcontrol *ctl,
541 struct snd_ctl_elem_value *value)
Clemens Ladisch64878df2011-01-10 16:35:38 +0100542{
543 struct oxygen *chip = ctl->private_data;
544
545 value->value.enumerated.item[0] =
546 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
547 GPIO_MERIDIAN_DIG_EXT);
548 return 0;
549}
550
Clemens Ladischd1d70932011-01-11 10:35:29 +0100551static int claro_dig_source_get(struct snd_kcontrol *ctl,
552 struct snd_ctl_elem_value *value)
553{
554 struct oxygen *chip = ctl->private_data;
555
556 value->value.enumerated.item[0] =
557 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
558 GPIO_CLARO_DIG_COAX);
559 return 0;
560}
561
562static int meridian_dig_source_put(struct snd_kcontrol *ctl,
563 struct snd_ctl_elem_value *value)
Clemens Ladisch64878df2011-01-10 16:35:38 +0100564{
565 struct oxygen *chip = ctl->private_data;
566 u16 old_reg, new_reg;
567 int changed;
568
569 mutex_lock(&chip->mutex);
570 old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
571 new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
572 if (value->value.enumerated.item[0] == 0)
573 new_reg |= GPIO_MERIDIAN_DIG_BOARD;
574 else
575 new_reg |= GPIO_MERIDIAN_DIG_EXT;
576 changed = new_reg != old_reg;
577 if (changed)
578 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
579 mutex_unlock(&chip->mutex);
580 return changed;
581}
582
Clemens Ladischd1d70932011-01-11 10:35:29 +0100583static int claro_dig_source_put(struct snd_kcontrol *ctl,
584 struct snd_ctl_elem_value *value)
585{
586 struct oxygen *chip = ctl->private_data;
587 u16 old_reg, new_reg;
588 int changed;
589
590 mutex_lock(&chip->mutex);
591 old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
592 new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
593 if (value->value.enumerated.item[0])
594 new_reg |= GPIO_CLARO_DIG_COAX;
595 changed = new_reg != old_reg;
596 if (changed)
597 oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
598 mutex_unlock(&chip->mutex);
599 return changed;
600}
601
Clemens Ladisch64878df2011-01-10 16:35:38 +0100602static const struct snd_kcontrol_new meridian_dig_source_control = {
603 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
604 .name = "IEC958 Source Capture Enum",
605 .info = meridian_dig_source_info,
606 .get = meridian_dig_source_get,
607 .put = meridian_dig_source_put,
608};
609
Clemens Ladischd1d70932011-01-11 10:35:29 +0100610static const struct snd_kcontrol_new claro_dig_source_control = {
611 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
612 .name = "IEC958 Source Capture Enum",
613 .info = claro_dig_source_info,
614 .get = claro_dig_source_get,
615 .put = claro_dig_source_put,
616};
617
Clemens Ladisch4852ad02009-09-28 11:21:21 +0200618static int generic_mixer_init(struct oxygen *chip)
619{
620 return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
621}
622
Clemens Ladisch1ff04882009-09-28 11:21:51 +0200623static int generic_wm8785_mixer_init(struct oxygen *chip)
624{
625 int err;
626
627 err = generic_mixer_init(chip);
628 if (err < 0)
629 return err;
630 err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
631 if (err < 0)
632 return err;
633 return 0;
634}
635
Clemens Ladisch64878df2011-01-10 16:35:38 +0100636static int meridian_mixer_init(struct oxygen *chip)
637{
638 int err;
639
640 err = generic_mixer_init(chip);
641 if (err < 0)
642 return err;
643 err = snd_ctl_add(chip->card,
644 snd_ctl_new1(&meridian_dig_source_control, chip));
645 if (err < 0)
646 return err;
647 return 0;
648}
649
Clemens Ladischd1d70932011-01-11 10:35:29 +0100650static int claro_mixer_init(struct oxygen *chip)
651{
652 int err;
653
654 err = generic_wm8785_mixer_init(chip);
655 if (err < 0)
656 return err;
657 err = snd_ctl_add(chip->card,
658 snd_ctl_new1(&claro_dig_source_control, chip));
659 if (err < 0)
660 return err;
661 return 0;
662}
663
664static int claro_halo_mixer_init(struct oxygen *chip)
665{
666 int err;
667
668 err = generic_mixer_init(chip);
669 if (err < 0)
670 return err;
671 err = snd_ctl_add(chip->card,
672 snd_ctl_new1(&claro_dig_source_control, chip));
673 if (err < 0)
674 return err;
675 return 0;
676}
677
Clemens Ladisch9719fca2010-12-02 11:41:10 +0100678static void dump_ak4396_registers(struct oxygen *chip,
679 struct snd_info_buffer *buffer)
680{
681 struct generic_data *data = chip->model_data;
682 unsigned int dac, i;
683
684 for (dac = 0; dac < data->dacs; ++dac) {
685 snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
686 for (i = 0; i < 5; ++i)
687 snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
688 }
689 snd_iprintf(buffer, "\n");
690}
691
692static void dump_wm8785_registers(struct oxygen *chip,
693 struct snd_info_buffer *buffer)
694{
695 struct generic_data *data = chip->model_data;
696 unsigned int i;
697
698 snd_iprintf(buffer, "\nWM8785:");
699 for (i = 0; i < 3; ++i)
700 snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
701 snd_iprintf(buffer, "\n");
702}
703
704static void dump_oxygen_registers(struct oxygen *chip,
705 struct snd_info_buffer *buffer)
706{
707 dump_ak4396_registers(chip, buffer);
708 dump_wm8785_registers(chip, buffer);
709}
710
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100711static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
712
713static const struct oxygen_model model_generic = {
714 .shortname = "C-Media CMI8788",
715 .longname = "C-Media Oxygen HD Audio",
716 .chip = "CMI8788",
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100717 .init = generic_init,
Clemens Ladisch1ff04882009-09-28 11:21:51 +0200718 .mixer_init = generic_wm8785_mixer_init,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100719 .cleanup = generic_cleanup,
Clemens Ladisch4a4bc532008-05-13 09:24:39 +0200720 .resume = generic_resume,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100721 .set_dac_params = set_ak4396_params,
722 .set_adc_params = set_wm8785_params,
723 .update_dac_volume = update_ak4396_volume,
724 .update_dac_mute = update_ak4396_mute,
Clemens Ladisch9719fca2010-12-02 11:41:10 +0100725 .dump_registers = dump_oxygen_registers,
Clemens Ladisch4972a172008-04-16 09:15:45 +0200726 .dac_tlv = ak4396_db_scale,
Clemens Ladisch7ef37cd2008-01-21 08:51:55 +0100727 .model_data_size = sizeof(struct generic_data),
Clemens Ladischd76596b2008-09-22 09:02:08 +0200728 .device_config = PLAYBACK_0_TO_I2S |
729 PLAYBACK_1_TO_SPDIF |
730 PLAYBACK_2_TO_AC97_1 |
731 CAPTURE_0_FROM_I2S_1 |
732 CAPTURE_1_FROM_SPDIF |
Clemens Ladischb6ca8ab2010-10-04 13:21:52 +0200733 CAPTURE_2_FROM_AC97_1 |
734 AC97_CD_INPUT,
Clemens Ladisch1f4d7be2011-01-10 15:59:38 +0100735 .dac_channels_pcm = 8,
736 .dac_channels_mixer = 8,
Clemens Ladisch193e8132008-04-16 09:13:36 +0200737 .dac_volume_min = 0,
738 .dac_volume_max = 255,
Clemens Ladisch87eedd22008-03-19 08:20:13 +0100739 .function_flags = OXYGEN_FUNCTION_SPI |
740 OXYGEN_FUNCTION_ENABLE_SPI_4_5,
Clemens Ladischce2c4922011-01-10 16:16:08 +0100741 .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
Clemens Ladisch5b8bf2a2011-01-10 16:14:52 +0100742 .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
Clemens Ladisch05855ba2008-01-17 09:05:09 +0100743 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
744 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100745};
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100746
Bill Pembertonf120a6f2012-12-06 12:35:20 -0500747static int get_oxygen_model(struct oxygen *chip,
748 const struct pci_device_id *id)
Clemens Ladisch30459d72009-02-19 08:42:44 +0100749{
Clemens Ladischa4b16962011-01-10 16:37:19 +0100750 static const char *const names[] = {
751 [MODEL_MERIDIAN] = "AuzenTech X-Meridian",
752 [MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
753 [MODEL_CLARO] = "HT-Omega Claro",
754 [MODEL_CLARO_HALO] = "HT-Omega Claro halo",
755 [MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
756 [MODEL_SERENADE] = "TempoTec HiFier Serenade",
757 [MODEL_HG2PCI] = "CMI8787-HG2PCI",
Clemens Ladischac310dc2017-03-29 20:55:50 +0200758 [MODEL_XONAR_DG] = "Xonar DG",
759 [MODEL_XONAR_DGX] = "Xonar DGX",
Clemens Ladischa4b16962011-01-10 16:37:19 +0100760 };
761
Clemens Ladisch30459d72009-02-19 08:42:44 +0100762 chip->model = model_generic;
763 switch (id->driver_data) {
764 case MODEL_MERIDIAN:
Clemens Ladischa4b16962011-01-10 16:37:19 +0100765 case MODEL_MERIDIAN_2G:
Clemens Ladisch30459d72009-02-19 08:42:44 +0100766 chip->model.init = meridian_init;
Clemens Ladisch64878df2011-01-10 16:35:38 +0100767 chip->model.mixer_init = meridian_mixer_init;
Clemens Ladisch30459d72009-02-19 08:42:44 +0100768 chip->model.resume = meridian_resume;
769 chip->model.set_adc_params = set_ak5385_params;
Clemens Ladisch9719fca2010-12-02 11:41:10 +0100770 chip->model.dump_registers = dump_ak4396_registers;
Clemens Ladisch30459d72009-02-19 08:42:44 +0100771 chip->model.device_config = PLAYBACK_0_TO_I2S |
772 PLAYBACK_1_TO_SPDIF |
773 CAPTURE_0_FROM_I2S_2 |
774 CAPTURE_1_FROM_SPDIF;
Clemens Ladisch5fc51522011-01-11 10:33:40 +0100775 if (id->driver_data == MODEL_MERIDIAN)
776 chip->model.device_config |= AC97_CD_INPUT;
Clemens Ladisch30459d72009-02-19 08:42:44 +0100777 break;
Clemens Ladisch873591d2009-03-09 09:12:55 +0100778 case MODEL_CLARO:
779 chip->model.init = claro_init;
Clemens Ladischd1d70932011-01-11 10:35:29 +0100780 chip->model.mixer_init = claro_mixer_init;
Clemens Ladisch873591d2009-03-09 09:12:55 +0100781 chip->model.cleanup = claro_cleanup;
782 chip->model.suspend = claro_suspend;
783 chip->model.resume = claro_resume;
784 break;
785 case MODEL_CLARO_HALO:
786 chip->model.init = claro_halo_init;
Clemens Ladischd1d70932011-01-11 10:35:29 +0100787 chip->model.mixer_init = claro_halo_mixer_init;
Clemens Ladisch873591d2009-03-09 09:12:55 +0100788 chip->model.cleanup = claro_cleanup;
789 chip->model.suspend = claro_suspend;
790 chip->model.resume = claro_resume;
Clemens Ladischd91b4242009-02-20 09:31:14 +0100791 chip->model.set_adc_params = set_ak5385_params;
Clemens Ladisch9719fca2010-12-02 11:41:10 +0100792 chip->model.dump_registers = dump_ak4396_registers;
Erik J. Staab0873a5a2010-09-22 11:07:41 +0200793 chip->model.device_config = PLAYBACK_0_TO_I2S |
794 PLAYBACK_1_TO_SPDIF |
795 CAPTURE_0_FROM_I2S_2 |
796 CAPTURE_1_FROM_SPDIF;
Clemens Ladischd91b4242009-02-20 09:31:14 +0100797 break;
Clemens Ladisch2146dcf2010-11-03 12:26:35 +0100798 case MODEL_FANTASIA:
Clemens Ladischa4b16962011-01-10 16:37:19 +0100799 case MODEL_SERENADE:
Clemens Ladisch2146dcf2010-11-03 12:26:35 +0100800 case MODEL_2CH_OUTPUT:
Clemens Ladischa4b16962011-01-10 16:37:19 +0100801 case MODEL_HG2PCI:
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100802 chip->model.shortname = "C-Media CMI8787";
803 chip->model.chip = "CMI8787";
Clemens Ladisch2146dcf2010-11-03 12:26:35 +0100804 if (id->driver_data == MODEL_FANTASIA)
805 chip->model.init = fantasia_init;
Clemens Ladisch31f86ba2010-11-02 17:18:23 +0100806 else
Clemens Ladisch2146dcf2010-11-03 12:26:35 +0100807 chip->model.init = stereo_output_init;
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100808 chip->model.resume = stereo_resume;
809 chip->model.mixer_init = generic_mixer_init;
810 chip->model.set_adc_params = set_no_params;
Clemens Ladisch9719fca2010-12-02 11:41:10 +0100811 chip->model.dump_registers = dump_ak4396_registers;
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100812 chip->model.device_config = PLAYBACK_0_TO_I2S |
Clemens Ladisch31f86ba2010-11-02 17:18:23 +0100813 PLAYBACK_1_TO_SPDIF;
Clemens Ladischce2c4922011-01-10 16:16:08 +0100814 if (id->driver_data == MODEL_FANTASIA) {
Clemens Ladisch31f86ba2010-11-02 17:18:23 +0100815 chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
Clemens Ladischce2c4922011-01-10 16:16:08 +0100816 chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
817 }
Clemens Ladisch1f4d7be2011-01-10 15:59:38 +0100818 chip->model.dac_channels_pcm = 2;
819 chip->model.dac_channels_mixer = 2;
Clemens Ladisch45c1de82010-11-02 17:08:37 +0100820 break;
Clemens Ladisch66410bf2011-01-10 16:20:29 +0100821 case MODEL_XONAR_DG:
Clemens Ladisch76bc7a02012-05-01 17:40:30 +0200822 case MODEL_XONAR_DGX:
823 chip->model = model_xonar_dg;
Clemens Ladisch66410bf2011-01-10 16:20:29 +0100824 break;
Clemens Ladisch30459d72009-02-19 08:42:44 +0100825 }
826 if (id->driver_data == MODEL_MERIDIAN ||
Clemens Ladisch5fc51522011-01-11 10:33:40 +0100827 id->driver_data == MODEL_MERIDIAN_2G ||
Clemens Ladisch873591d2009-03-09 09:12:55 +0100828 id->driver_data == MODEL_CLARO_HALO) {
Clemens Ladisch30459d72009-02-19 08:42:44 +0100829 chip->model.misc_flags = OXYGEN_MISC_MIDI;
830 chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
831 }
Clemens Ladischa4b16962011-01-10 16:37:19 +0100832 if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
833 chip->model.shortname = names[id->driver_data];
Clemens Ladisch30459d72009-02-19 08:42:44 +0100834 return 0;
835}
836
Bill Pembertonf120a6f2012-12-06 12:35:20 -0500837static int generic_oxygen_probe(struct pci_dev *pci,
838 const struct pci_device_id *pci_id)
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100839{
840 static int dev;
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100841 int err;
842
843 if (dev >= SNDRV_CARDS)
844 return -ENODEV;
845 if (!enable[dev]) {
846 ++dev;
847 return -ENOENT;
848 }
Clemens Ladischbb718582009-02-19 08:37:13 +0100849 err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
Clemens Ladisch30459d72009-02-19 08:42:44 +0100850 oxygen_ids, get_oxygen_model);
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100851 if (err >= 0)
852 ++dev;
853 return err;
854}
855
856static struct pci_driver oxygen_driver = {
Takashi Iwai3733e422011-06-10 16:20:20 +0200857 .name = KBUILD_MODNAME,
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100858 .id_table = oxygen_ids,
859 .probe = generic_oxygen_probe,
Bill Pembertonf120a6f2012-12-06 12:35:20 -0500860 .remove = oxygen_pci_remove,
Takashi Iwaic7561cd2012-08-14 18:12:04 +0200861#ifdef CONFIG_PM_SLEEP
Takashi Iwai68cb2b52012-07-02 15:20:37 +0200862 .driver = {
863 .pm = &oxygen_pci_pm,
864 },
Clemens Ladisch4a4bc532008-05-13 09:24:39 +0200865#endif
Clemens Ladischd0ce9942007-12-23 19:50:57 +0100866};
867
Takashi Iwaie9f66d92012-04-24 12:25:00 +0200868module_pci_driver(oxygen_driver);