Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2009 Jerome Glisse. |
| 3 | * All Rights Reserved. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the |
| 7 | * "Software"), to deal in the Software without restriction, including |
| 8 | * without limitation the rights to use, copy, modify, merge, publish, |
| 9 | * distribute, sub license, and/or sell copies of the Software, and to |
| 10 | * permit persons to whom the Software is furnished to do so, subject to |
| 11 | * the following conditions: |
| 12 | * |
| 13 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 14 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 16 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 17 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 18 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 19 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 20 | * |
| 21 | * The above copyright notice and this permission notice (including the |
| 22 | * next paragraph) shall be included in all copies or substantial portions |
| 23 | * of the Software. |
| 24 | * |
| 25 | */ |
| 26 | /* |
| 27 | * Authors: |
| 28 | * Jerome Glisse <glisse@freedesktop.org> |
| 29 | * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> |
| 30 | * Dave Airlie |
| 31 | */ |
Sam Ravnborg | f918312 | 2019-06-08 10:02:40 +0200 | [diff] [blame] | 32 | |
| 33 | #include <linux/dma-mapping.h> |
| 34 | #include <linux/pagemap.h> |
Thomas Zimmermann | 2ef7941 | 2019-12-03 11:04:02 +0100 | [diff] [blame] | 35 | #include <linux/pci.h> |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 36 | #include <linux/seq_file.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 37 | #include <linux/slab.h> |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 38 | #include <linux/swap.h> |
Sam Ravnborg | f918312 | 2019-06-08 10:02:40 +0200 | [diff] [blame] | 39 | #include <linux/swiotlb.h> |
| 40 | |
| 41 | #include <drm/drm_agpsupport.h> |
Sam Ravnborg | f918312 | 2019-06-08 10:02:40 +0200 | [diff] [blame] | 42 | #include <drm/drm_device.h> |
| 43 | #include <drm/drm_file.h> |
Sam Ravnborg | f918312 | 2019-06-08 10:02:40 +0200 | [diff] [blame] | 44 | #include <drm/drm_prime.h> |
| 45 | #include <drm/radeon_drm.h> |
| 46 | #include <drm/ttm/ttm_bo_api.h> |
| 47 | #include <drm/ttm/ttm_bo_driver.h> |
Sam Ravnborg | f918312 | 2019-06-08 10:02:40 +0200 | [diff] [blame] | 48 | #include <drm/ttm/ttm_placement.h> |
| 49 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 50 | #include "radeon_reg.h" |
| 51 | #include "radeon.h" |
Lee Jones | afd90af | 2020-11-16 17:29:27 +0000 | [diff] [blame] | 52 | #include "radeon_ttm.h" |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 53 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 54 | static void radeon_ttm_debugfs_init(struct radeon_device *rdev); |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 55 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 56 | static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm, |
Dave Airlie | cae515f4 | 2020-09-17 13:48:59 +1000 | [diff] [blame] | 57 | struct ttm_resource *bo_mem); |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 58 | static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm); |
Dave Airlie | cae515f4 | 2020-09-17 13:48:59 +1000 | [diff] [blame] | 59 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 60 | struct radeon_device *radeon_get_rdev(struct ttm_device *bdev) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 61 | { |
| 62 | struct radeon_mman *mman; |
| 63 | struct radeon_device *rdev; |
| 64 | |
| 65 | mman = container_of(bdev, struct radeon_mman, bdev); |
| 66 | rdev = container_of(mman, struct radeon_device, mman); |
| 67 | return rdev; |
| 68 | } |
| 69 | |
Christian König | b0691b3 | 2020-07-23 11:47:57 +0200 | [diff] [blame] | 70 | static int radeon_ttm_init_vram(struct radeon_device *rdev) |
| 71 | { |
Dave Airlie | 3720589 | 2020-08-04 12:56:19 +1000 | [diff] [blame] | 72 | return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, |
Christian König | 0fe438c | 2020-09-11 15:06:53 +0200 | [diff] [blame] | 73 | false, rdev->mc.real_vram_size >> PAGE_SHIFT); |
Christian König | b0691b3 | 2020-07-23 11:47:57 +0200 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | static int radeon_ttm_init_gtt(struct radeon_device *rdev) |
| 77 | { |
Dave Airlie | 3720589 | 2020-08-04 12:56:19 +1000 | [diff] [blame] | 78 | return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, |
Christian König | 0fe438c | 2020-09-11 15:06:53 +0200 | [diff] [blame] | 79 | true, rdev->mc.gtt_size >> PAGE_SHIFT); |
Christian König | b0691b3 | 2020-07-23 11:47:57 +0200 | [diff] [blame] | 80 | } |
| 81 | |
Jerome Glisse | 312ea8d | 2009-12-07 15:52:58 +0100 | [diff] [blame] | 82 | static void radeon_evict_flags(struct ttm_buffer_object *bo, |
| 83 | struct ttm_placement *placement) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 84 | { |
Arvind Yadav | 46886db | 2017-07-02 14:36:47 +0530 | [diff] [blame] | 85 | static const struct ttm_place placements = { |
Christian König | f1217ed | 2014-08-27 13:16:04 +0200 | [diff] [blame] | 86 | .fpfn = 0, |
| 87 | .lpfn = 0, |
Christian König | 48e07c2 | 2020-09-10 13:39:41 +0200 | [diff] [blame] | 88 | .mem_type = TTM_PL_SYSTEM, |
Christian König | ce65b87 | 2020-09-30 16:44:16 +0200 | [diff] [blame] | 89 | .flags = 0 |
Christian König | f1217ed | 2014-08-27 13:16:04 +0200 | [diff] [blame] | 90 | }; |
| 91 | |
Jerome Glisse | d03d858 | 2009-12-14 21:02:09 +0100 | [diff] [blame] | 92 | struct radeon_bo *rbo; |
Jerome Glisse | d03d858 | 2009-12-14 21:02:09 +0100 | [diff] [blame] | 93 | |
| 94 | if (!radeon_ttm_bo_is_radeon_bo(bo)) { |
Jerome Glisse | d03d858 | 2009-12-14 21:02:09 +0100 | [diff] [blame] | 95 | placement->placement = &placements; |
| 96 | placement->busy_placement = &placements; |
| 97 | placement->num_placement = 1; |
| 98 | placement->num_busy_placement = 1; |
| 99 | return; |
| 100 | } |
| 101 | rbo = container_of(bo, struct radeon_bo, tbo); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 102 | switch (bo->mem.mem_type) { |
Jerome Glisse | 312ea8d | 2009-12-07 15:52:58 +0100 | [diff] [blame] | 103 | case TTM_PL_VRAM: |
Alex Deucher | 5e5c21c | 2014-12-03 00:03:49 -0500 | [diff] [blame] | 104 | if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) |
Dave Airlie | 9270eb1 | 2010-01-13 09:21:49 +1000 | [diff] [blame] | 105 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); |
Michel Dänzer | 2a85aed | 2014-10-09 18:55:04 +0900 | [diff] [blame] | 106 | else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && |
| 107 | bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { |
| 108 | unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; |
| 109 | int i; |
| 110 | |
| 111 | /* Try evicting to the CPU inaccessible part of VRAM |
| 112 | * first, but only set GTT as busy placement, so this |
| 113 | * BO will be evicted to GTT rather than causing other |
| 114 | * BOs to be evicted from VRAM |
| 115 | */ |
| 116 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM | |
| 117 | RADEON_GEM_DOMAIN_GTT); |
| 118 | rbo->placement.num_busy_placement = 0; |
| 119 | for (i = 0; i < rbo->placement.num_placement; i++) { |
Christian König | 48e07c2 | 2020-09-10 13:39:41 +0200 | [diff] [blame] | 120 | if (rbo->placements[i].mem_type == TTM_PL_VRAM) { |
Michel Dänzer | ce4b4f2 | 2017-03-24 19:01:09 +0900 | [diff] [blame] | 121 | if (rbo->placements[i].fpfn < fpfn) |
| 122 | rbo->placements[i].fpfn = fpfn; |
Michel Dänzer | 2a85aed | 2014-10-09 18:55:04 +0900 | [diff] [blame] | 123 | } else { |
| 124 | rbo->placement.busy_placement = |
| 125 | &rbo->placements[i]; |
| 126 | rbo->placement.num_busy_placement = 1; |
| 127 | } |
| 128 | } |
| 129 | } else |
Dave Airlie | 9270eb1 | 2010-01-13 09:21:49 +1000 | [diff] [blame] | 130 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); |
Jerome Glisse | 312ea8d | 2009-12-07 15:52:58 +0100 | [diff] [blame] | 131 | break; |
| 132 | case TTM_PL_TT: |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 133 | default: |
Jerome Glisse | 312ea8d | 2009-12-07 15:52:58 +0100 | [diff] [blame] | 134 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 135 | } |
Jerome Glisse | eaa5fd1 | 2009-12-09 21:57:37 +0100 | [diff] [blame] | 136 | *placement = rbo->placement; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 137 | } |
| 138 | |
| 139 | static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp) |
| 140 | { |
David Herrmann | acb4652 | 2013-08-25 18:28:59 +0200 | [diff] [blame] | 141 | struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 142 | struct radeon_device *rdev = radeon_get_rdev(bo->bdev); |
David Herrmann | acb4652 | 2013-08-25 18:28:59 +0200 | [diff] [blame] | 143 | |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 144 | if (radeon_ttm_tt_has_userptr(rdev, bo->ttm)) |
Jérôme Glisse | b5dcec6 | 2016-04-19 09:07:50 -0400 | [diff] [blame] | 145 | return -EPERM; |
Gerd Hoffmann | ce77038 | 2019-08-05 16:01:06 +0200 | [diff] [blame] | 146 | return drm_vma_node_verify_access(&rbo->tbo.base.vma_node, |
David Herrmann | d9a1f0b | 2016-09-01 14:48:33 +0200 | [diff] [blame] | 147 | filp->private_data); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 148 | } |
| 149 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 150 | static int radeon_move_blit(struct ttm_buffer_object *bo, |
Dave Airlie | b1ec292 | 2020-09-23 13:04:47 +1000 | [diff] [blame] | 151 | bool evict, |
Dave Airlie | 2966141 | 2020-08-04 12:56:32 +1000 | [diff] [blame] | 152 | struct ttm_resource *new_mem, |
| 153 | struct ttm_resource *old_mem) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 154 | { |
| 155 | struct radeon_device *rdev; |
| 156 | uint64_t old_start, new_start; |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 157 | struct radeon_fence *fence; |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 158 | unsigned num_pages; |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 159 | int r, ridx; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 160 | |
| 161 | rdev = radeon_get_rdev(bo->bdev); |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 162 | ridx = radeon_copy_ring_index(rdev); |
Christian König | 13f479b | 2016-08-17 09:46:42 +0200 | [diff] [blame] | 163 | old_start = (u64)old_mem->start << PAGE_SHIFT; |
| 164 | new_start = (u64)new_mem->start << PAGE_SHIFT; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 165 | |
| 166 | switch (old_mem->mem_type) { |
| 167 | case TTM_PL_VRAM: |
Jerome Glisse | d594e46 | 2010-02-17 21:54:29 +0000 | [diff] [blame] | 168 | old_start += rdev->mc.vram_start; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 169 | break; |
| 170 | case TTM_PL_TT: |
Jerome Glisse | d594e46 | 2010-02-17 21:54:29 +0000 | [diff] [blame] | 171 | old_start += rdev->mc.gtt_start; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 172 | break; |
| 173 | default: |
| 174 | DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); |
| 175 | return -EINVAL; |
| 176 | } |
| 177 | switch (new_mem->mem_type) { |
| 178 | case TTM_PL_VRAM: |
Jerome Glisse | d594e46 | 2010-02-17 21:54:29 +0000 | [diff] [blame] | 179 | new_start += rdev->mc.vram_start; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 180 | break; |
| 181 | case TTM_PL_TT: |
Jerome Glisse | d594e46 | 2010-02-17 21:54:29 +0000 | [diff] [blame] | 182 | new_start += rdev->mc.gtt_start; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 183 | break; |
| 184 | default: |
| 185 | DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); |
| 186 | return -EINVAL; |
| 187 | } |
Christian König | 876dc9f | 2012-05-08 14:24:01 +0200 | [diff] [blame] | 188 | if (!rdev->ring[ridx].ready) { |
Alex Deucher | 3000bf3 | 2012-01-05 22:11:07 -0500 | [diff] [blame] | 189 | DRM_ERROR("Trying to move memory with ring turned off.\n"); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 190 | return -EINVAL; |
| 191 | } |
Alex Deucher | 003cefe | 2011-09-16 12:04:08 -0400 | [diff] [blame] | 192 | |
| 193 | BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); |
| 194 | |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 195 | num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); |
Gerd Hoffmann | 336ac94 | 2019-08-05 16:01:13 +0200 | [diff] [blame] | 196 | fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 197 | if (IS_ERR(fence)) |
| 198 | return PTR_ERR(fence); |
| 199 | |
Dave Airlie | e46f468 | 2020-09-17 16:36:14 +1000 | [diff] [blame] | 200 | r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 201 | radeon_fence_unref(&fence); |
| 202 | return r; |
| 203 | } |
| 204 | |
Christian König | 2823f4f | 2017-04-26 16:31:14 +0200 | [diff] [blame] | 205 | static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, |
| 206 | struct ttm_operation_ctx *ctx, |
Dave Airlie | ebdf565 | 2020-10-29 13:58:52 +1000 | [diff] [blame] | 207 | struct ttm_resource *new_mem, |
| 208 | struct ttm_place *hop) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 209 | { |
| 210 | struct radeon_device *rdev; |
Michel Dänzer | e1a575a | 2016-03-28 16:39:14 +0900 | [diff] [blame] | 211 | struct radeon_bo *rbo; |
Dave Airlie | 2966141 | 2020-08-04 12:56:32 +1000 | [diff] [blame] | 212 | struct ttm_resource *old_mem = &bo->mem; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 213 | int r; |
| 214 | |
Dave Airlie | bfe5e58 | 2020-10-20 11:03:19 +1000 | [diff] [blame] | 215 | if (new_mem->mem_type == TTM_PL_TT) { |
| 216 | r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem); |
| 217 | if (r) |
| 218 | return r; |
| 219 | } |
Dave Airlie | 6d82000 | 2020-10-20 11:03:18 +1000 | [diff] [blame] | 220 | |
Dave Airlie | 0ef1ed8 | 2020-09-23 13:04:49 +1000 | [diff] [blame] | 221 | r = ttm_bo_wait_ctx(bo, ctx); |
Christian König | 88932a7 | 2016-06-06 10:17:53 +0200 | [diff] [blame] | 222 | if (r) |
Christian König | 9afdda8 | 2020-11-25 15:32:23 +0100 | [diff] [blame] | 223 | return r; |
Christian König | 88932a7 | 2016-06-06 10:17:53 +0200 | [diff] [blame] | 224 | |
Michel Dänzer | e1a575a | 2016-03-28 16:39:14 +0900 | [diff] [blame] | 225 | /* Can't move a pinned BO */ |
| 226 | rbo = container_of(bo, struct radeon_bo, tbo); |
Christian König | 0b8793f | 2020-09-21 13:18:02 +0200 | [diff] [blame] | 227 | if (WARN_ON_ONCE(rbo->tbo.pin_count > 0)) |
Michel Dänzer | e1a575a | 2016-03-28 16:39:14 +0900 | [diff] [blame] | 228 | return -EINVAL; |
| 229 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 230 | rdev = radeon_get_rdev(bo->bdev); |
| 231 | if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { |
Dave Airlie | ecfe695 | 2020-09-08 06:46:18 +1000 | [diff] [blame] | 232 | ttm_bo_move_null(bo, new_mem); |
Christian König | 9afdda8 | 2020-11-25 15:32:23 +0100 | [diff] [blame] | 233 | goto out; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 234 | } |
Dave Airlie | 51e50e5 | 2020-09-24 15:18:04 +1000 | [diff] [blame] | 235 | if (old_mem->mem_type == TTM_PL_SYSTEM && |
| 236 | new_mem->mem_type == TTM_PL_TT) { |
Dave Airlie | ecfe695 | 2020-09-08 06:46:18 +1000 | [diff] [blame] | 237 | ttm_bo_move_null(bo, new_mem); |
Christian König | 9afdda8 | 2020-11-25 15:32:23 +0100 | [diff] [blame] | 238 | goto out; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 239 | } |
Dave Airlie | 51e50e5 | 2020-09-24 15:18:04 +1000 | [diff] [blame] | 240 | |
| 241 | if (old_mem->mem_type == TTM_PL_TT && |
Dave Airlie | c37d951 | 2020-10-19 17:13:13 +1000 | [diff] [blame] | 242 | new_mem->mem_type == TTM_PL_SYSTEM) { |
Dave Airlie | 29a1d48 | 2020-10-20 11:03:15 +1000 | [diff] [blame] | 243 | radeon_ttm_tt_unbind(bo->bdev, bo->ttm); |
| 244 | ttm_resource_free(bo, &bo->mem); |
Dave Airlie | c37d951 | 2020-10-19 17:13:13 +1000 | [diff] [blame] | 245 | ttm_bo_assign_mem(bo, new_mem); |
Christian König | 9afdda8 | 2020-11-25 15:32:23 +0100 | [diff] [blame] | 246 | goto out; |
Dave Airlie | c37d951 | 2020-10-19 17:13:13 +1000 | [diff] [blame] | 247 | } |
Christian König | 9afdda8 | 2020-11-25 15:32:23 +0100 | [diff] [blame] | 248 | if (rdev->ring[radeon_copy_ring_index(rdev)].ready && |
| 249 | rdev->asic->copy.copy != NULL) { |
| 250 | if ((old_mem->mem_type == TTM_PL_SYSTEM && |
| 251 | new_mem->mem_type == TTM_PL_VRAM) || |
| 252 | (old_mem->mem_type == TTM_PL_VRAM && |
| 253 | new_mem->mem_type == TTM_PL_SYSTEM)) { |
| 254 | hop->fpfn = 0; |
| 255 | hop->lpfn = 0; |
| 256 | hop->mem_type = TTM_PL_TT; |
| 257 | hop->flags = 0; |
| 258 | return -EMULTIHOP; |
Marek Olšák | 67e8e3f | 2014-03-02 00:56:18 +0100 | [diff] [blame] | 259 | } |
Christian König | 9afdda8 | 2020-11-25 15:32:23 +0100 | [diff] [blame] | 260 | |
| 261 | r = radeon_move_blit(bo, evict, new_mem, old_mem); |
| 262 | } else { |
| 263 | r = -ENODEV; |
Michel Dänzer | 1ab2e10 | 2009-07-28 12:30:56 +0200 | [diff] [blame] | 264 | } |
Marek Olšák | 67e8e3f | 2014-03-02 00:56:18 +0100 | [diff] [blame] | 265 | |
Christian König | 9afdda8 | 2020-11-25 15:32:23 +0100 | [diff] [blame] | 266 | if (r) { |
| 267 | r = ttm_bo_move_memcpy(bo, ctx, new_mem); |
| 268 | if (r) |
| 269 | return r; |
| 270 | } |
| 271 | |
| 272 | out: |
Marek Olšák | 67e8e3f | 2014-03-02 00:56:18 +0100 | [diff] [blame] | 273 | /* update statistics */ |
Christian König | e11bfb9 | 2020-12-09 15:07:50 +0100 | [diff] [blame] | 274 | atomic64_add(bo->base.size, &rdev->num_bytes_moved); |
Christian König | 9afdda8 | 2020-11-25 15:32:23 +0100 | [diff] [blame] | 275 | radeon_bo_move_notify(bo, evict, new_mem); |
Marek Olšák | 67e8e3f | 2014-03-02 00:56:18 +0100 | [diff] [blame] | 276 | return 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 277 | } |
| 278 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 279 | static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem) |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 280 | { |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 281 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
Dave Airlie | ebb21aa | 2020-08-11 17:46:58 +1000 | [diff] [blame] | 282 | size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT; |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 283 | |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 284 | switch (mem->mem_type) { |
| 285 | case TTM_PL_SYSTEM: |
| 286 | /* system memory */ |
| 287 | return 0; |
| 288 | case TTM_PL_TT: |
Daniel Vetter | a7fb8a2 | 2015-09-09 16:45:52 +0200 | [diff] [blame] | 289 | #if IS_ENABLED(CONFIG_AGP) |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 290 | if (rdev->flags & RADEON_IS_AGP) { |
| 291 | /* RADEON_IS_AGP is set only if AGP is active */ |
Christian König | 54d04ea | 2020-09-07 13:44:36 +0200 | [diff] [blame] | 292 | mem->bus.offset = (mem->start << PAGE_SHIFT) + |
| 293 | rdev->mc.agp_base; |
Michel Dänzer | 365048ff | 2010-05-19 12:46:22 +0200 | [diff] [blame] | 294 | mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; |
Christian König | 1cf65c4 | 2020-09-30 11:17:44 +0200 | [diff] [blame] | 295 | mem->bus.caching = ttm_write_combined; |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 296 | } |
| 297 | #endif |
| 298 | break; |
| 299 | case TTM_PL_VRAM: |
Ben Skeggs | d961db7 | 2010-08-05 10:48:18 +1000 | [diff] [blame] | 300 | mem->bus.offset = mem->start << PAGE_SHIFT; |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 301 | /* check if it's visible */ |
Dave Airlie | ebb21aa | 2020-08-11 17:46:58 +1000 | [diff] [blame] | 302 | if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size) |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 303 | return -EINVAL; |
Christian König | 54d04ea | 2020-09-07 13:44:36 +0200 | [diff] [blame] | 304 | mem->bus.offset += rdev->mc.aper_base; |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 305 | mem->bus.is_iomem = true; |
Christian König | 1cf65c4 | 2020-09-30 11:17:44 +0200 | [diff] [blame] | 306 | mem->bus.caching = ttm_write_combined; |
Jay Estabrook | ffb57c4 | 2011-07-06 23:57:13 +0000 | [diff] [blame] | 307 | #ifdef __alpha__ |
| 308 | /* |
| 309 | * Alpha: use bus.addr to hold the ioremap() return, |
| 310 | * so we can modify bus.base below. |
| 311 | */ |
Christian König | ce65b87 | 2020-09-30 16:44:16 +0200 | [diff] [blame] | 312 | mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); |
Arvind Yadav | 3b2c6932 | 2017-01-24 14:46:16 +0530 | [diff] [blame] | 313 | if (!mem->bus.addr) |
| 314 | return -ENOMEM; |
Jay Estabrook | ffb57c4 | 2011-07-06 23:57:13 +0000 | [diff] [blame] | 315 | |
| 316 | /* |
| 317 | * Alpha: Use just the bus offset plus |
| 318 | * the hose/domain memory base for bus.base. |
| 319 | * It then can be used to build PTEs for VRAM |
| 320 | * access, as done in ttm_bo_vm_fault(). |
| 321 | */ |
Christian König | 54d04ea | 2020-09-07 13:44:36 +0200 | [diff] [blame] | 322 | mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) + |
Thomas Zimmermann | 5c1736c | 2021-01-12 09:10:34 +0100 | [diff] [blame] | 323 | rdev->hose->dense_mem_base; |
Jay Estabrook | ffb57c4 | 2011-07-06 23:57:13 +0000 | [diff] [blame] | 324 | #endif |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 325 | break; |
| 326 | default: |
| 327 | return -EINVAL; |
| 328 | } |
| 329 | return 0; |
| 330 | } |
| 331 | |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 332 | /* |
| 333 | * TTM backend functions. |
| 334 | */ |
| 335 | struct radeon_ttm_tt { |
Christian König | e34b8fe | 2020-10-21 14:06:49 +0200 | [diff] [blame] | 336 | struct ttm_tt ttm; |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 337 | u64 offset; |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 338 | |
| 339 | uint64_t userptr; |
| 340 | struct mm_struct *usermm; |
| 341 | uint32_t userflags; |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 342 | bool bound; |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 343 | }; |
| 344 | |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 345 | /* prepare the sg table with the user pages */ |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 346 | static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 347 | { |
Dave Airlie | 0a667b5 | 2020-08-25 09:46:00 +1000 | [diff] [blame] | 348 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 349 | struct radeon_ttm_tt *gtt = (void *)ttm; |
Marek Szyprowski | 7b81490 | 2020-06-19 12:36:17 +0200 | [diff] [blame] | 350 | unsigned pinned = 0; |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 351 | int r; |
| 352 | |
| 353 | int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); |
| 354 | enum dma_data_direction direction = write ? |
| 355 | DMA_BIDIRECTIONAL : DMA_TO_DEVICE; |
| 356 | |
| 357 | if (current->mm != gtt->usermm) |
| 358 | return -EPERM; |
| 359 | |
Christian König | ddd00e3 | 2014-08-07 09:36:01 +0200 | [diff] [blame] | 360 | if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { |
| 361 | /* check that we only pin down anonymous memory |
| 362 | to prevent problems with writeback */ |
xinhui pan | a441d7e | 2021-04-07 20:57:50 +0800 | [diff] [blame] | 363 | unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE; |
Christian König | ddd00e3 | 2014-08-07 09:36:01 +0200 | [diff] [blame] | 364 | struct vm_area_struct *vma; |
| 365 | vma = find_vma(gtt->usermm, gtt->userptr); |
| 366 | if (!vma || vma->vm_file || vma->vm_end < end) |
| 367 | return -EPERM; |
| 368 | } |
| 369 | |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 370 | do { |
| 371 | unsigned num_pages = ttm->num_pages - pinned; |
| 372 | uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; |
| 373 | struct page **pages = ttm->pages + pinned; |
| 374 | |
Lorenzo Stoakes | 768ae30 | 2016-10-13 01:20:16 +0100 | [diff] [blame] | 375 | r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, |
| 376 | pages, NULL); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 377 | if (r < 0) |
| 378 | goto release_pages; |
| 379 | |
| 380 | pinned += r; |
| 381 | |
| 382 | } while (pinned < ttm->num_pages); |
| 383 | |
| 384 | r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0, |
xinhui pan | a441d7e | 2021-04-07 20:57:50 +0800 | [diff] [blame] | 385 | (u64)ttm->num_pages << PAGE_SHIFT, |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 386 | GFP_KERNEL); |
| 387 | if (r) |
| 388 | goto release_sg; |
| 389 | |
Marek Szyprowski | 7b81490 | 2020-06-19 12:36:17 +0200 | [diff] [blame] | 390 | r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0); |
| 391 | if (r) |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 392 | goto release_sg; |
| 393 | |
Christian König | c67e627 | 2020-10-08 12:57:32 +0200 | [diff] [blame] | 394 | drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, |
| 395 | ttm->num_pages); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 396 | |
| 397 | return 0; |
| 398 | |
| 399 | release_sg: |
| 400 | kfree(ttm->sg); |
| 401 | |
| 402 | release_pages: |
Mel Gorman | c6f92f9 | 2017-11-15 17:37:55 -0800 | [diff] [blame] | 403 | release_pages(ttm->pages, pinned); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 404 | return r; |
| 405 | } |
| 406 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 407 | static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 408 | { |
Dave Airlie | 0a667b5 | 2020-08-25 09:46:00 +1000 | [diff] [blame] | 409 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 410 | struct radeon_ttm_tt *gtt = (void *)ttm; |
monk.liu | db12973 | 2015-05-05 09:24:17 +0200 | [diff] [blame] | 411 | struct sg_page_iter sg_iter; |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 412 | |
| 413 | int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); |
| 414 | enum dma_data_direction direction = write ? |
| 415 | DMA_BIDIRECTIONAL : DMA_TO_DEVICE; |
| 416 | |
Christian König | 863653f | 2015-03-31 17:36:57 +0200 | [diff] [blame] | 417 | /* double check that we don't free the table twice */ |
Guchun Chen | fd6ecc9 | 2021-03-30 22:02:06 +0800 | [diff] [blame] | 418 | if (!ttm->sg || !ttm->sg->sgl) |
Christian König | 863653f | 2015-03-31 17:36:57 +0200 | [diff] [blame] | 419 | return; |
| 420 | |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 421 | /* free the sg table and pages again */ |
Marek Szyprowski | 7b81490 | 2020-06-19 12:36:17 +0200 | [diff] [blame] | 422 | dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 423 | |
Marek Szyprowski | 7b81490 | 2020-06-19 12:36:17 +0200 | [diff] [blame] | 424 | for_each_sgtable_page(ttm->sg, &sg_iter, 0) { |
monk.liu | db12973 | 2015-05-05 09:24:17 +0200 | [diff] [blame] | 425 | struct page *page = sg_page_iter_page(&sg_iter); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 426 | if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) |
| 427 | set_page_dirty(page); |
| 428 | |
| 429 | mark_page_accessed(page); |
Kirill A. Shutemov | 09cbfea | 2016-04-01 15:29:47 +0300 | [diff] [blame] | 430 | put_page(page); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 431 | } |
| 432 | |
| 433 | sg_free_table(ttm->sg); |
| 434 | } |
| 435 | |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 436 | static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm) |
| 437 | { |
| 438 | struct radeon_ttm_tt *gtt = (void*)ttm; |
| 439 | |
| 440 | return (gtt->bound); |
| 441 | } |
| 442 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 443 | static int radeon_ttm_backend_bind(struct ttm_device *bdev, |
Dave Airlie | 0a667b5 | 2020-08-25 09:46:00 +1000 | [diff] [blame] | 444 | struct ttm_tt *ttm, |
Dave Airlie | 2966141 | 2020-08-04 12:56:32 +1000 | [diff] [blame] | 445 | struct ttm_resource *bo_mem) |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 446 | { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 447 | struct radeon_ttm_tt *gtt = (void*)ttm; |
Dave Airlie | 0a667b5 | 2020-08-25 09:46:00 +1000 | [diff] [blame] | 448 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
Michel Dänzer | 77497f2 | 2014-07-17 19:01:07 +0900 | [diff] [blame] | 449 | uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ | |
| 450 | RADEON_GART_PAGE_WRITE; |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 451 | int r; |
| 452 | |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 453 | if (gtt->bound) |
| 454 | return 0; |
| 455 | |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 456 | if (gtt->userptr) { |
Dave Airlie | 0a667b5 | 2020-08-25 09:46:00 +1000 | [diff] [blame] | 457 | radeon_ttm_tt_pin_userptr(bdev, ttm); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 458 | flags &= ~RADEON_GART_PAGE_WRITE; |
| 459 | } |
| 460 | |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 461 | gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); |
| 462 | if (!ttm->num_pages) { |
Christian König | 230c079 | 2020-10-20 20:10:39 +0200 | [diff] [blame] | 463 | WARN(1, "nothing to bind %u pages for mreg %p back %p!\n", |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 464 | ttm->num_pages, bo_mem, ttm); |
| 465 | } |
Christian König | 1b4ea4c | 2020-09-30 10:38:48 +0200 | [diff] [blame] | 466 | if (ttm->caching == ttm_cached) |
Michel Dänzer | 77497f2 | 2014-07-17 19:01:07 +0900 | [diff] [blame] | 467 | flags |= RADEON_GART_PAGE_SNOOP; |
Dave Airlie | 8e6c0a2 | 2020-08-25 09:08:11 +1000 | [diff] [blame] | 468 | r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, |
Michel Dänzer | 77497f2 | 2014-07-17 19:01:07 +0900 | [diff] [blame] | 469 | ttm->pages, gtt->ttm.dma_address, flags); |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 470 | if (r) { |
Christian König | 230c079 | 2020-10-20 20:10:39 +0200 | [diff] [blame] | 471 | DRM_ERROR("failed to bind %u pages at 0x%08X\n", |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 472 | ttm->num_pages, (unsigned)gtt->offset); |
| 473 | return r; |
| 474 | } |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 475 | gtt->bound = true; |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 476 | return 0; |
| 477 | } |
| 478 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 479 | static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm) |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 480 | { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 481 | struct radeon_ttm_tt *gtt = (void *)ttm; |
Dave Airlie | 0a667b5 | 2020-08-25 09:46:00 +1000 | [diff] [blame] | 482 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 483 | |
Daniel Gomez | 5aeaa43 | 2021-03-18 09:32:36 +0100 | [diff] [blame] | 484 | if (gtt->userptr) |
| 485 | radeon_ttm_tt_unpin_userptr(bdev, ttm); |
| 486 | |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 487 | if (!gtt->bound) |
| 488 | return; |
| 489 | |
Dave Airlie | 8e6c0a2 | 2020-08-25 09:08:11 +1000 | [diff] [blame] | 490 | radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 491 | |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 492 | gtt->bound = false; |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 493 | } |
| 494 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 495 | static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm) |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 496 | { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 497 | struct radeon_ttm_tt *gtt = (void *)ttm; |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 498 | |
Dave Airlie | 37bff65 | 2020-09-17 13:24:50 +1000 | [diff] [blame] | 499 | radeon_ttm_backend_unbind(bdev, ttm); |
Dave Airlie | 7626168 | 2020-09-17 13:20:48 +1000 | [diff] [blame] | 500 | ttm_tt_destroy_common(bdev, ttm); |
| 501 | |
Christian König | e34b8fe | 2020-10-21 14:06:49 +0200 | [diff] [blame] | 502 | ttm_tt_fini(>t->ttm); |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 503 | kfree(gtt); |
| 504 | } |
| 505 | |
Christian König | dde5da2 | 2018-02-22 10:18:14 +0100 | [diff] [blame] | 506 | static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, |
| 507 | uint32_t page_flags) |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 508 | { |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 509 | struct radeon_ttm_tt *gtt; |
Christian König | 1b4ea4c | 2020-09-30 10:38:48 +0200 | [diff] [blame] | 510 | enum ttm_caching caching; |
| 511 | struct radeon_bo *rbo; |
Daniel Vetter | a7fb8a2 | 2015-09-09 16:45:52 +0200 | [diff] [blame] | 512 | #if IS_ENABLED(CONFIG_AGP) |
Lee Jones | 92378a4 | 2020-11-13 00:06:52 -0500 | [diff] [blame] | 513 | struct radeon_device *rdev = radeon_get_rdev(bo->bdev); |
| 514 | |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 515 | if (rdev->flags & RADEON_IS_AGP) { |
Christian König | dde5da2 | 2018-02-22 10:18:14 +0100 | [diff] [blame] | 516 | return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, |
| 517 | page_flags); |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 518 | } |
| 519 | #endif |
Lee Jones | 92378a4 | 2020-11-13 00:06:52 -0500 | [diff] [blame] | 520 | rbo = container_of(bo, struct radeon_bo, tbo); |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 521 | |
| 522 | gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); |
| 523 | if (gtt == NULL) { |
| 524 | return NULL; |
| 525 | } |
Christian König | 1b4ea4c | 2020-09-30 10:38:48 +0200 | [diff] [blame] | 526 | |
| 527 | if (rbo->flags & RADEON_GEM_GTT_UC) |
| 528 | caching = ttm_uncached; |
| 529 | else if (rbo->flags & RADEON_GEM_GTT_WC) |
| 530 | caching = ttm_write_combined; |
| 531 | else |
| 532 | caching = ttm_cached; |
| 533 | |
Christian König | 0575ff3 | 2020-10-08 13:01:35 +0200 | [diff] [blame] | 534 | if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 535 | kfree(gtt); |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 536 | return NULL; |
| 537 | } |
Christian König | e34b8fe | 2020-10-21 14:06:49 +0200 | [diff] [blame] | 538 | return >t->ttm; |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 539 | } |
| 540 | |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 541 | static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, |
| 542 | struct ttm_tt *ttm) |
Christian König | 3840a65 | 2014-09-17 04:00:05 -0600 | [diff] [blame] | 543 | { |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 544 | #if IS_ENABLED(CONFIG_AGP) |
| 545 | if (rdev->flags & RADEON_IS_AGP) |
Christian König | 3840a65 | 2014-09-17 04:00:05 -0600 | [diff] [blame] | 546 | return NULL; |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 547 | #endif |
| 548 | |
| 549 | if (!ttm) |
| 550 | return NULL; |
Christian König | e34b8fe | 2020-10-21 14:06:49 +0200 | [diff] [blame] | 551 | return container_of(ttm, struct radeon_ttm_tt, ttm); |
Christian König | 3840a65 | 2014-09-17 04:00:05 -0600 | [diff] [blame] | 552 | } |
| 553 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 554 | static int radeon_ttm_tt_populate(struct ttm_device *bdev, |
Dave Airlie | 0a667b5 | 2020-08-25 09:46:00 +1000 | [diff] [blame] | 555 | struct ttm_tt *ttm, |
| 556 | struct ttm_operation_ctx *ctx) |
Konrad Rzeszutek Wilk | c52494f | 2011-10-17 17:15:08 -0400 | [diff] [blame] | 557 | { |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 558 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
| 559 | struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); |
Alex Deucher | 40f5cf9 | 2012-05-10 18:33:13 -0400 | [diff] [blame] | 560 | bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); |
Konrad Rzeszutek Wilk | c52494f | 2011-10-17 17:15:08 -0400 | [diff] [blame] | 561 | |
Christian König | 3840a65 | 2014-09-17 04:00:05 -0600 | [diff] [blame] | 562 | if (gtt && gtt->userptr) { |
Maninder Singh | 69ee241 | 2015-06-19 09:35:23 +0530 | [diff] [blame] | 563 | ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 564 | if (!ttm->sg) |
| 565 | return -ENOMEM; |
| 566 | |
| 567 | ttm->page_flags |= TTM_PAGE_FLAG_SG; |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 568 | return 0; |
| 569 | } |
| 570 | |
Alex Deucher | 40f5cf9 | 2012-05-10 18:33:13 -0400 | [diff] [blame] | 571 | if (slave && ttm->sg) { |
Christian König | c67e627 | 2020-10-08 12:57:32 +0200 | [diff] [blame] | 572 | drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, |
| 573 | ttm->num_pages); |
Alex Deucher | 40f5cf9 | 2012-05-10 18:33:13 -0400 | [diff] [blame] | 574 | return 0; |
| 575 | } |
| 576 | |
Christian König | 0fe3cf3 | 2020-10-24 13:12:23 +0200 | [diff] [blame] | 577 | return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx); |
Konrad Rzeszutek Wilk | c52494f | 2011-10-17 17:15:08 -0400 | [diff] [blame] | 578 | } |
| 579 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 580 | static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm) |
Konrad Rzeszutek Wilk | c52494f | 2011-10-17 17:15:08 -0400 | [diff] [blame] | 581 | { |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 582 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
| 583 | struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); |
Alex Deucher | 40f5cf9 | 2012-05-10 18:33:13 -0400 | [diff] [blame] | 584 | bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); |
| 585 | |
Christian König | 3840a65 | 2014-09-17 04:00:05 -0600 | [diff] [blame] | 586 | if (gtt && gtt->userptr) { |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 587 | kfree(ttm->sg); |
| 588 | ttm->page_flags &= ~TTM_PAGE_FLAG_SG; |
| 589 | return; |
| 590 | } |
| 591 | |
Alex Deucher | 40f5cf9 | 2012-05-10 18:33:13 -0400 | [diff] [blame] | 592 | if (slave) |
| 593 | return; |
Konrad Rzeszutek Wilk | c52494f | 2011-10-17 17:15:08 -0400 | [diff] [blame] | 594 | |
Christian König | 0fe3cf3 | 2020-10-24 13:12:23 +0200 | [diff] [blame] | 595 | return ttm_pool_free(&rdev->mman.bdev.pool, ttm); |
Konrad Rzeszutek Wilk | c52494f | 2011-10-17 17:15:08 -0400 | [diff] [blame] | 596 | } |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 597 | |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 598 | int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, |
| 599 | struct ttm_tt *ttm, uint64_t addr, |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 600 | uint32_t flags) |
| 601 | { |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 602 | struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 603 | |
| 604 | if (gtt == NULL) |
| 605 | return -EINVAL; |
| 606 | |
| 607 | gtt->userptr = addr; |
| 608 | gtt->usermm = current->mm; |
| 609 | gtt->userflags = flags; |
| 610 | return 0; |
| 611 | } |
| 612 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 613 | bool radeon_ttm_tt_is_bound(struct ttm_device *bdev, |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 614 | struct ttm_tt *ttm) |
| 615 | { |
| 616 | #if IS_ENABLED(CONFIG_AGP) |
| 617 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
| 618 | if (rdev->flags & RADEON_IS_AGP) |
| 619 | return ttm_agp_is_bound(ttm); |
| 620 | #endif |
| 621 | return radeon_ttm_backend_is_bound(ttm); |
| 622 | } |
| 623 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 624 | static int radeon_ttm_tt_bind(struct ttm_device *bdev, |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 625 | struct ttm_tt *ttm, |
| 626 | struct ttm_resource *bo_mem) |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 627 | { |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 628 | #if IS_ENABLED(CONFIG_AGP) |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 629 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 630 | #endif |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 631 | |
Dave Airlie | 0b988ca | 2020-09-17 12:54:24 +1000 | [diff] [blame] | 632 | if (!bo_mem) |
| 633 | return -EINVAL; |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 634 | #if IS_ENABLED(CONFIG_AGP) |
| 635 | if (rdev->flags & RADEON_IS_AGP) |
Dave Airlie | 48efa57 | 2020-09-08 06:46:29 +1000 | [diff] [blame] | 636 | return ttm_agp_bind(ttm, bo_mem); |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 637 | #endif |
| 638 | |
| 639 | return radeon_ttm_backend_bind(bdev, ttm, bo_mem); |
| 640 | } |
| 641 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 642 | static void radeon_ttm_tt_unbind(struct ttm_device *bdev, |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 643 | struct ttm_tt *ttm) |
| 644 | { |
| 645 | #if IS_ENABLED(CONFIG_AGP) |
| 646 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
| 647 | |
| 648 | if (rdev->flags & RADEON_IS_AGP) { |
Dave Airlie | 48efa57 | 2020-09-08 06:46:29 +1000 | [diff] [blame] | 649 | ttm_agp_unbind(ttm); |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 650 | return; |
| 651 | } |
| 652 | #endif |
| 653 | radeon_ttm_backend_unbind(bdev, ttm); |
| 654 | } |
| 655 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 656 | static void radeon_ttm_tt_destroy(struct ttm_device *bdev, |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 657 | struct ttm_tt *ttm) |
| 658 | { |
| 659 | #if IS_ENABLED(CONFIG_AGP) |
| 660 | struct radeon_device *rdev = radeon_get_rdev(bdev); |
| 661 | |
| 662 | if (rdev->flags & RADEON_IS_AGP) { |
Dave Airlie | 37bff65 | 2020-09-17 13:24:50 +1000 | [diff] [blame] | 663 | ttm_agp_unbind(ttm); |
Dave Airlie | 7626168 | 2020-09-17 13:20:48 +1000 | [diff] [blame] | 664 | ttm_tt_destroy_common(bdev, ttm); |
Dave Airlie | 48efa57 | 2020-09-08 06:46:29 +1000 | [diff] [blame] | 665 | ttm_agp_destroy(ttm); |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 666 | return; |
| 667 | } |
| 668 | #endif |
| 669 | radeon_ttm_backend_destroy(bdev, ttm); |
| 670 | } |
| 671 | |
| 672 | bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, |
| 673 | struct ttm_tt *ttm) |
| 674 | { |
| 675 | struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 676 | |
| 677 | if (gtt == NULL) |
| 678 | return false; |
| 679 | |
| 680 | return !!gtt->userptr; |
| 681 | } |
| 682 | |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 683 | bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, |
| 684 | struct ttm_tt *ttm) |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 685 | { |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 686 | struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); |
Christian König | f72a113a | 2014-08-07 09:36:00 +0200 | [diff] [blame] | 687 | |
| 688 | if (gtt == NULL) |
| 689 | return false; |
| 690 | |
| 691 | return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); |
| 692 | } |
| 693 | |
Dave Airlie | 6a6e598 | 2020-10-21 14:40:29 +1000 | [diff] [blame] | 694 | static void |
| 695 | radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo) |
| 696 | { |
| 697 | radeon_bo_move_notify(bo, false, NULL); |
| 698 | } |
| 699 | |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 700 | static struct ttm_device_funcs radeon_bo_driver = { |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 701 | .ttm_tt_create = &radeon_ttm_tt_create, |
Konrad Rzeszutek Wilk | c52494f | 2011-10-17 17:15:08 -0400 | [diff] [blame] | 702 | .ttm_tt_populate = &radeon_ttm_tt_populate, |
| 703 | .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, |
Dave Airlie | a68bb19 | 2020-09-08 06:46:22 +1000 | [diff] [blame] | 704 | .ttm_tt_destroy = &radeon_ttm_tt_destroy, |
Christian König | a2ab19fe | 2016-08-30 17:26:04 +0200 | [diff] [blame] | 705 | .eviction_valuable = ttm_bo_eviction_valuable, |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 706 | .evict_flags = &radeon_evict_flags, |
| 707 | .move = &radeon_bo_move, |
| 708 | .verify_access = &radeon_verify_access, |
Dave Airlie | 6a6e598 | 2020-10-21 14:40:29 +1000 | [diff] [blame] | 709 | .delete_mem_notify = &radeon_bo_delete_mem_notify, |
Jerome Glisse | 0a2d50e | 2010-04-09 14:39:24 +0200 | [diff] [blame] | 710 | .io_mem_reserve = &radeon_ttm_io_mem_reserve, |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 711 | }; |
| 712 | |
| 713 | int radeon_ttm_init(struct radeon_device *rdev) |
| 714 | { |
| 715 | int r; |
| 716 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 717 | /* No others user of address space so set it to 0 */ |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 718 | r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, |
David Herrmann | 44d847b | 2013-08-13 19:10:30 +0200 | [diff] [blame] | 719 | rdev->ddev->anon_inode->i_mapping, |
Gerd Hoffmann | 8b53e1c | 2019-09-05 09:05:05 +0200 | [diff] [blame] | 720 | rdev->ddev->vma_offset_manager, |
Christian König | ee5d2a8 | 2020-10-24 13:10:28 +0200 | [diff] [blame] | 721 | rdev->need_swiotlb, |
Christoph Hellwig | 33b3ad3 | 2019-08-15 09:27:00 +0200 | [diff] [blame] | 722 | dma_addressing_limited(&rdev->pdev->dev)); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 723 | if (r) { |
| 724 | DRM_ERROR("failed initializing buffer object driver(%d).\n", r); |
| 725 | return r; |
| 726 | } |
Jerome Glisse | 0a0c759 | 2009-12-11 20:36:19 +0100 | [diff] [blame] | 727 | rdev->mman.initialized = true; |
Christian König | b0691b3 | 2020-07-23 11:47:57 +0200 | [diff] [blame] | 728 | |
| 729 | r = radeon_ttm_init_vram(rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 730 | if (r) { |
| 731 | DRM_ERROR("Failed initializing VRAM heap.\n"); |
| 732 | return r; |
| 733 | } |
Lauri Kasanen | 14eedc3 | 2014-02-28 20:50:23 +0200 | [diff] [blame] | 734 | /* Change the size here instead of the init above so only lpfn is affected */ |
| 735 | radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); |
| 736 | |
Daniel Vetter | 441921d | 2011-02-18 17:59:16 +0100 | [diff] [blame] | 737 | r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, |
Maarten Lankhorst | 831b696 | 2014-09-18 14:11:56 +0200 | [diff] [blame] | 738 | RADEON_GEM_DOMAIN_VRAM, 0, NULL, |
Kent Russell | 4aa5b92 | 2017-08-08 07:48:52 -0400 | [diff] [blame] | 739 | NULL, &rdev->stolen_vga_memory); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 740 | if (r) { |
| 741 | return r; |
| 742 | } |
Kent Russell | 4aa5b92 | 2017-08-08 07:48:52 -0400 | [diff] [blame] | 743 | r = radeon_bo_reserve(rdev->stolen_vga_memory, false); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 744 | if (r) |
| 745 | return r; |
Kent Russell | 4aa5b92 | 2017-08-08 07:48:52 -0400 | [diff] [blame] | 746 | r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); |
| 747 | radeon_bo_unreserve(rdev->stolen_vga_memory); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 748 | if (r) { |
Kent Russell | 4aa5b92 | 2017-08-08 07:48:52 -0400 | [diff] [blame] | 749 | radeon_bo_unref(&rdev->stolen_vga_memory); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 750 | return r; |
| 751 | } |
| 752 | DRM_INFO("radeon: %uM of VRAM memory ready\n", |
Niels Ole Salscheider | fc98603 | 2013-05-18 21:19:23 +0200 | [diff] [blame] | 753 | (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); |
Christian König | b0691b3 | 2020-07-23 11:47:57 +0200 | [diff] [blame] | 754 | |
| 755 | r = radeon_ttm_init_gtt(rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 756 | if (r) { |
| 757 | DRM_ERROR("Failed initializing GTT heap.\n"); |
| 758 | return r; |
| 759 | } |
| 760 | DRM_INFO("radeon: %uM of GTT memory ready.\n", |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 761 | (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 762 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 763 | radeon_ttm_debugfs_init(rdev); |
| 764 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 765 | return 0; |
| 766 | } |
| 767 | |
| 768 | void radeon_ttm_fini(struct radeon_device *rdev) |
| 769 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 770 | int r; |
| 771 | |
Jerome Glisse | 0a0c759 | 2009-12-11 20:36:19 +0100 | [diff] [blame] | 772 | if (!rdev->mman.initialized) |
| 773 | return; |
Nirmoy Das | ba3d940 | 2021-02-10 16:19:20 +0100 | [diff] [blame] | 774 | |
Kent Russell | 4aa5b92 | 2017-08-08 07:48:52 -0400 | [diff] [blame] | 775 | if (rdev->stolen_vga_memory) { |
| 776 | r = radeon_bo_reserve(rdev->stolen_vga_memory, false); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 777 | if (r == 0) { |
Kent Russell | 4aa5b92 | 2017-08-08 07:48:52 -0400 | [diff] [blame] | 778 | radeon_bo_unpin(rdev->stolen_vga_memory); |
| 779 | radeon_bo_unreserve(rdev->stolen_vga_memory); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 780 | } |
Kent Russell | 4aa5b92 | 2017-08-08 07:48:52 -0400 | [diff] [blame] | 781 | radeon_bo_unref(&rdev->stolen_vga_memory); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 782 | } |
Dave Airlie | 3720589 | 2020-08-04 12:56:19 +1000 | [diff] [blame] | 783 | ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM); |
| 784 | ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT); |
Christian König | 8af8a10 | 2020-10-01 14:51:40 +0200 | [diff] [blame] | 785 | ttm_device_fini(&rdev->mman.bdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 786 | radeon_gart_fini(rdev); |
Jerome Glisse | 0a0c759 | 2009-12-11 20:36:19 +0100 | [diff] [blame] | 787 | rdev->mman.initialized = false; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 788 | DRM_INFO("radeon: ttm finalized\n"); |
| 789 | } |
| 790 | |
Dave Airlie | 5359533 | 2011-03-14 09:47:24 +1000 | [diff] [blame] | 791 | /* this should only be called at bootup or when userspace |
| 792 | * isn't running */ |
| 793 | void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) |
| 794 | { |
Dave Airlie | 9de59bc | 2020-08-04 12:56:31 +1000 | [diff] [blame] | 795 | struct ttm_resource_manager *man; |
Dave Airlie | 5359533 | 2011-03-14 09:47:24 +1000 | [diff] [blame] | 796 | |
| 797 | if (!rdev->mman.initialized) |
| 798 | return; |
| 799 | |
Dave Airlie | 47c0550 | 2020-08-04 12:56:14 +1000 | [diff] [blame] | 800 | man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM); |
Dave Airlie | 5359533 | 2011-03-14 09:47:24 +1000 | [diff] [blame] | 801 | /* this just adjusts TTM size idea, which sets lpfn to the correct value */ |
| 802 | man->size = size >> PAGE_SHIFT; |
| 803 | } |
| 804 | |
Souptick Joarder | 2bfb0b6 | 2018-04-16 19:13:51 +0530 | [diff] [blame] | 805 | static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 806 | { |
Christian König | 8e0310f | 2020-09-25 14:17:09 +0200 | [diff] [blame] | 807 | struct ttm_buffer_object *bo = vmf->vma->vm_private_data; |
| 808 | struct radeon_device *rdev = radeon_get_rdev(bo->bdev); |
Souptick Joarder | 2bfb0b6 | 2018-04-16 19:13:51 +0530 | [diff] [blame] | 809 | vm_fault_t ret; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 810 | |
Christian König | db7fce3 | 2012-05-11 14:57:18 +0200 | [diff] [blame] | 811 | down_read(&rdev->pm.mclk_lock); |
Christian König | 8e0310f | 2020-09-25 14:17:09 +0200 | [diff] [blame] | 812 | |
| 813 | ret = ttm_bo_vm_reserve(bo, vmf); |
| 814 | if (ret) |
| 815 | goto unlock_mclk; |
| 816 | |
| 817 | ret = radeon_bo_fault_reserve_notify(bo); |
| 818 | if (ret) |
| 819 | goto unlock_resv; |
| 820 | |
| 821 | ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot, |
| 822 | TTM_BO_VM_NUM_PREFAULT, 1); |
| 823 | if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) |
| 824 | goto unlock_mclk; |
| 825 | |
| 826 | unlock_resv: |
| 827 | dma_resv_unlock(bo->base.resv); |
| 828 | |
| 829 | unlock_mclk: |
Christian König | db7fce3 | 2012-05-11 14:57:18 +0200 | [diff] [blame] | 830 | up_read(&rdev->pm.mclk_lock); |
Souptick Joarder | 2bfb0b6 | 2018-04-16 19:13:51 +0530 | [diff] [blame] | 831 | return ret; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 832 | } |
| 833 | |
Rikard Falkeborn | b6d4abc | 2021-02-10 00:48:16 +0100 | [diff] [blame] | 834 | static const struct vm_operations_struct radeon_ttm_vm_ops = { |
Christian König | 165d344 | 2019-09-27 14:34:25 +0200 | [diff] [blame] | 835 | .fault = radeon_ttm_fault, |
| 836 | .open = ttm_bo_vm_open, |
| 837 | .close = ttm_bo_vm_close, |
| 838 | .access = ttm_bo_vm_access |
| 839 | }; |
| 840 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 841 | int radeon_mmap(struct file *filp, struct vm_area_struct *vma) |
| 842 | { |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 843 | int r; |
Thomas Zimmermann | bed2dd8 | 2019-02-07 09:59:30 +0100 | [diff] [blame] | 844 | struct drm_file *file_priv = filp->private_data; |
| 845 | struct radeon_device *rdev = file_priv->minor->dev->dev_private; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 846 | |
Christian König | 165d344 | 2019-09-27 14:34:25 +0200 | [diff] [blame] | 847 | if (rdev == NULL) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 848 | return -EINVAL; |
Christian König | 165d344 | 2019-09-27 14:34:25 +0200 | [diff] [blame] | 849 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 850 | r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev); |
Christian König | 165d344 | 2019-09-27 14:34:25 +0200 | [diff] [blame] | 851 | if (unlikely(r != 0)) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 852 | return r; |
Christian König | 165d344 | 2019-09-27 14:34:25 +0200 | [diff] [blame] | 853 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 854 | vma->vm_ops = &radeon_ttm_vm_ops; |
| 855 | return 0; |
| 856 | } |
| 857 | |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 858 | #if defined(CONFIG_DEBUG_FS) |
Christian König | 893d6e6 | 2013-12-12 09:42:40 +0100 | [diff] [blame] | 859 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 860 | static int radeon_mm_vram_dump_table_show(struct seq_file *m, void *unused) |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 861 | { |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 862 | struct radeon_device *rdev = (struct radeon_device *)m->private; |
| 863 | struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, |
| 864 | TTM_PL_VRAM); |
Daniel Vetter | b5c3714 | 2016-12-29 12:09:24 +0100 | [diff] [blame] | 865 | struct drm_printer p = drm_seq_file_printer(m); |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 866 | |
Christian König | bbbb29e | 2017-08-07 14:03:54 +0200 | [diff] [blame] | 867 | man->func->debug(man, &p); |
Daniel Vetter | b5c3714 | 2016-12-29 12:09:24 +0100 | [diff] [blame] | 868 | return 0; |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 869 | } |
Christian König | 893d6e6 | 2013-12-12 09:42:40 +0100 | [diff] [blame] | 870 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 871 | static int radeon_ttm_page_pool_show(struct seq_file *m, void *data) |
Christian König | 0fe3cf3 | 2020-10-24 13:12:23 +0200 | [diff] [blame] | 872 | { |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 873 | struct radeon_device *rdev = (struct radeon_device *)m->private; |
Christian König | 0fe3cf3 | 2020-10-24 13:12:23 +0200 | [diff] [blame] | 874 | |
| 875 | return ttm_pool_debugfs(&rdev->mman.bdev.pool, m); |
| 876 | } |
Christian König | bbbb29e | 2017-08-07 14:03:54 +0200 | [diff] [blame] | 877 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 878 | static int radeon_mm_gtt_dump_table_show(struct seq_file *m, void *unused) |
| 879 | { |
| 880 | struct radeon_device *rdev = (struct radeon_device *)m->private; |
| 881 | struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, |
| 882 | TTM_PL_TT); |
| 883 | struct drm_printer p = drm_seq_file_printer(m); |
Christian König | 893d6e6 | 2013-12-12 09:42:40 +0100 | [diff] [blame] | 884 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 885 | man->func->debug(man, &p); |
| 886 | return 0; |
| 887 | } |
| 888 | |
| 889 | DEFINE_SHOW_ATTRIBUTE(radeon_mm_vram_dump_table); |
| 890 | DEFINE_SHOW_ATTRIBUTE(radeon_mm_gtt_dump_table); |
| 891 | DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool); |
Christian König | 893d6e6 | 2013-12-12 09:42:40 +0100 | [diff] [blame] | 892 | |
Christian König | 2014b56 | 2013-12-18 21:07:39 +0100 | [diff] [blame] | 893 | static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) |
| 894 | { |
| 895 | struct radeon_device *rdev = inode->i_private; |
| 896 | i_size_write(inode, rdev->mc.mc_vram_size); |
| 897 | filep->private_data = inode->i_private; |
| 898 | return 0; |
| 899 | } |
| 900 | |
| 901 | static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, |
| 902 | size_t size, loff_t *pos) |
| 903 | { |
| 904 | struct radeon_device *rdev = f->private_data; |
| 905 | ssize_t result = 0; |
| 906 | int r; |
| 907 | |
| 908 | if (size & 0x3 || *pos & 0x3) |
| 909 | return -EINVAL; |
| 910 | |
| 911 | while (size) { |
| 912 | unsigned long flags; |
| 913 | uint32_t value; |
| 914 | |
| 915 | if (*pos >= rdev->mc.mc_vram_size) |
| 916 | return result; |
| 917 | |
| 918 | spin_lock_irqsave(&rdev->mmio_idx_lock, flags); |
| 919 | WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); |
| 920 | if (rdev->family >= CHIP_CEDAR) |
| 921 | WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); |
| 922 | value = RREG32(RADEON_MM_DATA); |
| 923 | spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); |
| 924 | |
Christian König | 8b1c715 | 2021-03-08 19:15:42 +0100 | [diff] [blame] | 925 | r = put_user(value, (uint32_t __user *)buf); |
Christian König | 2014b56 | 2013-12-18 21:07:39 +0100 | [diff] [blame] | 926 | if (r) |
| 927 | return r; |
| 928 | |
| 929 | result += 4; |
| 930 | buf += 4; |
| 931 | *pos += 4; |
| 932 | size -= 4; |
| 933 | } |
| 934 | |
| 935 | return result; |
| 936 | } |
| 937 | |
| 938 | static const struct file_operations radeon_ttm_vram_fops = { |
| 939 | .owner = THIS_MODULE, |
| 940 | .open = radeon_ttm_vram_open, |
| 941 | .read = radeon_ttm_vram_read, |
| 942 | .llseek = default_llseek |
| 943 | }; |
| 944 | |
Christian König | dd66d20 | 2013-12-18 21:07:40 +0100 | [diff] [blame] | 945 | static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) |
| 946 | { |
| 947 | struct radeon_device *rdev = inode->i_private; |
| 948 | i_size_write(inode, rdev->mc.gtt_size); |
| 949 | filep->private_data = inode->i_private; |
| 950 | return 0; |
| 951 | } |
| 952 | |
| 953 | static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, |
| 954 | size_t size, loff_t *pos) |
| 955 | { |
| 956 | struct radeon_device *rdev = f->private_data; |
| 957 | ssize_t result = 0; |
| 958 | int r; |
| 959 | |
| 960 | while (size) { |
| 961 | loff_t p = *pos / PAGE_SIZE; |
| 962 | unsigned off = *pos & ~PAGE_MASK; |
Paul Bolle | 0d997b6 | 2014-03-04 10:34:48 +0100 | [diff] [blame] | 963 | size_t cur_size = min_t(size_t, size, PAGE_SIZE - off); |
Christian König | dd66d20 | 2013-12-18 21:07:40 +0100 | [diff] [blame] | 964 | struct page *page; |
| 965 | void *ptr; |
| 966 | |
| 967 | if (p >= rdev->gart.num_cpu_pages) |
| 968 | return result; |
| 969 | |
| 970 | page = rdev->gart.pages[p]; |
| 971 | if (page) { |
| 972 | ptr = kmap(page); |
| 973 | ptr += off; |
| 974 | |
| 975 | r = copy_to_user(buf, ptr, cur_size); |
| 976 | kunmap(rdev->gart.pages[p]); |
| 977 | } else |
| 978 | r = clear_user(buf, cur_size); |
| 979 | |
| 980 | if (r) |
| 981 | return -EFAULT; |
| 982 | |
| 983 | result += cur_size; |
| 984 | buf += cur_size; |
| 985 | *pos += cur_size; |
| 986 | size -= cur_size; |
| 987 | } |
| 988 | |
| 989 | return result; |
| 990 | } |
| 991 | |
| 992 | static const struct file_operations radeon_ttm_gtt_fops = { |
| 993 | .owner = THIS_MODULE, |
| 994 | .open = radeon_ttm_gtt_open, |
| 995 | .read = radeon_ttm_gtt_read, |
| 996 | .llseek = default_llseek |
| 997 | }; |
| 998 | |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 999 | #endif |
| 1000 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 1001 | static void radeon_ttm_debugfs_init(struct radeon_device *rdev) |
Dave Airlie | fa8a123 | 2009-08-26 13:13:37 +1000 | [diff] [blame] | 1002 | { |
Mikael Pettersson | f4e45d0 | 2009-09-28 18:27:23 +0200 | [diff] [blame] | 1003 | #if defined(CONFIG_DEBUG_FS) |
Christian König | 2014b56 | 2013-12-18 21:07:39 +0100 | [diff] [blame] | 1004 | struct drm_minor *minor = rdev->ddev->primary; |
Greg Kroah-Hartman | bb1d26b | 2019-06-13 13:56:31 +0200 | [diff] [blame] | 1005 | struct dentry *root = minor->debugfs_root; |
Christian König | 2014b56 | 2013-12-18 21:07:39 +0100 | [diff] [blame] | 1006 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 1007 | debugfs_create_file("radeon_vram", 0444, root, rdev, |
Nirmoy Das | ba3d940 | 2021-02-10 16:19:20 +0100 | [diff] [blame] | 1008 | &radeon_ttm_vram_fops); |
Christian König | 2014b56 | 2013-12-18 21:07:39 +0100 | [diff] [blame] | 1009 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 1010 | debugfs_create_file("radeon_gtt", 0444, root, rdev, |
Nirmoy Das | ba3d940 | 2021-02-10 16:19:20 +0100 | [diff] [blame] | 1011 | &radeon_ttm_gtt_fops); |
Christian König | dd66d20 | 2013-12-18 21:07:40 +0100 | [diff] [blame] | 1012 | |
Nirmoy Das | 5b54d67 | 2021-02-17 18:34:30 -0500 | [diff] [blame] | 1013 | debugfs_create_file("radeon_vram_mm", 0444, root, rdev, |
| 1014 | &radeon_mm_vram_dump_table_fops); |
| 1015 | debugfs_create_file("radeon_gtt_mm", 0444, root, rdev, |
| 1016 | &radeon_mm_gtt_dump_table_fops); |
| 1017 | debugfs_create_file("ttm_page_pool", 0444, root, rdev, |
| 1018 | &radeon_ttm_page_pool_fops); |
Christian König | 2014b56 | 2013-12-18 21:07:39 +0100 | [diff] [blame] | 1019 | #endif |
| 1020 | } |