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Thomas Gleixner1802d0b2019-05-27 08:55:21 +02001/* SPDX-License-Identifier: GPL-2.0-only */
CK Hu119f5172016-01-04 18:36:34 +01002/*
3 * Copyright (c) 2015 MediaTek Inc.
CK Hu119f5172016-01-04 18:36:34 +01004 */
5
6#ifndef MTK_DRM_CRTC_H
7#define MTK_DRM_CRTC_H
8
9#include <drm/drm_crtc.h>
10#include "mtk_drm_ddp_comp.h"
11#include "mtk_drm_plane.h"
12
Bibby Hsieh2f3f4dd2016-07-28 10:22:54 +080013#define MTK_LUT_SIZE 512
Bibby Hsieh72164362016-07-28 10:22:55 +080014#define MTK_MAX_BPC 10
15#define MTK_MIN_BPC 3
CK Hu119f5172016-01-04 18:36:34 +010016
CK Hu119f5172016-01-04 18:36:34 +010017void mtk_drm_crtc_commit(struct drm_crtc *crtc);
Stu Hsiehf2659052018-08-09 10:15:48 +080018void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *comp);
CK Hu119f5172016-01-04 18:36:34 +010019int mtk_drm_crtc_create(struct drm_device *drm_dev,
20 const enum mtk_ddp_comp_id *path,
21 unsigned int path_len);
Sean Paulf7c710d2019-11-05 16:10:20 -050022int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
23 struct mtk_plane_state *state);
CK Hu119f5172016-01-04 18:36:34 +010024
25#endif /* MTK_DRM_CRTC_H */