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Zhangfei Gaof70e9d82014-06-03 13:49:36 +08001Hisilicon hix5hd2 gmac controller
2
3Required properties:
Dongpo Lid0fb6ba2016-12-05 21:27:58 +08004- compatible: should contain one of the following SoC strings:
Dongpo Lif7ca8e3b2016-12-20 10:09:28 +08005 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
Dongpo Lid0fb6ba2016-12-05 21:27:58 +08008 and one of the following version string:
Dongpo Lif7ca8e3b2016-12-20 10:09:28 +08009 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
11 The version v1 includes SoCs hix5hd2.
12 The version v2 includes SoCs hi3798cv200, hi3516a.
Zhangfei Gaof70e9d82014-06-03 13:49:36 +080013- reg: specifies base physical address(s) and size of the device registers.
14 The first region is the MAC register base and size.
15 The second region is external interface control register.
16- interrupts: should contain the MAC interrupt.
17- #address-cells: must be <1>.
18- #size-cells: must be <0>.
19- phy-mode: see ethernet.txt [1].
20- phy-handle: see ethernet.txt [1].
Zhangfei Gaof70e9d82014-06-03 13:49:36 +080021- clocks: clock phandle and specifier pair.
Dongpo Li70871402016-12-05 21:28:00 +080022- clock-names: contain the clock name "mac_core"(required) and "mac_ifc"(optional).
23- resets: should contain the phandle to the MAC core reset signal(optional),
24 the MAC interface reset signal(optional)
25 and the PHY reset signal(optional).
26- reset-names: contain the reset signal name "mac_core"(optional),
27 "mac_ifc"(optional) and "phy"(optional).
28- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given.
29 The 1st cell is reset pre-delay in micro seconds.
30 The 2nd cell is reset pulse in micro seconds.
31 The 3rd cell is reset post-delay in micro seconds.
Zhangfei Gaof70e9d82014-06-03 13:49:36 +080032
Petr Štetiar687e3d52019-05-03 16:27:07 +020033The MAC address will be determined using the properties defined in
34ethernet.txt[1].
35
Zhangfei Gaof70e9d82014-06-03 13:49:36 +080036- PHY subnode: inherits from phy binding [2]
37
38[1] Documentation/devicetree/bindings/net/ethernet.txt
39[2] Documentation/devicetree/bindings/net/phy.txt
40
41Example:
42 gmac0: ethernet@f9840000 {
Dongpo Lif7ca8e3b2016-12-20 10:09:28 +080043 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
Zhangfei Gaof70e9d82014-06-03 13:49:36 +080044 reg = <0xf9840000 0x1000>,<0xf984300c 0x4>;
45 interrupts = <0 71 4>;
46 #address-cells = <1>;
47 #size-cells = <0>;
Dongpo Li70871402016-12-05 21:28:00 +080048 phy-mode = "rgmii";
Zhangfei Gaof70e9d82014-06-03 13:49:36 +080049 phy-handle = <&phy2>;
50 mac-address = [00 00 00 00 00 00];
Dongpo Li70871402016-12-05 21:28:00 +080051 clocks = <&crg HISTB_ETH0_MAC_CLK>, <&crg HISTB_ETH0_MACIF_CLK>;
52 clock-names = "mac_core", "mac_ifc";
53 resets = <&crg 0xcc 8>, <&crg 0xcc 10>, <&crg 0xcc 12>;
54 reset-names = "mac_core", "mac_ifc", "phy";
55 hisilicon,phy-reset-delays-us = <10000 10000 30000>;
Zhangfei Gaof70e9d82014-06-03 13:49:36 +080056
57 phy2: ethernet-phy@2 {
58 reg = <2>;
59 };
60 };