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Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10002/*
3 * Declarations of procedures and variables shared between files
4 * in arch/ppc/mm/.
5 *
6 * Derived from arch/ppc/mm/init.c:
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
10 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
11 * Copyright (C) 1996 Paul Mackerras
Paul Mackerras14cf11a2005-09-26 16:04:21 +100012 *
13 * Derived from "arch/i386/mm/init.c"
14 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
Paul Mackerras14cf11a2005-09-26 16:04:21 +100015 */
David Gibson62102302007-04-24 13:09:12 +100016#include <linux/mm.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100017#include <asm/mmu.h>
18
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000019#ifdef CONFIG_PPC_MMU_NOHASH
Christophe Leroycf4a6082018-03-21 15:16:58 +010020#include <asm/trace.h>
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000021
22/*
23 * On 40x and 8xx, we directly inline tlbia and tlbivax
24 */
Christophe Leroy968159c2017-08-08 13:58:54 +020025#if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx)
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000026static inline void _tlbil_all(void)
27{
Benjamin Herrenschmidt4a082682009-01-06 17:56:51 +000028 asm volatile ("sync; tlbia; isync" : : : "memory");
Christophe Leroy8114c362018-03-21 15:17:00 +010029 trace_tlbia(MMU_NO_CONTEXT);
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000030}
31static inline void _tlbil_pid(unsigned int pid)
32{
Benjamin Herrenschmidt4a082682009-01-06 17:56:51 +000033 asm volatile ("sync; tlbia; isync" : : : "memory");
Christophe Leroy8114c362018-03-21 15:17:00 +010034 trace_tlbia(pid);
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000035}
Benjamin Herrenschmidtd4e167d2009-07-23 23:15:24 +000036#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
37
Christophe Leroy968159c2017-08-08 13:58:54 +020038#else /* CONFIG_40x || CONFIG_PPC_8xx */
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000039extern void _tlbil_all(void);
40extern void _tlbil_pid(unsigned int pid);
Benjamin Herrenschmidt25d21ad2009-07-23 23:15:47 +000041#ifdef CONFIG_PPC_BOOK3E
42extern void _tlbil_pid_noind(unsigned int pid);
43#else
Benjamin Herrenschmidtd4e167d2009-07-23 23:15:24 +000044#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
Benjamin Herrenschmidt25d21ad2009-07-23 23:15:47 +000045#endif
Christophe Leroy968159c2017-08-08 13:58:54 +020046#endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000047
48/*
49 * On 8xx, we directly inline tlbie, on others, it's extern
50 */
Christophe Leroy968159c2017-08-08 13:58:54 +020051#ifdef CONFIG_PPC_8xx
Benjamin Herrenschmidtd4e167d2009-07-23 23:15:24 +000052static inline void _tlbil_va(unsigned long address, unsigned int pid,
53 unsigned int tsize, unsigned int ind)
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000054{
Benjamin Herrenschmidt4a082682009-01-06 17:56:51 +000055 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
Christophe Leroycf4a6082018-03-21 15:16:58 +010056 trace_tlbie(0, 0, address, pid, 0, 0, 0);
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000057}
Benjamin Herrenschmidt25d21ad2009-07-23 23:15:47 +000058#elif defined(CONFIG_PPC_BOOK3E)
59extern void _tlbil_va(unsigned long address, unsigned int pid,
60 unsigned int tsize, unsigned int ind);
61#else
Benjamin Herrenschmidtd4e167d2009-07-23 23:15:24 +000062extern void __tlbil_va(unsigned long address, unsigned int pid);
63static inline void _tlbil_va(unsigned long address, unsigned int pid,
64 unsigned int tsize, unsigned int ind)
65{
66 __tlbil_va(address, pid);
67}
Christophe Leroy968159c2017-08-08 13:58:54 +020068#endif /* CONFIG_PPC_8xx */
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000069
Dave Kleikampe7f75ad2010-03-05 10:43:12 +000070#if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x)
Benjamin Herrenschmidt25d21ad2009-07-23 23:15:47 +000071extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
72 unsigned int tsize, unsigned int ind);
73#else
Benjamin Herrenschmidtd4e167d2009-07-23 23:15:24 +000074static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
75 unsigned int tsize, unsigned int ind)
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000076{
77 BUG();
78}
Benjamin Herrenschmidt25d21ad2009-07-23 23:15:47 +000079#endif
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000080
Christophe Leroye4dccf92019-04-26 16:36:39 +000081static inline void print_system_hash_info(void) {}
82
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000083#else /* CONFIG_PPC_MMU_NOHASH */
84
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000085extern void _tlbie(unsigned long address);
86extern void _tlbia(void);
87
Christophe Leroye4dccf92019-04-26 16:36:39 +000088void print_system_hash_info(void);
89
Benjamin Herrenschmidt2a4aca112008-12-18 19:13:42 +000090#endif /* CONFIG_PPC_MMU_NOHASH */
91
Paul Mackerrasab1f9da2005-10-10 21:58:35 +100092#ifdef CONFIG_PPC32
Trent Piepho19f54652008-12-08 19:34:55 -080093
Christophe Leroyf49f4e22019-08-16 05:41:43 +000094void hash_preload(struct mm_struct *mm, unsigned long ea);
Christophe Leroye5a1edb2019-08-16 05:41:42 +000095
Paul Mackerras14cf11a2005-09-26 16:04:21 +100096extern void mapin_ram(void);
Becky Bruce7c5c4322008-06-14 09:41:42 +100097extern void setbat(int index, unsigned long virt, phys_addr_t phys,
Michael Ellerman5dd4e4f2015-03-25 20:11:55 +110098 unsigned int size, pgprot_t prot);
Paul Mackerras14cf11a2005-09-26 16:04:21 +100099
100extern int __map_without_bats;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000101extern unsigned int rtas_data, rtas_size;
102
David Gibson8e561e72007-06-13 14:52:56 +1000103struct hash_pte;
Christophe Leroy57e04912019-04-26 16:36:36 +0000104extern struct hash_pte *Hash;
Christophe Leroy215b82372019-04-26 16:23:36 +0000105extern u8 early_hash[];
Benjamin Herrenschmidt32a74942009-07-23 23:15:58 +0000106
107#endif /* CONFIG_PPC32 */
108
Paul Mackerrasab1f9da2005-10-10 21:58:35 +1000109extern unsigned long __max_low_memory;
Kumar Gala09b5e632008-04-16 05:52:25 +1000110extern phys_addr_t __initial_memory_limit_addr;
Stefan Roese2bf30162008-07-10 01:09:23 +1000111extern phys_addr_t total_memory;
112extern phys_addr_t total_lowmem;
Kumar Gala99c62dd72008-04-16 05:52:21 +1000113extern phys_addr_t memstart_addr;
Kumar Galad7917ba2008-04-16 05:52:22 +1000114extern phys_addr_t lowmem_end_addr;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000115
Albert Herranzde324002009-12-12 06:31:53 +0000116#ifdef CONFIG_WII
117extern unsigned long wii_hole_start;
118extern unsigned long wii_hole_size;
119
120extern unsigned long wii_mmu_mapin_mem2(unsigned long top);
121extern void wii_memory_fixups(void);
122#endif
123
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000124/* ...and now those things that may be slightly different between processor
125 * architectures. -- Dan
126 */
Christophe Leroya372acf2016-02-09 17:07:50 +0100127#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000128extern void MMU_init_hw(void);
Christophe Leroy72f208c2019-04-26 16:23:35 +0000129void MMU_init_hw_patch(void);
Christophe Leroy14e609d2019-02-21 19:08:38 +0000130unsigned long mmu_mapin_ram(unsigned long base, unsigned long top);
Christophe Leroya372acf2016-02-09 17:07:50 +0100131#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000132
Christophe Leroya372acf2016-02-09 17:07:50 +0100133#ifdef CONFIG_PPC_FSL_BOOK3E
Scott Woodeba5de82015-10-06 22:48:10 -0500134extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
135 bool dryrun);
Kumar Gala1dc91c32011-09-16 10:39:59 -0500136extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
137 phys_addr_t phys);
Kumar Gala55fd7662009-10-16 18:48:40 -0500138#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000139extern void adjust_total_lowmem(void);
Kevin Hao78a235e2013-12-24 15:12:07 +0800140extern int switch_to_as1(void);
Kevin Hao0be7d969b2013-12-24 15:12:11 +0800141extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
Jason Yanaa1d2092019-09-20 17:45:38 +0800142void create_kaslr_tlb_entry(int entry, unsigned long virt, phys_addr_t phys);
Jason Yanc061b382019-09-20 17:45:39 +0800143void reloc_kernel_entry(void *fdt, int addr);
Jason Yan2b0e86cc2019-09-20 17:45:40 +0800144extern int is_second_reloc;
Kumar Gala55fd7662009-10-16 18:48:40 -0500145#endif
Kumar Gala78f62232010-05-13 14:38:21 -0500146extern void loadcam_entry(unsigned int index);
Scott Woodd9e18312015-10-06 22:48:09 -0500147extern void loadcam_multi(int first_idx, int num, int tmp_idx);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000148
Jason Yan2b0e86cc2019-09-20 17:45:40 +0800149#ifdef CONFIG_RANDOMIZE_BASE
150void kaslr_early_init(void *dt_ptr, phys_addr_t size);
Jason Yanb3960972019-09-20 17:45:42 +0800151void kaslr_late_init(void);
Jason Yan2b0e86cc2019-09-20 17:45:40 +0800152#else
153static inline void kaslr_early_init(void *dt_ptr, phys_addr_t size) {}
Jason Yanb3960972019-09-20 17:45:42 +0800154static inline void kaslr_late_init(void) {}
Jason Yan2b0e86cc2019-09-20 17:45:40 +0800155#endif
156
Kumar Gala78f62232010-05-13 14:38:21 -0500157struct tlbcam {
158 u32 MAS0;
159 u32 MAS1;
160 unsigned long MAS2;
161 u32 MAS3;
162 u32 MAS7;
163};
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000164#endif
Christophe Leroy3084cdb2016-02-09 17:07:58 +0100165
Christophe Leroyd7cceda2018-11-17 10:24:56 +0000166#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
Christophe Leroy3084cdb2016-02-09 17:07:58 +0100167/* 6xx have BATS */
168/* FSL_BOOKE have TLBCAM */
Christophe Leroy4badd432016-05-17 09:02:45 +0200169/* 8xx have LTLB */
Christophe Leroy3084cdb2016-02-09 17:07:58 +0100170phys_addr_t v_block_mapped(unsigned long va);
171unsigned long p_block_mapped(phys_addr_t pa);
172#else
173static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
174static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
175#endif
Christophe Leroy63b2bc62019-02-21 19:08:49 +0000176
Christophe Leroyd5f17ee2019-02-21 19:08:51 +0000177#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx)
Christophe Leroy63b2bc62019-02-21 19:08:49 +0000178void mmu_mark_initmem_nx(void);
179void mmu_mark_rodata_ro(void);
180#else
181static inline void mmu_mark_initmem_nx(void) { }
182static inline void mmu_mark_rodata_ro(void) { }
183#endif
Christophe Leroy1e1c8b22020-01-14 07:14:40 +0000184
185#ifdef CONFIG_PPC_DEBUG_WX
186void ptdump_check_wx(void);
187#else
188static inline void ptdump_check_wx(void) { }
189#endif