blob: dcececd9f4d0bed99f18e3e027d389a5f16cdadd [file] [log] [blame]
Laurent Pinchart4d8864c2013-12-11 15:05:13 +01001/*
2 * Copyright 2013 Ideas On Board SPRL
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11#define __DT_BINDINGS_CLOCK_R8A7791_H__
12
13/* CPG */
14#define R8A7791_CLK_MAIN 0
15#define R8A7791_CLK_PLL0 1
16#define R8A7791_CLK_PLL1 2
17#define R8A7791_CLK_PLL3 3
18#define R8A7791_CLK_LB 4
19#define R8A7791_CLK_QSPI 5
20#define R8A7791_CLK_SDH 6
21#define R8A7791_CLK_SD0 7
22#define R8A7791_CLK_Z 8
23
Laurent Pinchartcded80f2013-12-19 16:51:02 +010024/* MSTP0 */
25#define R8A7791_CLK_MSIOF0 0
26
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010027/* MSTP1 */
Yoshifumi Hosoya74d89d22014-10-14 16:01:43 +090028#define R8A7791_CLK_VCP0 1
29#define R8A7791_CLK_VPC0 3
30#define R8A7791_CLK_JPU 6
31#define R8A7791_CLK_SSP1 9
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010032#define R8A7791_CLK_TMU1 11
Kouei Abee4d2fd92014-10-14 16:01:41 +090033#define R8A7791_CLK_3DG 12
Yoshifumi Hosoya74d89d22014-10-14 16:01:43 +090034#define R8A7791_CLK_2DDMAC 15
35#define R8A7791_CLK_FDP1_1 18
36#define R8A7791_CLK_FDP1_0 19
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010037#define R8A7791_CLK_TMU3 21
38#define R8A7791_CLK_TMU2 22
39#define R8A7791_CLK_CMT0 24
40#define R8A7791_CLK_TMU0 25
41#define R8A7791_CLK_VSP1_DU1 27
42#define R8A7791_CLK_VSP1_DU0 28
Laurent Pinchart58ea1d52014-04-02 16:31:47 +020043#define R8A7791_CLK_VSP1_S 31
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010044
45/* MSTP2 */
46#define R8A7791_CLK_SCIFA2 2
47#define R8A7791_CLK_SCIFA1 3
48#define R8A7791_CLK_SCIFA0 4
Laurent Pinchartcded80f2013-12-19 16:51:02 +010049#define R8A7791_CLK_MSIOF2 5
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010050#define R8A7791_CLK_SCIFB0 6
51#define R8A7791_CLK_SCIFB1 7
Laurent Pinchartcded80f2013-12-19 16:51:02 +010052#define R8A7791_CLK_MSIOF1 8
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010053#define R8A7791_CLK_SCIFB2 16
Geert Uytterhoevena505daa2014-05-12 20:49:33 +020054#define R8A7791_CLK_SYS_DMAC1 18
55#define R8A7791_CLK_SYS_DMAC0 19
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010056
57/* MSTP3 */
58#define R8A7791_CLK_TPU0 4
59#define R8A7791_CLK_SDHI2 11
60#define R8A7791_CLK_SDHI1 12
61#define R8A7791_CLK_SDHI0 14
62#define R8A7791_CLK_MMCIF0 15
Wolfram Sangc6e8f322014-03-10 12:26:56 +010063#define R8A7791_CLK_IIC0 18
Phil Edworthy4bfb3762014-06-13 10:37:18 +010064#define R8A7791_CLK_PCIEC 19
Wolfram Sangc6e8f322014-03-10 12:26:56 +010065#define R8A7791_CLK_IIC1 23
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010066#define R8A7791_CLK_SSUSB 28
67#define R8A7791_CLK_CMT1 29
68#define R8A7791_CLK_USBDMAC0 30
69#define R8A7791_CLK_USBDMAC1 31
70
71/* MSTP5 */
72#define R8A7791_CLK_THERMAL 22
73#define R8A7791_CLK_PWM 23
74
75/* MSTP7 */
Magnus Damm6225b992014-04-07 15:04:21 +090076#define R8A7791_CLK_EHCI 3
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010077#define R8A7791_CLK_HSUSB 4
78#define R8A7791_CLK_HSCIF2 13
79#define R8A7791_CLK_SCIF5 14
80#define R8A7791_CLK_SCIF4 15
81#define R8A7791_CLK_HSCIF1 16
82#define R8A7791_CLK_HSCIF0 17
83#define R8A7791_CLK_SCIF3 18
84#define R8A7791_CLK_SCIF2 19
85#define R8A7791_CLK_SCIF1 20
86#define R8A7791_CLK_SCIF0 21
87#define R8A7791_CLK_DU1 23
88#define R8A7791_CLK_DU0 24
89#define R8A7791_CLK_LVDS0 26
90
91/* MSTP8 */
92#define R8A7791_CLK_VIN2 9
93#define R8A7791_CLK_VIN1 10
94#define R8A7791_CLK_VIN0 11
95#define R8A7791_CLK_ETHER 13
96#define R8A7791_CLK_SATA1 14
97#define R8A7791_CLK_SATA0 15
98
99/* MSTP9 */
100#define R8A7791_CLK_GPIO7 4
101#define R8A7791_CLK_GPIO6 5
102#define R8A7791_CLK_GPIO5 7
103#define R8A7791_CLK_GPIO4 8
104#define R8A7791_CLK_GPIO3 9
105#define R8A7791_CLK_GPIO2 10
106#define R8A7791_CLK_GPIO1 11
107#define R8A7791_CLK_GPIO0 12
108#define R8A7791_CLK_RCAN1 15
109#define R8A7791_CLK_RCAN0 16
Laurent Pinchartec71f552013-12-19 16:51:04 +0100110#define R8A7791_CLK_QSPI_MOD 17
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100111#define R8A7791_CLK_I2C5 25
112#define R8A7791_CLK_IICDVFS 26
113#define R8A7791_CLK_I2C4 27
114#define R8A7791_CLK_I2C3 28
115#define R8A7791_CLK_I2C2 29
116#define R8A7791_CLK_I2C1 30
117#define R8A7791_CLK_I2C0 31
118
Kuninori Morimotoee914152014-06-11 21:44:16 -0700119/* MSTP10 */
120#define R8A7791_CLK_SSI_ALL 5
121#define R8A7791_CLK_SSI9 6
122#define R8A7791_CLK_SSI8 7
123#define R8A7791_CLK_SSI7 8
124#define R8A7791_CLK_SSI6 9
125#define R8A7791_CLK_SSI5 10
126#define R8A7791_CLK_SSI4 11
127#define R8A7791_CLK_SSI3 12
128#define R8A7791_CLK_SSI2 13
129#define R8A7791_CLK_SSI1 14
130#define R8A7791_CLK_SSI0 15
131#define R8A7791_CLK_SCU_ALL 17
132#define R8A7791_CLK_SCU_DVC1 18
133#define R8A7791_CLK_SCU_DVC0 19
134#define R8A7791_CLK_SCU_SRC9 22
135#define R8A7791_CLK_SCU_SRC8 23
136#define R8A7791_CLK_SCU_SRC7 24
137#define R8A7791_CLK_SCU_SRC6 25
138#define R8A7791_CLK_SCU_SRC5 26
139#define R8A7791_CLK_SCU_SRC4 27
140#define R8A7791_CLK_SCU_SRC3 28
141#define R8A7791_CLK_SCU_SRC2 29
142#define R8A7791_CLK_SCU_SRC1 30
143#define R8A7791_CLK_SCU_SRC0 31
144
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100145/* MSTP11 */
146#define R8A7791_CLK_SCIFA3 6
147#define R8A7791_CLK_SCIFA4 7
148#define R8A7791_CLK_SCIFA5 8
149
150#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */