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Viresh Kumarf56aad12016-03-30 13:45:26 +05301/*
2 * Copyright (C) 2016 Linaro.
3 * Viresh Kumar <viresh.kumar@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/err.h>
11#include <linux/of.h>
Viresh Kumaredeec422017-08-16 11:07:27 +053012#include <linux/of_device.h>
Viresh Kumarf56aad12016-03-30 13:45:26 +053013#include <linux/platform_device.h>
14
Viresh Kumar297a6622016-09-09 16:48:08 +053015#include "cpufreq-dt.h"
16
Viresh Kumaredeec422017-08-16 11:07:27 +053017/*
18 * Machines for which the cpufreq device is *always* created, mostly used for
19 * platforms using "operating-points" (V1) property.
20 */
21static const struct of_device_id whitelist[] __initconst = {
Viresh Kumar117d4f52016-04-22 16:58:45 +053022 { .compatible = "allwinner,sun4i-a10", },
23 { .compatible = "allwinner,sun5i-a10s", },
24 { .compatible = "allwinner,sun5i-a13", },
25 { .compatible = "allwinner,sun5i-r8", },
26 { .compatible = "allwinner,sun6i-a31", },
27 { .compatible = "allwinner,sun6i-a31s", },
28 { .compatible = "allwinner,sun7i-a20", },
29 { .compatible = "allwinner,sun8i-a23", },
Viresh Kumar117d4f52016-04-22 16:58:45 +053030 { .compatible = "allwinner,sun8i-a83t", },
31 { .compatible = "allwinner,sun8i-h3", },
32
Hoan Trane11b6292016-12-15 14:55:00 -080033 { .compatible = "apm,xgene-shadowcat", },
34
Linus Walleij650ec6c2016-10-25 09:21:24 +020035 { .compatible = "arm,integrator-ap", },
36 { .compatible = "arm,integrator-cp", },
37
Tao Wanga0df7732017-05-23 16:13:18 +080038 { .compatible = "hisilicon,hi3660", },
Viresh Kumar3920be42016-04-22 16:58:47 +053039
Viresh Kumar7ead83f2016-04-22 16:58:41 +053040 { .compatible = "fsl,imx27", },
41 { .compatible = "fsl,imx51", },
42 { .compatible = "fsl,imx53", },
43 { .compatible = "fsl,imx7d", },
44
Viresh Kumara59511d2016-04-22 16:58:40 +053045 { .compatible = "marvell,berlin", },
Robert Jarzmikdcd2ea42016-10-31 20:54:53 +010046 { .compatible = "marvell,pxa250", },
47 { .compatible = "marvell,pxa270", },
Viresh Kumara59511d2016-04-22 16:58:40 +053048
Viresh Kumar2249c002016-03-30 13:45:28 +053049 { .compatible = "samsung,exynos3250", },
50 { .compatible = "samsung,exynos4210", },
Viresh Kumar2249c002016-03-30 13:45:28 +053051 { .compatible = "samsung,exynos5250", },
52#ifndef CONFIG_BL_SWITCHER
Viresh Kumar2249c002016-03-30 13:45:28 +053053 { .compatible = "samsung,exynos5800", },
54#endif
Viresh Kumar7694ca62016-04-22 16:58:42 +053055
Viresh Kumara399dc92016-04-22 16:58:44 +053056 { .compatible = "renesas,emev2", },
57 { .compatible = "renesas,r7s72100", },
58 { .compatible = "renesas,r8a73a4", },
59 { .compatible = "renesas,r8a7740", },
Geert Uytterhoevenf0da8982016-11-16 11:05:51 +010060 { .compatible = "renesas,r8a7743", },
Biju Dasd1e13032018-09-11 11:12:51 +010061 { .compatible = "renesas,r8a7744", },
Geert Uytterhoevenf0da8982016-11-16 11:05:51 +010062 { .compatible = "renesas,r8a7745", },
Viresh Kumara399dc92016-04-22 16:58:44 +053063 { .compatible = "renesas,r8a7778", },
64 { .compatible = "renesas,r8a7779", },
65 { .compatible = "renesas,r8a7790", },
66 { .compatible = "renesas,r8a7791", },
Geert Uytterhoevenffdf8b82016-09-06 14:18:20 +020067 { .compatible = "renesas,r8a7792", },
Viresh Kumara399dc92016-04-22 16:58:44 +053068 { .compatible = "renesas,r8a7793", },
69 { .compatible = "renesas,r8a7794", },
70 { .compatible = "renesas,sh73a0", },
71
Finley Xiao014400c2016-04-22 16:58:43 +053072 { .compatible = "rockchip,rk2928", },
73 { .compatible = "rockchip,rk3036", },
74 { .compatible = "rockchip,rk3066a", },
75 { .compatible = "rockchip,rk3066b", },
76 { .compatible = "rockchip,rk3188", },
77 { .compatible = "rockchip,rk3228", },
78 { .compatible = "rockchip,rk3288", },
Finley Xiao319af402017-08-04 09:52:31 +080079 { .compatible = "rockchip,rk3328", },
Finley Xiao014400c2016-04-22 16:58:43 +053080 { .compatible = "rockchip,rk3366", },
81 { .compatible = "rockchip,rk3368", },
Dmitry Torokhov9d21d332018-10-05 12:00:58 -070082 { .compatible = "rockchip,rk3399",
83 .data = &(struct cpufreq_dt_platform_data)
84 { .have_governor_per_policy = true, },
85 },
Finley Xiao014400c2016-04-22 16:58:43 +053086
Linus Walleijff6c3492017-08-16 10:19:12 +020087 { .compatible = "st-ericsson,u8500", },
88 { .compatible = "st-ericsson,u8540", },
89 { .compatible = "st-ericsson,u9500", },
90 { .compatible = "st-ericsson,u9540", },
91
Viresh Kumar7694ca62016-04-22 16:58:42 +053092 { .compatible = "ti,omap2", },
93 { .compatible = "ti,omap3", },
94 { .compatible = "ti,omap4", },
95 { .compatible = "ti,omap5", },
Viresh Kumar5e4249c2016-04-22 16:58:46 +053096
97 { .compatible = "xlnx,zynq-7000", },
Shubhrajyoti Dattaa5685782017-07-13 11:19:10 +020098 { .compatible = "xlnx,zynqmp", },
Wei Yongjunbd37e022016-08-21 15:41:44 +000099
100 { }
Viresh Kumarf56aad12016-03-30 13:45:26 +0530101};
102
Viresh Kumaredeec422017-08-16 11:07:27 +0530103/*
104 * Machines for which the cpufreq device is *not* created, mostly used for
105 * platforms using "operating-points-v2" property.
106 */
107static const struct of_device_id blacklist[] __initconst = {
Viresh Kumarff768982017-09-19 08:23:22 -0700108 { .compatible = "calxeda,highbank", },
109 { .compatible = "calxeda,ecx-2000", },
110
111 { .compatible = "marvell,armadaxp", },
112
Andrew-sh Cheng6066998c2017-12-08 14:07:56 +0800113 { .compatible = "mediatek,mt2701", },
114 { .compatible = "mediatek,mt2712", },
115 { .compatible = "mediatek,mt7622", },
116 { .compatible = "mediatek,mt7623", },
117 { .compatible = "mediatek,mt817x", },
118 { .compatible = "mediatek,mt8173", },
119 { .compatible = "mediatek,mt8176", },
120
Viresh Kumarff768982017-09-19 08:23:22 -0700121 { .compatible = "nvidia,tegra124", },
122
Ilia Lin46e28562018-05-30 05:39:28 +0300123 { .compatible = "qcom,apq8096", },
124 { .compatible = "qcom,msm8996", },
125
Viresh Kumarff768982017-09-19 08:23:22 -0700126 { .compatible = "st,stih407", },
127 { .compatible = "st,stih410", },
128
129 { .compatible = "sigma,tango4", },
130
Suniel Maheshd477bf32017-09-21 19:09:03 +0530131 { .compatible = "ti,am33xx", },
132 { .compatible = "ti,am43", },
133 { .compatible = "ti,dra7", },
134
Viresh Kumaredeec422017-08-16 11:07:27 +0530135 { }
136};
137
138static bool __init cpu0_node_has_opp_v2_prop(void)
139{
140 struct device_node *np = of_cpu_device_node_get(0);
141 bool ret = false;
142
143 if (of_get_property(np, "operating-points-v2", NULL))
144 ret = true;
145
146 of_node_put(np);
147 return ret;
148}
149
Viresh Kumarf56aad12016-03-30 13:45:26 +0530150static int __init cpufreq_dt_platdev_init(void)
151{
152 struct device_node *np = of_find_node_by_path("/");
Masahiro Yamadaca5eda52016-06-27 14:50:13 +0900153 const struct of_device_id *match;
Viresh Kumaredeec422017-08-16 11:07:27 +0530154 const void *data = NULL;
Viresh Kumarf56aad12016-03-30 13:45:26 +0530155
156 if (!np)
157 return -ENODEV;
158
Viresh Kumaredeec422017-08-16 11:07:27 +0530159 match = of_match_node(whitelist, np);
160 if (match) {
161 data = match->data;
162 goto create_pdev;
163 }
Viresh Kumarf56aad12016-03-30 13:45:26 +0530164
Viresh Kumaredeec422017-08-16 11:07:27 +0530165 if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
166 goto create_pdev;
167
168 of_node_put(np);
169 return -ENODEV;
170
171create_pdev:
172 of_node_put(np);
Viresh Kumar297a6622016-09-09 16:48:08 +0530173 return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
Viresh Kumaredeec422017-08-16 11:07:27 +0530174 -1, data,
Viresh Kumar297a6622016-09-09 16:48:08 +0530175 sizeof(struct cpufreq_dt_platform_data)));
Viresh Kumarf56aad12016-03-30 13:45:26 +0530176}
177device_initcall(cpufreq_dt_platdev_init);