Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 2 | menu "Memory management options" |
| 3 | |
| 4 | config MMU |
| 5 | bool "Support for memory management hardware" |
| 6 | depends on !CPU_SH2 |
| 7 | default y |
| 8 | help |
| 9 | Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to |
| 10 | boot on these systems, this option must not be set. |
| 11 | |
| 12 | On other systems (such as the SH-3 and 4) where an MMU exists, |
| 13 | turning this off will boot the kernel on these machines with the |
| 14 | MMU implicitly switched off. |
| 15 | |
Paul Mundt | e7f93a3 | 2006-09-27 17:19:13 +0900 | [diff] [blame] | 16 | config PAGE_OFFSET |
| 17 | hex |
Arnd Bergmann | 37744fe | 2020-04-20 11:37:12 +0200 | [diff] [blame] | 18 | default "0x80000000" if MMU |
Paul Mundt | e7f93a3 | 2006-09-27 17:19:13 +0900 | [diff] [blame] | 19 | default "0x00000000" |
| 20 | |
Zi Yan | 0192445 | 2022-08-15 10:39:59 -0400 | [diff] [blame] | 21 | config ARCH_FORCE_MAX_ORDER |
Mike Rapoport (IBM) | b2a37fb | 2023-03-24 08:22:30 +0300 | [diff] [blame] | 22 | int "Order of maximal physically contiguous allocations" |
Kirill A. Shutemov | 23baf83 | 2023-03-15 14:31:33 +0300 | [diff] [blame] | 23 | default "8" if PAGE_SIZE_16KB |
Kirill A. Shutemov | 23baf83 | 2023-03-15 14:31:33 +0300 | [diff] [blame] | 24 | default "6" if PAGE_SIZE_64KB |
Kirill A. Shutemov | 23baf83 | 2023-03-15 14:31:33 +0300 | [diff] [blame] | 25 | default "13" if !MMU |
| 26 | default "10" |
Paul Mundt | ad3256e | 2009-05-14 17:40:08 +0900 | [diff] [blame] | 27 | help |
Mike Rapoport (IBM) | b2a37fb | 2023-03-24 08:22:30 +0300 | [diff] [blame] | 28 | The kernel page allocator limits the size of maximal physically |
| 29 | contiguous allocations. The limit is called MAX_ORDER and it |
| 30 | defines the maximal power of two of number of pages that can be |
| 31 | allocated as a single contiguous block. This option allows |
| 32 | overriding the default setting when ability to allocate very |
| 33 | large blocks of physically contiguous memory is required. |
Paul Mundt | ad3256e | 2009-05-14 17:40:08 +0900 | [diff] [blame] | 34 | |
Paul Mundt | ad3256e | 2009-05-14 17:40:08 +0900 | [diff] [blame] | 35 | The page size is not necessarily 4KB. Keep this in mind when |
| 36 | choosing a value for this option. |
| 37 | |
Mike Rapoport (IBM) | b2a37fb | 2023-03-24 08:22:30 +0300 | [diff] [blame] | 38 | Don't change if unsure. |
| 39 | |
Paul Mundt | e7f93a3 | 2006-09-27 17:19:13 +0900 | [diff] [blame] | 40 | config MEMORY_START |
| 41 | hex "Physical memory start address" |
| 42 | default "0x08000000" |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 43 | help |
Paul Mundt | e7f93a3 | 2006-09-27 17:19:13 +0900 | [diff] [blame] | 44 | Computers built with Hitachi SuperH processors always |
| 45 | map the ROM starting at address zero. But the processor |
| 46 | does not specify the range that RAM takes. |
| 47 | |
| 48 | The physical memory (RAM) start address will be automatically |
| 49 | set to 08000000. Other platforms, such as the Solution Engine |
| 50 | boards typically map RAM at 0C000000. |
| 51 | |
| 52 | Tweak this only when porting to a new machine which does not |
| 53 | already have a defconfig. Changing it from the known correct |
| 54 | value on any of the known systems will only lead to disaster. |
| 55 | |
| 56 | config MEMORY_SIZE |
| 57 | hex "Physical memory size" |
Paul Mundt | 711fe43 | 2007-11-21 15:46:07 +0900 | [diff] [blame] | 58 | default "0x04000000" |
Paul Mundt | e7f93a3 | 2006-09-27 17:19:13 +0900 | [diff] [blame] | 59 | help |
| 60 | This sets the default memory size assumed by your SH kernel. It can |
| 61 | be overridden as normal by the 'mem=' argument on the kernel command |
| 62 | line. If unsure, consult your board specifications or just leave it |
Paul Mundt | 711fe43 | 2007-11-21 15:46:07 +0900 | [diff] [blame] | 63 | as 0x04000000 which was the default value before this became |
Paul Mundt | e7f93a3 | 2006-09-27 17:19:13 +0900 | [diff] [blame] | 64 | configurable. |
| 65 | |
Paul Mundt | 36bcd39 | 2007-11-10 19:16:55 +0900 | [diff] [blame] | 66 | # Physical addressing modes |
| 67 | |
| 68 | config 29BIT |
| 69 | def_bool !32BIT |
Paul Mundt | b0f3ae0 | 2010-02-12 15:40:00 +0900 | [diff] [blame] | 70 | select UNCACHED_MAPPING |
Paul Mundt | 36bcd39 | 2007-11-10 19:16:55 +0900 | [diff] [blame] | 71 | |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 72 | config 32BIT |
Paul Mundt | 36bcd39 | 2007-11-10 19:16:55 +0900 | [diff] [blame] | 73 | bool |
Arnd Bergmann | 37744fe | 2020-04-20 11:37:12 +0200 | [diff] [blame] | 74 | default !MMU |
Paul Mundt | 36bcd39 | 2007-11-10 19:16:55 +0900 | [diff] [blame] | 75 | |
Paul Mundt | a0ab366 | 2010-01-13 18:31:48 +0900 | [diff] [blame] | 76 | config PMB |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 77 | bool "Support 32-bit physical addressing through PMB" |
Kees Cook | 0d57af1 | 2013-01-16 18:53:26 -0800 | [diff] [blame] | 78 | depends on MMU && CPU_SH4A && !CPU_SH4AL_DSP |
Paul Mundt | a0ab366 | 2010-01-13 18:31:48 +0900 | [diff] [blame] | 79 | select 32BIT |
Paul Mundt | b0f3ae0 | 2010-02-12 15:40:00 +0900 | [diff] [blame] | 80 | select UNCACHED_MAPPING |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 81 | help |
| 82 | If you say Y here, physical addressing will be extended to |
| 83 | 32-bits through the SH-4A PMB. If this is not set, legacy |
| 84 | 29-bit physical addressing will be used. |
| 85 | |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 86 | config X2TLB |
Paul Mundt | 782bb5a | 2010-01-13 19:11:14 +0900 | [diff] [blame] | 87 | def_bool y |
| 88 | depends on (CPU_SHX2 || CPU_SHX3) && MMU |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 89 | |
Paul Mundt | 19f9a34f | 2006-09-27 18:33:49 +0900 | [diff] [blame] | 90 | config VSYSCALL |
| 91 | bool "Support vsyscall page" |
Paul Mundt | a09063d | 2007-11-08 18:54:16 +0900 | [diff] [blame] | 92 | depends on MMU && (CPU_SH3 || CPU_SH4) |
Paul Mundt | 19f9a34f | 2006-09-27 18:33:49 +0900 | [diff] [blame] | 93 | default y |
| 94 | help |
| 95 | This will enable support for the kernel mapping a vDSO page |
| 96 | in process space, and subsequently handing down the entry point |
| 97 | to the libc through the ELF auxiliary vector. |
| 98 | |
| 99 | From the kernel side this is used for the signal trampoline. |
| 100 | For systems with an MMU that can afford to give up a page, |
| 101 | (the default value) say Y. |
| 102 | |
Paul Mundt | b241cb0 | 2007-06-06 17:52:19 +0900 | [diff] [blame] | 103 | config NUMA |
Randy Dunlap | 7fb0a1a | 2020-09-17 19:14:04 -0700 | [diff] [blame] | 104 | bool "Non-Uniform Memory Access (NUMA) Support" |
Kees Cook | 0d57af1 | 2013-01-16 18:53:26 -0800 | [diff] [blame] | 105 | depends on MMU && SYS_SUPPORTS_NUMA |
Peter Zijlstra | cbee9f8 | 2012-10-25 14:16:43 +0200 | [diff] [blame] | 106 | select ARCH_WANT_NUMA_VARIABLE_LOCALITY |
Paul Mundt | b241cb0 | 2007-06-06 17:52:19 +0900 | [diff] [blame] | 107 | default n |
| 108 | help |
| 109 | Some SH systems have many various memories scattered around |
| 110 | the address space, each with varying latencies. This enables |
| 111 | support for these blocks by binding them to nodes and allowing |
| 112 | memory policies to be used for prioritizing and controlling |
| 113 | allocation behaviour. |
| 114 | |
Paul Mundt | 0106662 | 2007-03-28 16:38:13 +0900 | [diff] [blame] | 115 | config NODES_SHIFT |
| 116 | int |
Paul Mundt | 9904494 | 2007-08-08 16:45:07 +0900 | [diff] [blame] | 117 | default "3" if CPU_SUBTYPE_SHX3 |
Paul Mundt | 0106662 | 2007-03-28 16:38:13 +0900 | [diff] [blame] | 118 | default "1" |
Mike Rapoport | a9ee6cf | 2021-06-28 19:43:01 -0700 | [diff] [blame] | 119 | depends on NUMA |
Paul Mundt | 0106662 | 2007-03-28 16:38:13 +0900 | [diff] [blame] | 120 | |
| 121 | config ARCH_FLATMEM_ENABLE |
| 122 | def_bool y |
Paul Mundt | 357d594 | 2007-06-11 15:32:07 +0900 | [diff] [blame] | 123 | depends on !NUMA |
Paul Mundt | 0106662 | 2007-03-28 16:38:13 +0900 | [diff] [blame] | 124 | |
Paul Mundt | dfbb904 | 2007-05-23 17:48:36 +0900 | [diff] [blame] | 125 | config ARCH_SPARSEMEM_ENABLE |
| 126 | def_bool y |
| 127 | select SPARSEMEM_STATIC |
| 128 | |
| 129 | config ARCH_SPARSEMEM_DEFAULT |
| 130 | def_bool y |
| 131 | |
Paul Mundt | dfbb904 | 2007-05-23 17:48:36 +0900 | [diff] [blame] | 132 | config ARCH_SELECT_MEMORY_MODEL |
| 133 | def_bool y |
| 134 | |
Paul Mundt | 33d63bd | 2007-06-07 11:32:52 +0900 | [diff] [blame] | 135 | config ARCH_MEMORY_PROBE |
| 136 | def_bool y |
| 137 | depends on MEMORY_HOTPLUG |
| 138 | |
Matt Fleming | 4d35b93 | 2009-11-05 07:54:17 +0000 | [diff] [blame] | 139 | config IOREMAP_FIXED |
| 140 | def_bool y |
Arnd Bergmann | 37744fe | 2020-04-20 11:37:12 +0200 | [diff] [blame] | 141 | depends on X2TLB |
Matt Fleming | 4d35b93 | 2009-11-05 07:54:17 +0000 | [diff] [blame] | 142 | |
Paul Mundt | b0f3ae0 | 2010-02-12 15:40:00 +0900 | [diff] [blame] | 143 | config UNCACHED_MAPPING |
| 144 | bool |
| 145 | |
Paul Mundt | c993487 | 2010-10-15 02:09:00 +0900 | [diff] [blame] | 146 | config HAVE_SRAM_POOL |
| 147 | bool |
| 148 | select GENERIC_ALLOCATOR |
| 149 | |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 150 | choice |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 151 | prompt "Kernel page size" |
| 152 | default PAGE_SIZE_4KB |
| 153 | |
| 154 | config PAGE_SIZE_4KB |
| 155 | bool "4kB" |
| 156 | help |
| 157 | This is the default page size used by all SuperH CPUs. |
| 158 | |
| 159 | config PAGE_SIZE_8KB |
| 160 | bool "8kB" |
Matt Fleming | 3f5ab76 | 2009-12-24 20:38:45 +0000 | [diff] [blame] | 161 | depends on !MMU || X2TLB |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 162 | help |
| 163 | This enables 8kB pages as supported by SH-X2 and later MMUs. |
| 164 | |
Paul Mundt | 66dfe18 | 2008-06-03 18:54:02 +0900 | [diff] [blame] | 165 | config PAGE_SIZE_16KB |
| 166 | bool "16kB" |
| 167 | depends on !MMU |
| 168 | help |
| 169 | This enables 16kB pages on MMU-less SH systems. |
| 170 | |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 171 | config PAGE_SIZE_64KB |
| 172 | bool "64kB" |
Arnd Bergmann | 37744fe | 2020-04-20 11:37:12 +0200 | [diff] [blame] | 173 | depends on !MMU || CPU_SH4 |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 174 | help |
| 175 | This enables support for 64kB pages, possible on all SH-4 |
Paul Mundt | 4d2cab7 | 2007-09-27 10:47:00 +0900 | [diff] [blame] | 176 | CPUs and later. |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 177 | |
| 178 | endchoice |
| 179 | |
| 180 | choice |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 181 | prompt "HugeTLB page size" |
Paul Mundt | ffb4a73 | 2009-10-27 07:22:37 +0900 | [diff] [blame] | 182 | depends on HUGETLB_PAGE |
Paul Mundt | 68b7c24 | 2008-08-06 15:10:49 +0900 | [diff] [blame] | 183 | default HUGETLB_PAGE_SIZE_1MB if PAGE_SIZE_64KB |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 184 | default HUGETLB_PAGE_SIZE_64K |
| 185 | |
| 186 | config HUGETLB_PAGE_SIZE_64K |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 187 | bool "64kB" |
Paul Mundt | 68b7c24 | 2008-08-06 15:10:49 +0900 | [diff] [blame] | 188 | depends on !PAGE_SIZE_64KB |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 189 | |
| 190 | config HUGETLB_PAGE_SIZE_256K |
| 191 | bool "256kB" |
| 192 | depends on X2TLB |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 193 | |
| 194 | config HUGETLB_PAGE_SIZE_1MB |
| 195 | bool "1MB" |
| 196 | |
Paul Mundt | 21440cf | 2006-11-20 14:30:26 +0900 | [diff] [blame] | 197 | config HUGETLB_PAGE_SIZE_4MB |
| 198 | bool "4MB" |
| 199 | depends on X2TLB |
| 200 | |
| 201 | config HUGETLB_PAGE_SIZE_64MB |
| 202 | bool "64MB" |
| 203 | depends on X2TLB |
| 204 | |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 205 | endchoice |
| 206 | |
Paul Mundt | 896f0c0 | 2009-10-16 18:00:02 +0900 | [diff] [blame] | 207 | config SCHED_MC |
| 208 | bool "Multi-core scheduler support" |
| 209 | depends on SMP |
| 210 | default y |
| 211 | help |
| 212 | Multi-core scheduler support improves the CPU scheduler's decision |
| 213 | making when dealing with multi-core CPU chips at a cost of slightly |
| 214 | increased overhead in some places. If unsure say N here. |
| 215 | |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 216 | endmenu |
| 217 | |
| 218 | menu "Cache configuration" |
| 219 | |
| 220 | config SH7705_CACHE_32KB |
| 221 | bool "Enable 32KB cache size for SH7705" |
| 222 | depends on CPU_SUBTYPE_SH7705 |
| 223 | default y |
| 224 | |
Paul Mundt | e7bd34a | 2007-07-31 17:07:28 +0900 | [diff] [blame] | 225 | choice |
| 226 | prompt "Cache mode" |
Arnd Bergmann | 37744fe | 2020-04-20 11:37:12 +0200 | [diff] [blame] | 227 | default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 |
Paul Mundt | e7bd34a | 2007-07-31 17:07:28 +0900 | [diff] [blame] | 228 | default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A) |
| 229 | |
| 230 | config CACHE_WRITEBACK |
| 231 | bool "Write-back" |
Paul Mundt | e7bd34a | 2007-07-31 17:07:28 +0900 | [diff] [blame] | 232 | |
| 233 | config CACHE_WRITETHROUGH |
| 234 | bool "Write-through" |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 235 | help |
| 236 | Selecting this option will configure the caches in write-through |
| 237 | mode, as opposed to the default write-back configuration. |
| 238 | |
| 239 | Since there's sill some aliasing issues on SH-4, this option will |
| 240 | unfortunately still require the majority of flushing functions to |
| 241 | be implemented to deal with aliasing. |
| 242 | |
| 243 | If unsure, say N. |
| 244 | |
Paul Mundt | e7bd34a | 2007-07-31 17:07:28 +0900 | [diff] [blame] | 245 | config CACHE_OFF |
| 246 | bool "Off" |
| 247 | |
| 248 | endchoice |
| 249 | |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 250 | endmenu |