| Stephen Warren | bf55499 | 2011-11-29 18:36:48 -0700 | [diff] [blame] | 1 | NVIDIA Tegra 20 I2S controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : "nvidia,tegra20-i2s" |
| 5 | - reg : Should contain I2S registers location and length |
| 6 | - interrupts : Should contain I2S interrupt |
| Stephen Warren | 0799958 | 2013-11-07 10:11:27 -0700 | [diff] [blame] | 7 | - resets : Must contain an entry for each entry in reset-names. |
| 8 | See ../reset/reset.txt for details. |
| 9 | - reset-names : Must include the following entries: |
| 10 | - i2s |
| Stephen Warren | ed520c9 | 2013-11-11 13:04:19 -0700 | [diff] [blame] | 11 | - dmas : Must contain an entry for each entry in clock-names. |
| 12 | See ../dma/dma.txt for details. |
| 13 | - dma-names : Must include the following entries: |
| 14 | - rx |
| 15 | - tx |
| 16 | - clocks : Must contain one entry, for the module clock. |
| 17 | See ../clocks/clock-bindings.txt for details. |
| Stephen Warren | bf55499 | 2011-11-29 18:36:48 -0700 | [diff] [blame] | 18 | |
| 19 | Example: |
| 20 | |
| 21 | i2s@70002800 { |
| 22 | compatible = "nvidia,tegra20-i2s"; |
| 23 | reg = <0x70002800 0x200>; |
| 24 | interrupts = < 45 >; |
| Stephen Warren | d8f6479 | 2013-11-06 14:00:25 -0700 | [diff] [blame] | 25 | clocks = <&tegra_car 11>; |
| Stephen Warren | 0799958 | 2013-11-07 10:11:27 -0700 | [diff] [blame] | 26 | resets = <&tegra_car 11>; |
| 27 | reset-names = "i2s"; |
| Stephen Warren | ed520c9 | 2013-11-11 13:04:19 -0700 | [diff] [blame] | 28 | dmas = <&apbdma 21>, <&apbdma 21>; |
| 29 | dma-names = "rx", "tx"; |
| Stephen Warren | bf55499 | 2011-11-29 18:36:48 -0700 | [diff] [blame] | 30 | }; |
