Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 3 | * redistributing this file, you may do so under either license. |
| 4 | * |
| 5 | * GPL LICENSE SUMMARY |
| 6 | * |
| 7 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of version 2 of the GNU General Public License as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 21 | * The full GNU General Public License is included in this distribution |
| 22 | * in the file called LICENSE.GPL. |
| 23 | * |
| 24 | * BSD LICENSE |
| 25 | * |
| 26 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
| 27 | * All rights reserved. |
| 28 | * |
| 29 | * Redistribution and use in source and binary forms, with or without |
| 30 | * modification, are permitted provided that the following conditions |
| 31 | * are met: |
| 32 | * |
| 33 | * * Redistributions of source code must retain the above copyright |
| 34 | * notice, this list of conditions and the following disclaimer. |
| 35 | * * Redistributions in binary form must reproduce the above copyright |
| 36 | * notice, this list of conditions and the following disclaimer in |
| 37 | * the documentation and/or other materials provided with the |
| 38 | * distribution. |
| 39 | * * Neither the name of Intel Corporation nor the names of its |
| 40 | * contributors may be used to endorse or promote products derived |
| 41 | * from this software without specific prior written permission. |
| 42 | * |
| 43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 44 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 45 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 46 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 47 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 48 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 49 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 50 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 51 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 52 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 53 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 54 | */ |
| 55 | |
| 56 | #include "isci.h" |
Dan Williams | ce2b326 | 2011-05-08 15:49:15 -0700 | [diff] [blame] | 57 | #include "host.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 58 | #include "phy.h" |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 59 | #include "scu_event_codes.h" |
Dan Williams | e2f8db50 | 2011-05-10 02:28:46 -0700 | [diff] [blame] | 60 | #include "probe_roms.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 61 | |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 62 | #undef C |
| 63 | #define C(a) (#a) |
| 64 | static const char *phy_state_name(enum sci_phy_states state) |
| 65 | { |
| 66 | static const char * const strings[] = PHY_STATES; |
| 67 | |
| 68 | return strings[state]; |
| 69 | } |
| 70 | #undef C |
| 71 | |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 72 | /* Maximum arbitration wait time in micro-seconds */ |
| 73 | #define SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME (700) |
| 74 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 75 | enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 76 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 77 | return iphy->max_negotiated_speed; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 78 | } |
| 79 | |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 80 | static struct isci_host *phy_to_host(struct isci_phy *iphy) |
Dan Williams | c132f69 | 2012-01-03 23:26:08 -0800 | [diff] [blame] | 81 | { |
| 82 | struct isci_phy *table = iphy - iphy->phy_index; |
| 83 | struct isci_host *ihost = container_of(table, typeof(*ihost), phys[0]); |
| 84 | |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 85 | return ihost; |
| 86 | } |
| 87 | |
| 88 | static struct device *sciphy_to_dev(struct isci_phy *iphy) |
| 89 | { |
| 90 | return &phy_to_host(iphy)->pdev->dev; |
Dan Williams | c132f69 | 2012-01-03 23:26:08 -0800 | [diff] [blame] | 91 | } |
| 92 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 93 | static enum sci_status |
| 94 | sci_phy_transport_layer_initialization(struct isci_phy *iphy, |
| 95 | struct scu_transport_layer_registers __iomem *reg) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 96 | { |
| 97 | u32 tl_control; |
| 98 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 99 | iphy->transport_layer_registers = reg; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 100 | |
| 101 | writel(SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 102 | &iphy->transport_layer_registers->stp_rni); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 103 | |
| 104 | /* |
| 105 | * Hardware team recommends that we enable the STP prefetch for all |
| 106 | * transports |
| 107 | */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 108 | tl_control = readl(&iphy->transport_layer_registers->control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 109 | tl_control |= SCU_TLCR_GEN_BIT(STP_WRITE_DATA_PREFETCH); |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 110 | writel(tl_control, &iphy->transport_layer_registers->control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 111 | |
| 112 | return SCI_SUCCESS; |
| 113 | } |
| 114 | |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 115 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 116 | sci_phy_link_layer_initialization(struct isci_phy *iphy, |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 117 | struct scu_link_layer_registers __iomem *llr) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 118 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 119 | struct isci_host *ihost = iphy->owning_port->owning_controller; |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 120 | struct sci_phy_user_params *phy_user; |
| 121 | struct sci_phy_oem_params *phy_oem; |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 122 | int phy_idx = iphy->phy_index; |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 123 | struct sci_phy_cap phy_cap; |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 124 | u32 phy_configuration; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 125 | u32 parity_check = 0; |
| 126 | u32 parity_count = 0; |
| 127 | u32 llctl, link_rate; |
| 128 | u32 clksm_value = 0; |
Marcin Tomczak | 985af6f | 2011-07-29 17:16:50 -0700 | [diff] [blame] | 129 | u32 sp_timeouts = 0; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 130 | |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 131 | phy_user = &ihost->user_parameters.phys[phy_idx]; |
| 132 | phy_oem = &ihost->oem_parameters.phys[phy_idx]; |
| 133 | iphy->link_layer_registers = llr; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 134 | |
| 135 | /* Set our IDENTIFY frame data */ |
| 136 | #define SCI_END_DEVICE 0x01 |
| 137 | |
| 138 | writel(SCU_SAS_TIID_GEN_BIT(SMP_INITIATOR) | |
| 139 | SCU_SAS_TIID_GEN_BIT(SSP_INITIATOR) | |
| 140 | SCU_SAS_TIID_GEN_BIT(STP_INITIATOR) | |
| 141 | SCU_SAS_TIID_GEN_BIT(DA_SATA_HOST) | |
| 142 | SCU_SAS_TIID_GEN_VAL(DEVICE_TYPE, SCI_END_DEVICE), |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 143 | &llr->transmit_identification); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 144 | |
| 145 | /* Write the device SAS Address */ |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 146 | writel(0xFEDCBA98, &llr->sas_device_name_high); |
| 147 | writel(phy_idx, &llr->sas_device_name_low); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 148 | |
| 149 | /* Write the source SAS Address */ |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 150 | writel(phy_oem->sas_address.high, &llr->source_sas_address_high); |
| 151 | writel(phy_oem->sas_address.low, &llr->source_sas_address_low); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 152 | |
| 153 | /* Clear and Set the PHY Identifier */ |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 154 | writel(0, &llr->identify_frame_phy_id); |
| 155 | writel(SCU_SAS_TIPID_GEN_VALUE(ID, phy_idx), &llr->identify_frame_phy_id); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 156 | |
| 157 | /* Change the initial state of the phy configuration register */ |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 158 | phy_configuration = readl(&llr->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 159 | |
| 160 | /* Hold OOB state machine in reset */ |
| 161 | phy_configuration |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET); |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 162 | writel(phy_configuration, &llr->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 163 | |
| 164 | /* Configure the SNW capabilities */ |
| 165 | phy_cap.all = 0; |
| 166 | phy_cap.start = 1; |
| 167 | phy_cap.gen3_no_ssc = 1; |
| 168 | phy_cap.gen2_no_ssc = 1; |
| 169 | phy_cap.gen1_no_ssc = 1; |
Dave Jiang | 594e566a | 2012-01-04 01:32:44 -0800 | [diff] [blame] | 170 | if (ihost->oem_parameters.controller.do_enable_ssc) { |
| 171 | struct scu_afe_registers __iomem *afe = &ihost->scu_registers->afe; |
| 172 | struct scu_afe_transceiver *xcvr = &afe->scu_afe_xcvr[phy_idx]; |
| 173 | struct isci_pci_info *pci_info = to_pci_info(ihost->pdev); |
| 174 | bool en_sas = false; |
| 175 | bool en_sata = false; |
| 176 | u32 sas_type = 0; |
| 177 | u32 sata_spread = 0x2; |
| 178 | u32 sas_spread = 0x2; |
| 179 | |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 180 | phy_cap.gen3_ssc = 1; |
| 181 | phy_cap.gen2_ssc = 1; |
| 182 | phy_cap.gen1_ssc = 1; |
Dave Jiang | 594e566a | 2012-01-04 01:32:44 -0800 | [diff] [blame] | 183 | |
| 184 | if (pci_info->orom->hdr.version < ISCI_ROM_VER_1_1) |
| 185 | en_sas = en_sata = true; |
| 186 | else { |
| 187 | sata_spread = ihost->oem_parameters.controller.ssc_sata_tx_spread_level; |
| 188 | sas_spread = ihost->oem_parameters.controller.ssc_sas_tx_spread_level; |
| 189 | |
| 190 | if (sata_spread) |
| 191 | en_sata = true; |
| 192 | |
| 193 | if (sas_spread) { |
| 194 | en_sas = true; |
| 195 | sas_type = ihost->oem_parameters.controller.ssc_sas_tx_type; |
| 196 | } |
| 197 | |
| 198 | } |
| 199 | |
| 200 | if (en_sas) { |
| 201 | u32 reg; |
| 202 | |
| 203 | reg = readl(&xcvr->afe_xcvr_control0); |
| 204 | reg |= (0x00100000 | (sas_type << 19)); |
| 205 | writel(reg, &xcvr->afe_xcvr_control0); |
| 206 | |
| 207 | reg = readl(&xcvr->afe_tx_ssc_control); |
| 208 | reg |= sas_spread << 8; |
| 209 | writel(reg, &xcvr->afe_tx_ssc_control); |
| 210 | } |
| 211 | |
| 212 | if (en_sata) { |
| 213 | u32 reg; |
| 214 | |
| 215 | reg = readl(&xcvr->afe_tx_ssc_control); |
| 216 | reg |= sata_spread; |
| 217 | writel(reg, &xcvr->afe_tx_ssc_control); |
| 218 | |
| 219 | reg = readl(&llr->stp_control); |
| 220 | reg |= 1 << 12; |
| 221 | writel(reg, &llr->stp_control); |
| 222 | } |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 223 | } |
| 224 | |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 225 | /* The SAS specification indicates that the phy_capabilities that |
| 226 | * are transmitted shall have an even parity. Calculate the parity. |
| 227 | */ |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 228 | parity_check = phy_cap.all; |
| 229 | while (parity_check != 0) { |
| 230 | if (parity_check & 0x1) |
| 231 | parity_count++; |
| 232 | parity_check >>= 1; |
| 233 | } |
| 234 | |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 235 | /* If parity indicates there are an odd number of bits set, then |
| 236 | * set the parity bit to 1 in the phy capabilities. |
| 237 | */ |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 238 | if ((parity_count % 2) != 0) |
| 239 | phy_cap.parity = 1; |
| 240 | |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 241 | writel(phy_cap.all, &llr->phy_capabilities); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 242 | |
| 243 | /* Set the enable spinup period but disable the ability to send |
| 244 | * notify enable spinup |
| 245 | */ |
| 246 | writel(SCU_ENSPINUP_GEN_VAL(COUNT, |
| 247 | phy_user->notify_enable_spin_up_insertion_frequency), |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 248 | &llr->notify_enable_spinup_control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 249 | |
| 250 | /* Write the ALIGN Insertion Ferequency for connected phy and |
| 251 | * inpendent of connected state |
| 252 | */ |
| 253 | clksm_value = SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(CONNECTED, |
| 254 | phy_user->in_connection_align_insertion_frequency); |
| 255 | |
| 256 | clksm_value |= SCU_ALIGN_INSERTION_FREQUENCY_GEN_VAL(GENERAL, |
| 257 | phy_user->align_insertion_frequency); |
| 258 | |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 259 | writel(clksm_value, &llr->clock_skew_management); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 260 | |
Jeff Skirvin | afd13a1 | 2012-01-04 01:32:39 -0800 | [diff] [blame] | 261 | if (is_c0(ihost->pdev) || is_c1(ihost->pdev)) { |
| 262 | writel(0x04210400, &llr->afe_lookup_table_control); |
| 263 | writel(0x020A7C05, &llr->sas_primitive_timeout); |
| 264 | } else |
| 265 | writel(0x02108421, &llr->afe_lookup_table_control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 266 | |
| 267 | llctl = SCU_SAS_LLCTL_GEN_VAL(NO_OUTBOUND_TASK_TIMEOUT, |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 268 | (u8)ihost->user_parameters.no_outbound_task_timeout); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 269 | |
James Bottomley | a5ec7f86 | 2011-07-03 14:14:45 -0500 | [diff] [blame] | 270 | switch (phy_user->max_speed_generation) { |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 271 | case SCIC_SDS_PARM_GEN3_SPEED: |
| 272 | link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN3; |
| 273 | break; |
| 274 | case SCIC_SDS_PARM_GEN2_SPEED: |
| 275 | link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN2; |
| 276 | break; |
| 277 | default: |
| 278 | link_rate = SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1; |
| 279 | break; |
| 280 | } |
| 281 | llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate); |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 282 | writel(llctl, &llr->link_layer_control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 283 | |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 284 | sp_timeouts = readl(&llr->sas_phy_timeouts); |
Marcin Tomczak | 985af6f | 2011-07-29 17:16:50 -0700 | [diff] [blame] | 285 | |
| 286 | /* Clear the default 0x36 (54us) RATE_CHANGE timeout value. */ |
| 287 | sp_timeouts &= ~SCU_SAS_PHYTOV_GEN_VAL(RATE_CHANGE, 0xFF); |
| 288 | |
| 289 | /* Set RATE_CHANGE timeout value to 0x3B (59us). This ensures SCU can |
| 290 | * lock with 3Gb drive when SCU max rate is set to 1.5Gb. |
| 291 | */ |
| 292 | sp_timeouts |= SCU_SAS_PHYTOV_GEN_VAL(RATE_CHANGE, 0x3B); |
| 293 | |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 294 | writel(sp_timeouts, &llr->sas_phy_timeouts); |
Marcin Tomczak | 985af6f | 2011-07-29 17:16:50 -0700 | [diff] [blame] | 295 | |
Dan Williams | dc00c8b | 2011-07-01 11:41:21 -0700 | [diff] [blame] | 296 | if (is_a2(ihost->pdev)) { |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 297 | /* Program the max ARB time for the PHY to 700us so we |
| 298 | * inter-operate with the PMC expander which shuts down |
| 299 | * PHYs if the expander PHY generates too many breaks. |
| 300 | * This time value will guarantee that the initiator PHY |
| 301 | * will generate the break. |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 302 | */ |
| 303 | writel(SCIC_SDS_PHY_MAX_ARBITRATION_WAIT_TIME, |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 304 | &llr->maximum_arbitration_wait_timer_timeout); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 305 | } |
| 306 | |
Dan Williams | 2e5da88 | 2012-01-04 01:32:34 -0800 | [diff] [blame] | 307 | /* Disable link layer hang detection, rely on the OS timeout for |
| 308 | * I/O timeouts. |
| 309 | */ |
| 310 | writel(0, &llr->link_layer_hang_detection_timeout); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 311 | |
| 312 | /* We can exit the initial state to the stopped state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 313 | sci_change_state(&iphy->sm, SCI_PHY_STOPPED); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 314 | |
| 315 | return SCI_SUCCESS; |
| 316 | } |
| 317 | |
Edmund Nadolski | a628d47 | 2011-05-19 11:59:36 +0000 | [diff] [blame] | 318 | static void phy_sata_timeout(unsigned long data) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 319 | { |
Edmund Nadolski | a628d47 | 2011-05-19 11:59:36 +0000 | [diff] [blame] | 320 | struct sci_timer *tmr = (struct sci_timer *)data; |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 321 | struct isci_phy *iphy = container_of(tmr, typeof(*iphy), sata_timer); |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 322 | struct isci_host *ihost = iphy->owning_port->owning_controller; |
Edmund Nadolski | a628d47 | 2011-05-19 11:59:36 +0000 | [diff] [blame] | 323 | unsigned long flags; |
| 324 | |
| 325 | spin_lock_irqsave(&ihost->scic_lock, flags); |
| 326 | |
| 327 | if (tmr->cancel) |
| 328 | goto done; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 329 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 330 | dev_dbg(sciphy_to_dev(iphy), |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 331 | "%s: SCIC SDS Phy 0x%p did not receive signature fis before " |
| 332 | "timeout.\n", |
| 333 | __func__, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 334 | iphy); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 335 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 336 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Edmund Nadolski | a628d47 | 2011-05-19 11:59:36 +0000 | [diff] [blame] | 337 | done: |
| 338 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 339 | } |
| 340 | |
| 341 | /** |
| 342 | * This method returns the port currently containing this phy. If the phy is |
| 343 | * currently contained by the dummy port, then the phy is considered to not |
| 344 | * be part of a port. |
| 345 | * @sci_phy: This parameter specifies the phy for which to retrieve the |
| 346 | * containing port. |
| 347 | * |
| 348 | * This method returns a handle to a port that contains the supplied phy. |
| 349 | * NULL This value is returned if the phy is not part of a real |
| 350 | * port (i.e. it's contained in the dummy port). !NULL All other |
| 351 | * values indicate a handle/pointer to the port containing the phy. |
| 352 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 353 | struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 354 | { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 355 | struct isci_port *iport = iphy->owning_port; |
| 356 | |
| 357 | if (iport->physical_port_index == SCIC_SDS_DUMMY_PORT) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 358 | return NULL; |
| 359 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 360 | return iphy->owning_port; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 361 | } |
| 362 | |
| 363 | /** |
| 364 | * This method will assign a port to the phy object. |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 365 | * @out]: iphy This parameter specifies the phy for which to assign a port |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 366 | * object. |
| 367 | * |
| 368 | * |
| 369 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 370 | void sci_phy_set_port( |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 371 | struct isci_phy *iphy, |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 372 | struct isci_port *iport) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 373 | { |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 374 | iphy->owning_port = iport; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 375 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 376 | if (iphy->bcn_received_while_port_unassigned) { |
| 377 | iphy->bcn_received_while_port_unassigned = false; |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 378 | sci_port_broadcast_change_received(iphy->owning_port, iphy); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 379 | } |
| 380 | } |
| 381 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 382 | enum sci_status sci_phy_initialize(struct isci_phy *iphy, |
| 383 | struct scu_transport_layer_registers __iomem *tl, |
| 384 | struct scu_link_layer_registers __iomem *ll) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 385 | { |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 386 | /* Perfrom the initialization of the TL hardware */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 387 | sci_phy_transport_layer_initialization(iphy, tl); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 388 | |
| 389 | /* Perofrm the initialization of the PE hardware */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 390 | sci_phy_link_layer_initialization(iphy, ll); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 391 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 392 | /* There is nothing that needs to be done in this state just |
| 393 | * transition to the stopped state |
| 394 | */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 395 | sci_change_state(&iphy->sm, SCI_PHY_STOPPED); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 396 | |
| 397 | return SCI_SUCCESS; |
| 398 | } |
| 399 | |
| 400 | /** |
| 401 | * This method assigns the direct attached device ID for this phy. |
| 402 | * |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 403 | * @iphy The phy for which the direct attached device id is to |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 404 | * be assigned. |
| 405 | * @device_id The direct attached device ID to assign to the phy. |
| 406 | * This will either be the RNi for the device or an invalid RNi if there |
| 407 | * is no current device assigned to the phy. |
| 408 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 409 | void sci_phy_setup_transport(struct isci_phy *iphy, u32 device_id) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 410 | { |
| 411 | u32 tl_control; |
| 412 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 413 | writel(device_id, &iphy->transport_layer_registers->stp_rni); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 414 | |
| 415 | /* |
| 416 | * The read should guarantee that the first write gets posted |
| 417 | * before the next write |
| 418 | */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 419 | tl_control = readl(&iphy->transport_layer_registers->control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 420 | tl_control |= SCU_TLCR_GEN_BIT(CLEAR_TCI_NCQ_MAPPING_TABLE); |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 421 | writel(tl_control, &iphy->transport_layer_registers->control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 422 | } |
| 423 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 424 | static void sci_phy_suspend(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 425 | { |
| 426 | u32 scu_sas_pcfg_value; |
| 427 | |
| 428 | scu_sas_pcfg_value = |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 429 | readl(&iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 430 | scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE); |
| 431 | writel(scu_sas_pcfg_value, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 432 | &iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 433 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 434 | sci_phy_setup_transport(iphy, SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 435 | } |
| 436 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 437 | void sci_phy_resume(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 438 | { |
| 439 | u32 scu_sas_pcfg_value; |
| 440 | |
| 441 | scu_sas_pcfg_value = |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 442 | readl(&iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 443 | scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE); |
| 444 | writel(scu_sas_pcfg_value, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 445 | &iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 446 | } |
| 447 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 448 | void sci_phy_get_sas_address(struct isci_phy *iphy, struct sci_sas_address *sas) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 449 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 450 | sas->high = readl(&iphy->link_layer_registers->source_sas_address_high); |
| 451 | sas->low = readl(&iphy->link_layer_registers->source_sas_address_low); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 452 | } |
| 453 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 454 | void sci_phy_get_attached_sas_address(struct isci_phy *iphy, struct sci_sas_address *sas) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 455 | { |
| 456 | struct sas_identify_frame *iaf; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 457 | |
| 458 | iaf = &iphy->frame_rcvd.iaf; |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 459 | memcpy(sas, iaf->sas_addr, SAS_ADDR_SIZE); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 460 | } |
| 461 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 462 | void sci_phy_get_protocols(struct isci_phy *iphy, struct sci_phy_proto *proto) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 463 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 464 | proto->all = readl(&iphy->link_layer_registers->transmit_identification); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 465 | } |
| 466 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 467 | enum sci_status sci_phy_start(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 468 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 469 | enum sci_phy_states state = iphy->sm.current_state_id; |
Dan Williams | 966699b | 2011-05-12 03:44:24 -0700 | [diff] [blame] | 470 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 471 | if (state != SCI_PHY_STOPPED) { |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 472 | dev_dbg(sciphy_to_dev(iphy), "%s: in wrong state: %s\n", |
| 473 | __func__, phy_state_name(state)); |
Dan Williams | 966699b | 2011-05-12 03:44:24 -0700 | [diff] [blame] | 474 | return SCI_FAILURE_INVALID_STATE; |
| 475 | } |
| 476 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 477 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 966699b | 2011-05-12 03:44:24 -0700 | [diff] [blame] | 478 | return SCI_SUCCESS; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 479 | } |
| 480 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 481 | enum sci_status sci_phy_stop(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 482 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 483 | enum sci_phy_states state = iphy->sm.current_state_id; |
Dan Williams | 9315323 | 2011-05-12 04:01:03 -0700 | [diff] [blame] | 484 | |
| 485 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 486 | case SCI_PHY_SUB_INITIAL: |
| 487 | case SCI_PHY_SUB_AWAIT_OSSP_EN: |
| 488 | case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN: |
| 489 | case SCI_PHY_SUB_AWAIT_SAS_POWER: |
| 490 | case SCI_PHY_SUB_AWAIT_SATA_POWER: |
| 491 | case SCI_PHY_SUB_AWAIT_SATA_PHY_EN: |
| 492 | case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN: |
| 493 | case SCI_PHY_SUB_AWAIT_SIG_FIS_UF: |
| 494 | case SCI_PHY_SUB_FINAL: |
| 495 | case SCI_PHY_READY: |
Dan Williams | 9315323 | 2011-05-12 04:01:03 -0700 | [diff] [blame] | 496 | break; |
| 497 | default: |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 498 | dev_dbg(sciphy_to_dev(iphy), "%s: in wrong state: %s\n", |
| 499 | __func__, phy_state_name(state)); |
Dan Williams | 9315323 | 2011-05-12 04:01:03 -0700 | [diff] [blame] | 500 | return SCI_FAILURE_INVALID_STATE; |
| 501 | } |
| 502 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 503 | sci_change_state(&iphy->sm, SCI_PHY_STOPPED); |
Dan Williams | 9315323 | 2011-05-12 04:01:03 -0700 | [diff] [blame] | 504 | return SCI_SUCCESS; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 505 | } |
| 506 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 507 | enum sci_status sci_phy_reset(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 508 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 509 | enum sci_phy_states state = iphy->sm.current_state_id; |
Dan Williams | 0cf36fa | 2011-05-12 04:02:07 -0700 | [diff] [blame] | 510 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 511 | if (state != SCI_PHY_READY) { |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 512 | dev_dbg(sciphy_to_dev(iphy), "%s: in wrong state: %s\n", |
| 513 | __func__, phy_state_name(state)); |
Dan Williams | 0cf36fa | 2011-05-12 04:02:07 -0700 | [diff] [blame] | 514 | return SCI_FAILURE_INVALID_STATE; |
| 515 | } |
| 516 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 517 | sci_change_state(&iphy->sm, SCI_PHY_RESETTING); |
Dan Williams | 0cf36fa | 2011-05-12 04:02:07 -0700 | [diff] [blame] | 518 | return SCI_SUCCESS; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 519 | } |
| 520 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 521 | enum sci_status sci_phy_consume_power_handler(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 522 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 523 | enum sci_phy_states state = iphy->sm.current_state_id; |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 524 | |
| 525 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 526 | case SCI_PHY_SUB_AWAIT_SAS_POWER: { |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 527 | u32 enable_spinup; |
| 528 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 529 | enable_spinup = readl(&iphy->link_layer_registers->notify_enable_spinup_control); |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 530 | enable_spinup |= SCU_ENSPINUP_GEN_BIT(ENABLE); |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 531 | writel(enable_spinup, &iphy->link_layer_registers->notify_enable_spinup_control); |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 532 | |
| 533 | /* Change state to the final state this substate machine has run to completion */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 534 | sci_change_state(&iphy->sm, SCI_PHY_SUB_FINAL); |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 535 | |
| 536 | return SCI_SUCCESS; |
| 537 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 538 | case SCI_PHY_SUB_AWAIT_SATA_POWER: { |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 539 | u32 scu_sas_pcfg_value; |
| 540 | |
| 541 | /* Release the spinup hold state and reset the OOB state machine */ |
| 542 | scu_sas_pcfg_value = |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 543 | readl(&iphy->link_layer_registers->phy_configuration); |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 544 | scu_sas_pcfg_value &= |
| 545 | ~(SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD) | SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE)); |
| 546 | scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_RESET); |
| 547 | writel(scu_sas_pcfg_value, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 548 | &iphy->link_layer_registers->phy_configuration); |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 549 | |
| 550 | /* Now restart the OOB operation */ |
| 551 | scu_sas_pcfg_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET); |
| 552 | scu_sas_pcfg_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE); |
| 553 | writel(scu_sas_pcfg_value, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 554 | &iphy->link_layer_registers->phy_configuration); |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 555 | |
| 556 | /* Change state to the final state this substate machine has run to completion */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 557 | sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_PHY_EN); |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 558 | |
| 559 | return SCI_SUCCESS; |
| 560 | } |
| 561 | default: |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 562 | dev_dbg(sciphy_to_dev(iphy), "%s: in wrong state: %s\n", |
| 563 | __func__, phy_state_name(state)); |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 564 | return SCI_FAILURE_INVALID_STATE; |
| 565 | } |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 566 | } |
| 567 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 568 | static void sci_phy_start_sas_link_training(struct isci_phy *iphy) |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 569 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 570 | /* continue the link training for the phy as if it were a SAS PHY |
| 571 | * instead of a SATA PHY. This is done because the completion queue had a SAS |
| 572 | * PHY DETECTED event when the state machine was expecting a SATA PHY event. |
| 573 | */ |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 574 | u32 phy_control; |
| 575 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 576 | phy_control = readl(&iphy->link_layer_registers->phy_configuration); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 577 | phy_control |= SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD); |
| 578 | writel(phy_control, |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 579 | &iphy->link_layer_registers->phy_configuration); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 580 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 581 | sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SAS_SPEED_EN); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 582 | |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 583 | iphy->protocol = SAS_PROTOCOL_SSP; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 584 | } |
| 585 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 586 | static void sci_phy_start_sata_link_training(struct isci_phy *iphy) |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 587 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 588 | /* This method continues the link training for the phy as if it were a SATA PHY |
| 589 | * instead of a SAS PHY. This is done because the completion queue had a SATA |
| 590 | * SPINUP HOLD event when the state machine was expecting a SAS PHY event. none |
| 591 | */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 592 | sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_POWER); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 593 | |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 594 | iphy->protocol = SAS_PROTOCOL_SATA; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 595 | } |
| 596 | |
| 597 | /** |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 598 | * sci_phy_complete_link_training - perform processing common to |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 599 | * all protocols upon completion of link training. |
| 600 | * @sci_phy: This parameter specifies the phy object for which link training |
| 601 | * has completed. |
| 602 | * @max_link_rate: This parameter specifies the maximum link rate to be |
| 603 | * associated with this phy. |
| 604 | * @next_state: This parameter specifies the next state for the phy's starting |
| 605 | * sub-state machine. |
| 606 | * |
| 607 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 608 | static void sci_phy_complete_link_training(struct isci_phy *iphy, |
| 609 | enum sas_linkrate max_link_rate, |
| 610 | u32 next_state) |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 611 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 612 | iphy->max_negotiated_speed = max_link_rate; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 613 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 614 | sci_change_state(&iphy->sm, next_state); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 615 | } |
| 616 | |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 617 | static const char *phy_event_name(u32 event_code) |
| 618 | { |
| 619 | switch (scu_get_event_code(event_code)) { |
| 620 | case SCU_EVENT_PORT_SELECTOR_DETECTED: |
| 621 | return "port selector"; |
| 622 | case SCU_EVENT_SENT_PORT_SELECTION: |
| 623 | return "port selection"; |
| 624 | case SCU_EVENT_HARD_RESET_TRANSMITTED: |
| 625 | return "tx hard reset"; |
| 626 | case SCU_EVENT_HARD_RESET_RECEIVED: |
| 627 | return "rx hard reset"; |
| 628 | case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT: |
| 629 | return "identify timeout"; |
| 630 | case SCU_EVENT_LINK_FAILURE: |
| 631 | return "link fail"; |
| 632 | case SCU_EVENT_SATA_SPINUP_HOLD: |
| 633 | return "sata spinup hold"; |
| 634 | case SCU_EVENT_SAS_15_SSC: |
| 635 | case SCU_EVENT_SAS_15: |
| 636 | return "sas 1.5"; |
| 637 | case SCU_EVENT_SAS_30_SSC: |
| 638 | case SCU_EVENT_SAS_30: |
| 639 | return "sas 3.0"; |
| 640 | case SCU_EVENT_SAS_60_SSC: |
| 641 | case SCU_EVENT_SAS_60: |
| 642 | return "sas 6.0"; |
| 643 | case SCU_EVENT_SATA_15_SSC: |
| 644 | case SCU_EVENT_SATA_15: |
| 645 | return "sata 1.5"; |
| 646 | case SCU_EVENT_SATA_30_SSC: |
| 647 | case SCU_EVENT_SATA_30: |
| 648 | return "sata 3.0"; |
| 649 | case SCU_EVENT_SATA_60_SSC: |
| 650 | case SCU_EVENT_SATA_60: |
| 651 | return "sata 6.0"; |
| 652 | case SCU_EVENT_SAS_PHY_DETECTED: |
| 653 | return "sas detect"; |
| 654 | case SCU_EVENT_SATA_PHY_DETECTED: |
| 655 | return "sata detect"; |
| 656 | default: |
| 657 | return "unknown"; |
| 658 | } |
| 659 | } |
| 660 | |
| 661 | #define phy_event_dbg(iphy, state, code) \ |
| 662 | dev_dbg(sciphy_to_dev(iphy), "phy-%d:%d: %s event: %s (%x)\n", \ |
| 663 | phy_to_host(iphy)->id, iphy->phy_index, \ |
| 664 | phy_state_name(state), phy_event_name(code), code) |
| 665 | |
| 666 | #define phy_event_warn(iphy, state, code) \ |
| 667 | dev_warn(sciphy_to_dev(iphy), "phy-%d:%d: %s event: %s (%x)\n", \ |
| 668 | phy_to_host(iphy)->id, iphy->phy_index, \ |
| 669 | phy_state_name(state), phy_event_name(code), code) |
| 670 | |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 671 | |
| 672 | void scu_link_layer_set_txcomsas_timeout(struct isci_phy *iphy, u32 timeout) |
| 673 | { |
| 674 | u32 val; |
| 675 | |
| 676 | /* Extend timeout */ |
| 677 | val = readl(&iphy->link_layer_registers->transmit_comsas_signal); |
| 678 | val &= ~SCU_SAS_LLTXCOMSAS_GEN_VAL(NEGTIME, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_MASK); |
| 679 | val |= SCU_SAS_LLTXCOMSAS_GEN_VAL(NEGTIME, timeout); |
| 680 | |
| 681 | writel(val, &iphy->link_layer_registers->transmit_comsas_signal); |
| 682 | } |
| 683 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 684 | enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code) |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 685 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 686 | enum sci_phy_states state = iphy->sm.current_state_id; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 687 | |
| 688 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 689 | case SCI_PHY_SUB_AWAIT_OSSP_EN: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 690 | switch (scu_get_event_code(event_code)) { |
| 691 | case SCU_EVENT_SAS_PHY_DETECTED: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 692 | sci_phy_start_sas_link_training(iphy); |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 693 | iphy->is_in_link_training = true; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 694 | break; |
| 695 | case SCU_EVENT_SATA_SPINUP_HOLD: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 696 | sci_phy_start_sata_link_training(iphy); |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 697 | iphy->is_in_link_training = true; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 698 | break; |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 699 | case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT: |
| 700 | /* Extend timeout value */ |
| 701 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_EXTENDED); |
| 702 | |
| 703 | /* Start the oob/sn state machine over again */ |
| 704 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
| 705 | break; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 706 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 707 | phy_event_dbg(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 708 | return SCI_FAILURE; |
| 709 | } |
| 710 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 711 | case SCI_PHY_SUB_AWAIT_SAS_SPEED_EN: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 712 | switch (scu_get_event_code(event_code)) { |
| 713 | case SCU_EVENT_SAS_PHY_DETECTED: |
| 714 | /* |
| 715 | * Why is this being reported again by the controller? |
| 716 | * We would re-enter this state so just stay here */ |
| 717 | break; |
| 718 | case SCU_EVENT_SAS_15: |
| 719 | case SCU_EVENT_SAS_15_SSC: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 720 | sci_phy_complete_link_training(iphy, SAS_LINK_RATE_1_5_GBPS, |
| 721 | SCI_PHY_SUB_AWAIT_IAF_UF); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 722 | break; |
| 723 | case SCU_EVENT_SAS_30: |
| 724 | case SCU_EVENT_SAS_30_SSC: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 725 | sci_phy_complete_link_training(iphy, SAS_LINK_RATE_3_0_GBPS, |
| 726 | SCI_PHY_SUB_AWAIT_IAF_UF); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 727 | break; |
| 728 | case SCU_EVENT_SAS_60: |
| 729 | case SCU_EVENT_SAS_60_SSC: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 730 | sci_phy_complete_link_training(iphy, SAS_LINK_RATE_6_0_GBPS, |
| 731 | SCI_PHY_SUB_AWAIT_IAF_UF); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 732 | break; |
| 733 | case SCU_EVENT_SATA_SPINUP_HOLD: |
| 734 | /* |
| 735 | * We were doing SAS PHY link training and received a SATA PHY event |
| 736 | * continue OOB/SN as if this were a SATA PHY */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 737 | sci_phy_start_sata_link_training(iphy); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 738 | break; |
| 739 | case SCU_EVENT_LINK_FAILURE: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 740 | /* Change the timeout value to default */ |
| 741 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT); |
| 742 | |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 743 | /* Link failure change state back to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 744 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 745 | break; |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 746 | case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT: |
| 747 | /* Extend the timeout value */ |
| 748 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_EXTENDED); |
| 749 | |
| 750 | /* Start the oob/sn state machine over again */ |
| 751 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
| 752 | break; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 753 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 754 | phy_event_warn(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 755 | return SCI_FAILURE; |
| 756 | break; |
| 757 | } |
| 758 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 759 | case SCI_PHY_SUB_AWAIT_IAF_UF: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 760 | switch (scu_get_event_code(event_code)) { |
| 761 | case SCU_EVENT_SAS_PHY_DETECTED: |
| 762 | /* Backup the state machine */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 763 | sci_phy_start_sas_link_training(iphy); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 764 | break; |
| 765 | case SCU_EVENT_SATA_SPINUP_HOLD: |
| 766 | /* We were doing SAS PHY link training and received a |
| 767 | * SATA PHY event continue OOB/SN as if this were a |
| 768 | * SATA PHY |
| 769 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 770 | sci_phy_start_sata_link_training(iphy); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 771 | break; |
| 772 | case SCU_EVENT_RECEIVED_IDENTIFY_TIMEOUT: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 773 | /* Extend the timeout value */ |
| 774 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_EXTENDED); |
| 775 | |
| 776 | /* Start the oob/sn state machine over again */ |
| 777 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
| 778 | break; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 779 | case SCU_EVENT_LINK_FAILURE: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 780 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 781 | case SCU_EVENT_HARD_RESET_RECEIVED: |
| 782 | /* Start the oob/sn state machine over again */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 783 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 784 | break; |
| 785 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 786 | phy_event_warn(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 787 | return SCI_FAILURE; |
| 788 | } |
| 789 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 790 | case SCI_PHY_SUB_AWAIT_SAS_POWER: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 791 | switch (scu_get_event_code(event_code)) { |
| 792 | case SCU_EVENT_LINK_FAILURE: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 793 | /* Change the timeout value to default */ |
| 794 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT); |
| 795 | |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 796 | /* Link failure change state back to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 797 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 798 | break; |
| 799 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 800 | phy_event_warn(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 801 | return SCI_FAILURE; |
| 802 | } |
| 803 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 804 | case SCI_PHY_SUB_AWAIT_SATA_POWER: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 805 | switch (scu_get_event_code(event_code)) { |
| 806 | case SCU_EVENT_LINK_FAILURE: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 807 | /* Change the timeout value to default */ |
| 808 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT); |
| 809 | |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 810 | /* Link failure change state back to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 811 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 812 | break; |
| 813 | case SCU_EVENT_SATA_SPINUP_HOLD: |
| 814 | /* These events are received every 10ms and are |
| 815 | * expected while in this state |
| 816 | */ |
| 817 | break; |
| 818 | |
| 819 | case SCU_EVENT_SAS_PHY_DETECTED: |
| 820 | /* There has been a change in the phy type before OOB/SN for the |
| 821 | * SATA finished start down the SAS link traning path. |
| 822 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 823 | sci_phy_start_sas_link_training(iphy); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 824 | break; |
| 825 | |
| 826 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 827 | phy_event_warn(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 828 | return SCI_FAILURE; |
| 829 | } |
| 830 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 831 | case SCI_PHY_SUB_AWAIT_SATA_PHY_EN: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 832 | switch (scu_get_event_code(event_code)) { |
| 833 | case SCU_EVENT_LINK_FAILURE: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 834 | /* Change the timeout value to default */ |
| 835 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT); |
| 836 | |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 837 | /* Link failure change state back to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 838 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 839 | break; |
| 840 | case SCU_EVENT_SATA_SPINUP_HOLD: |
| 841 | /* These events might be received since we dont know how many may be in |
| 842 | * the completion queue while waiting for power |
| 843 | */ |
| 844 | break; |
| 845 | case SCU_EVENT_SATA_PHY_DETECTED: |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 846 | iphy->protocol = SAS_PROTOCOL_SATA; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 847 | |
| 848 | /* We have received the SATA PHY notification change state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 849 | sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 850 | break; |
| 851 | case SCU_EVENT_SAS_PHY_DETECTED: |
| 852 | /* There has been a change in the phy type before OOB/SN for the |
| 853 | * SATA finished start down the SAS link traning path. |
| 854 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 855 | sci_phy_start_sas_link_training(iphy); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 856 | break; |
| 857 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 858 | phy_event_warn(iphy, state, event_code); |
Justin P. Mattock | 6993248 | 2011-07-26 23:06:29 -0700 | [diff] [blame] | 859 | return SCI_FAILURE; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 860 | } |
| 861 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 862 | case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 863 | switch (scu_get_event_code(event_code)) { |
| 864 | case SCU_EVENT_SATA_PHY_DETECTED: |
| 865 | /* |
| 866 | * The hardware reports multiple SATA PHY detected events |
| 867 | * ignore the extras */ |
| 868 | break; |
| 869 | case SCU_EVENT_SATA_15: |
| 870 | case SCU_EVENT_SATA_15_SSC: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 871 | sci_phy_complete_link_training(iphy, SAS_LINK_RATE_1_5_GBPS, |
| 872 | SCI_PHY_SUB_AWAIT_SIG_FIS_UF); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 873 | break; |
| 874 | case SCU_EVENT_SATA_30: |
| 875 | case SCU_EVENT_SATA_30_SSC: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 876 | sci_phy_complete_link_training(iphy, SAS_LINK_RATE_3_0_GBPS, |
| 877 | SCI_PHY_SUB_AWAIT_SIG_FIS_UF); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 878 | break; |
| 879 | case SCU_EVENT_SATA_60: |
| 880 | case SCU_EVENT_SATA_60_SSC: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 881 | sci_phy_complete_link_training(iphy, SAS_LINK_RATE_6_0_GBPS, |
| 882 | SCI_PHY_SUB_AWAIT_SIG_FIS_UF); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 883 | break; |
| 884 | case SCU_EVENT_LINK_FAILURE: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 885 | /* Change the timeout value to default */ |
| 886 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT); |
| 887 | |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 888 | /* Link failure change state back to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 889 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 890 | break; |
| 891 | case SCU_EVENT_SAS_PHY_DETECTED: |
| 892 | /* |
| 893 | * There has been a change in the phy type before OOB/SN for the |
| 894 | * SATA finished start down the SAS link traning path. */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 895 | sci_phy_start_sas_link_training(iphy); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 896 | break; |
| 897 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 898 | phy_event_warn(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 899 | return SCI_FAILURE; |
| 900 | } |
| 901 | |
| 902 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 903 | case SCI_PHY_SUB_AWAIT_SIG_FIS_UF: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 904 | switch (scu_get_event_code(event_code)) { |
| 905 | case SCU_EVENT_SATA_PHY_DETECTED: |
| 906 | /* Backup the state machine */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 907 | sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_SATA_SPEED_EN); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 908 | break; |
| 909 | |
| 910 | case SCU_EVENT_LINK_FAILURE: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 911 | /* Change the timeout value to default */ |
| 912 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT); |
| 913 | |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 914 | /* Link failure change state back to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 915 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 916 | break; |
| 917 | |
| 918 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 919 | phy_event_warn(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 920 | return SCI_FAILURE; |
| 921 | } |
| 922 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 923 | case SCI_PHY_READY: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 924 | switch (scu_get_event_code(event_code)) { |
| 925 | case SCU_EVENT_LINK_FAILURE: |
Andrzej Jakowski | 6119908 | 2012-03-08 19:38:50 +0000 | [diff] [blame] | 926 | /* Set default timeout */ |
| 927 | scu_link_layer_set_txcomsas_timeout(iphy, SCU_SAS_LINK_LAYER_TXCOMSAS_NEGTIME_DEFAULT); |
| 928 | |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 929 | /* Link failure change state back to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 930 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 931 | break; |
| 932 | case SCU_EVENT_BROADCAST_CHANGE: |
Tom Jackson | 944b787 | 2012-02-24 09:38:49 +0000 | [diff] [blame] | 933 | case SCU_EVENT_BROADCAST_SES: |
| 934 | case SCU_EVENT_BROADCAST_RESERVED0: |
| 935 | case SCU_EVENT_BROADCAST_RESERVED1: |
| 936 | case SCU_EVENT_BROADCAST_EXPANDER: |
| 937 | case SCU_EVENT_BROADCAST_AEN: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 938 | /* Broadcast change received. Notify the port. */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 939 | if (phy_get_non_dummy_port(iphy) != NULL) |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 940 | sci_port_broadcast_change_received(iphy->owning_port, iphy); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 941 | else |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 942 | iphy->bcn_received_while_port_unassigned = true; |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 943 | break; |
Tom Jackson | 944b787 | 2012-02-24 09:38:49 +0000 | [diff] [blame] | 944 | case SCU_EVENT_BROADCAST_RESERVED3: |
| 945 | case SCU_EVENT_BROADCAST_RESERVED4: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 946 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 947 | phy_event_warn(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 948 | return SCI_FAILURE_INVALID_STATE; |
| 949 | } |
| 950 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 951 | case SCI_PHY_RESETTING: |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 952 | switch (scu_get_event_code(event_code)) { |
| 953 | case SCU_EVENT_HARD_RESET_TRANSMITTED: |
| 954 | /* Link failure change state back to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 955 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 956 | break; |
| 957 | default: |
Dan Williams | e462116 | 2012-02-10 01:18:49 -0800 | [diff] [blame] | 958 | phy_event_warn(iphy, state, event_code); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 959 | return SCI_FAILURE_INVALID_STATE; |
| 960 | break; |
| 961 | } |
| 962 | return SCI_SUCCESS; |
| 963 | default: |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 964 | dev_dbg(sciphy_to_dev(iphy), "%s: in wrong state: %s\n", |
| 965 | __func__, phy_state_name(state)); |
Dan Williams | 23506a6 | 2011-05-12 04:27:29 -0700 | [diff] [blame] | 966 | return SCI_FAILURE_INVALID_STATE; |
| 967 | } |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 968 | } |
| 969 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 970 | enum sci_status sci_phy_frame_handler(struct isci_phy *iphy, u32 frame_index) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 971 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 972 | enum sci_phy_states state = iphy->sm.current_state_id; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 973 | struct isci_host *ihost = iphy->owning_port->owning_controller; |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 974 | enum sci_status result; |
Dan Williams | 4cffe13 | 2011-06-23 23:44:52 -0700 | [diff] [blame] | 975 | unsigned long flags; |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 976 | |
| 977 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 978 | case SCI_PHY_SUB_AWAIT_IAF_UF: { |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 979 | u32 *frame_words; |
| 980 | struct sas_identify_frame iaf; |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 981 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 982 | result = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
| 983 | frame_index, |
| 984 | (void **)&frame_words); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 985 | |
| 986 | if (result != SCI_SUCCESS) |
| 987 | return result; |
| 988 | |
| 989 | sci_swab32_cpy(&iaf, frame_words, sizeof(iaf) / sizeof(u32)); |
| 990 | if (iaf.frame_type == 0) { |
| 991 | u32 state; |
| 992 | |
Dan Williams | 4cffe13 | 2011-06-23 23:44:52 -0700 | [diff] [blame] | 993 | spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 994 | memcpy(&iphy->frame_rcvd.iaf, &iaf, sizeof(iaf)); |
Dan Williams | 4cffe13 | 2011-06-23 23:44:52 -0700 | [diff] [blame] | 995 | spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 996 | if (iaf.smp_tport) { |
| 997 | /* We got the IAF for an expander PHY go to the final |
| 998 | * state since there are no power requirements for |
| 999 | * expander phys. |
| 1000 | */ |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1001 | state = SCI_PHY_SUB_FINAL; |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1002 | } else { |
| 1003 | /* We got the IAF we can now go to the await spinup |
| 1004 | * semaphore state |
| 1005 | */ |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1006 | state = SCI_PHY_SUB_AWAIT_SAS_POWER; |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1007 | } |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1008 | sci_change_state(&iphy->sm, state); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1009 | result = SCI_SUCCESS; |
| 1010 | } else |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1011 | dev_warn(sciphy_to_dev(iphy), |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1012 | "%s: PHY starting substate machine received " |
| 1013 | "unexpected frame id %x\n", |
| 1014 | __func__, frame_index); |
| 1015 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1016 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1017 | return result; |
| 1018 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1019 | case SCI_PHY_SUB_AWAIT_SIG_FIS_UF: { |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1020 | struct dev_to_host_fis *frame_header; |
| 1021 | u32 *fis_frame_data; |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1022 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1023 | result = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
| 1024 | frame_index, |
| 1025 | (void **)&frame_header); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1026 | |
| 1027 | if (result != SCI_SUCCESS) |
| 1028 | return result; |
| 1029 | |
| 1030 | if ((frame_header->fis_type == FIS_REGD2H) && |
| 1031 | !(frame_header->status & ATA_BUSY)) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1032 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
| 1033 | frame_index, |
| 1034 | (void **)&fis_frame_data); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1035 | |
Dan Williams | 4cffe13 | 2011-06-23 23:44:52 -0700 | [diff] [blame] | 1036 | spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags); |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1037 | sci_controller_copy_sata_response(&iphy->frame_rcvd.fis, |
| 1038 | frame_header, |
| 1039 | fis_frame_data); |
Dan Williams | 4cffe13 | 2011-06-23 23:44:52 -0700 | [diff] [blame] | 1040 | spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1041 | |
| 1042 | /* got IAF we can now go to the await spinup semaphore state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1043 | sci_change_state(&iphy->sm, SCI_PHY_SUB_FINAL); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1044 | |
| 1045 | result = SCI_SUCCESS; |
| 1046 | } else |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1047 | dev_warn(sciphy_to_dev(iphy), |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1048 | "%s: PHY starting substate machine received " |
| 1049 | "unexpected frame id %x\n", |
| 1050 | __func__, frame_index); |
| 1051 | |
| 1052 | /* Regardless of the result we are done with this frame with it */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1053 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1054 | |
| 1055 | return result; |
| 1056 | } |
| 1057 | default: |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 1058 | dev_dbg(sciphy_to_dev(iphy), "%s: in wrong state: %s\n", |
| 1059 | __func__, phy_state_name(state)); |
Dan Williams | c4441ab | 2011-05-12 04:17:51 -0700 | [diff] [blame] | 1060 | return SCI_FAILURE_INVALID_STATE; |
| 1061 | } |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1062 | |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1063 | } |
| 1064 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1065 | static void sci_phy_starting_initial_substate_enter(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1066 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1067 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1068 | |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1069 | /* This is just an temporary state go off to the starting state */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1070 | sci_change_state(&iphy->sm, SCI_PHY_SUB_AWAIT_OSSP_EN); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1071 | } |
| 1072 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1073 | static void sci_phy_starting_await_sas_power_substate_enter(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1074 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1075 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1076 | struct isci_host *ihost = iphy->owning_port->owning_controller; |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1077 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1078 | sci_controller_power_control_queue_insert(ihost, iphy); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1079 | } |
| 1080 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1081 | static void sci_phy_starting_await_sas_power_substate_exit(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1082 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1083 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1084 | struct isci_host *ihost = iphy->owning_port->owning_controller; |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1085 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1086 | sci_controller_power_control_queue_remove(ihost, iphy); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1087 | } |
| 1088 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1089 | static void sci_phy_starting_await_sata_power_substate_enter(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1090 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1091 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1092 | struct isci_host *ihost = iphy->owning_port->owning_controller; |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1093 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1094 | sci_controller_power_control_queue_insert(ihost, iphy); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1095 | } |
| 1096 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1097 | static void sci_phy_starting_await_sata_power_substate_exit(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1098 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1099 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1100 | struct isci_host *ihost = iphy->owning_port->owning_controller; |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1101 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1102 | sci_controller_power_control_queue_remove(ihost, iphy); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1103 | } |
| 1104 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1105 | static void sci_phy_starting_await_sata_phy_substate_enter(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1106 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1107 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1108 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1109 | sci_mod_timer(&iphy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1110 | } |
| 1111 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1112 | static void sci_phy_starting_await_sata_phy_substate_exit(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1113 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1114 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1115 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1116 | sci_del_timer(&iphy->sata_timer); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1117 | } |
| 1118 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1119 | static void sci_phy_starting_await_sata_speed_substate_enter(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1120 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1121 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1122 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1123 | sci_mod_timer(&iphy->sata_timer, SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1124 | } |
| 1125 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1126 | static void sci_phy_starting_await_sata_speed_substate_exit(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1127 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1128 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1129 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1130 | sci_del_timer(&iphy->sata_timer); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1131 | } |
| 1132 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1133 | static void sci_phy_starting_await_sig_fis_uf_substate_enter(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1134 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1135 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1136 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1137 | if (sci_port_link_detected(iphy->owning_port, iphy)) { |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1138 | |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1139 | /* |
| 1140 | * Clear the PE suspend condition so we can actually |
| 1141 | * receive SIG FIS |
| 1142 | * The hardware will not respond to the XRDY until the PE |
| 1143 | * suspend condition is cleared. |
| 1144 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1145 | sci_phy_resume(iphy); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1146 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1147 | sci_mod_timer(&iphy->sata_timer, |
Edmund Nadolski | a628d47 | 2011-05-19 11:59:36 +0000 | [diff] [blame] | 1148 | SCIC_SDS_SIGNATURE_FIS_TIMEOUT); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1149 | } else |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1150 | iphy->is_in_link_training = false; |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1151 | } |
| 1152 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1153 | static void sci_phy_starting_await_sig_fis_uf_substate_exit(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1154 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1155 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1156 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1157 | sci_del_timer(&iphy->sata_timer); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1158 | } |
| 1159 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1160 | static void sci_phy_starting_final_substate_enter(struct sci_base_state_machine *sm) |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1161 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1162 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1163 | |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1164 | /* State machine has run to completion so exit out and change |
| 1165 | * the base state machine to the ready state |
| 1166 | */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1167 | sci_change_state(&iphy->sm, SCI_PHY_READY); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1168 | } |
| 1169 | |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1170 | /** |
| 1171 | * |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1172 | * @sci_phy: This is the struct isci_phy object to stop. |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1173 | * |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1174 | * This method will stop the struct isci_phy object. This does not reset the |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1175 | * protocol engine it just suspends it and places it in a state where it will |
| 1176 | * not cause the end device to power up. none |
| 1177 | */ |
| 1178 | static void scu_link_layer_stop_protocol_engine( |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1179 | struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1180 | { |
| 1181 | u32 scu_sas_pcfg_value; |
| 1182 | u32 enable_spinup_value; |
| 1183 | |
| 1184 | /* Suspend the protocol engine and place it in a sata spinup hold state */ |
| 1185 | scu_sas_pcfg_value = |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1186 | readl(&iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1187 | scu_sas_pcfg_value |= |
| 1188 | (SCU_SAS_PCFG_GEN_BIT(OOB_RESET) | |
| 1189 | SCU_SAS_PCFG_GEN_BIT(SUSPEND_PROTOCOL_ENGINE) | |
| 1190 | SCU_SAS_PCFG_GEN_BIT(SATA_SPINUP_HOLD)); |
| 1191 | writel(scu_sas_pcfg_value, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1192 | &iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1193 | |
| 1194 | /* Disable the notify enable spinup primitives */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1195 | enable_spinup_value = readl(&iphy->link_layer_registers->notify_enable_spinup_control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1196 | enable_spinup_value &= ~SCU_ENSPINUP_GEN_BIT(ENABLE); |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1197 | writel(enable_spinup_value, &iphy->link_layer_registers->notify_enable_spinup_control); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1198 | } |
| 1199 | |
Marcin Tomczak | 0953dbe | 2012-01-04 01:33:36 -0800 | [diff] [blame] | 1200 | static void scu_link_layer_start_oob(struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1201 | { |
Marcin Tomczak | 0953dbe | 2012-01-04 01:33:36 -0800 | [diff] [blame] | 1202 | struct scu_link_layer_registers __iomem *ll = iphy->link_layer_registers; |
| 1203 | u32 val; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1204 | |
Marcin Tomczak | 0953dbe | 2012-01-04 01:33:36 -0800 | [diff] [blame] | 1205 | /** Reset OOB sequence - start */ |
| 1206 | val = readl(&ll->phy_configuration); |
| 1207 | val &= ~(SCU_SAS_PCFG_GEN_BIT(OOB_RESET) | |
| 1208 | SCU_SAS_PCFG_GEN_BIT(HARD_RESET)); |
| 1209 | writel(val, &ll->phy_configuration); |
| 1210 | readl(&ll->phy_configuration); /* flush */ |
| 1211 | /** Reset OOB sequence - end */ |
| 1212 | |
| 1213 | /** Start OOB sequence - start */ |
| 1214 | val = readl(&ll->phy_configuration); |
| 1215 | val |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE); |
| 1216 | writel(val, &ll->phy_configuration); |
| 1217 | readl(&ll->phy_configuration); /* flush */ |
| 1218 | /** Start OOB sequence - end */ |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1219 | } |
| 1220 | |
| 1221 | /** |
| 1222 | * |
| 1223 | * |
| 1224 | * This method will transmit a hard reset request on the specified phy. The SCU |
| 1225 | * hardware requires that we reset the OOB state machine and set the hard reset |
| 1226 | * bit in the phy configuration register. We then must start OOB over with the |
| 1227 | * hard reset bit set. |
| 1228 | */ |
| 1229 | static void scu_link_layer_tx_hard_reset( |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1230 | struct isci_phy *iphy) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1231 | { |
| 1232 | u32 phy_configuration_value; |
| 1233 | |
| 1234 | /* |
| 1235 | * SAS Phys must wait for the HARD_RESET_TX event notification to transition |
| 1236 | * to the starting state. */ |
| 1237 | phy_configuration_value = |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1238 | readl(&iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1239 | phy_configuration_value |= |
| 1240 | (SCU_SAS_PCFG_GEN_BIT(HARD_RESET) | |
| 1241 | SCU_SAS_PCFG_GEN_BIT(OOB_RESET)); |
| 1242 | writel(phy_configuration_value, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1243 | &iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1244 | |
| 1245 | /* Now take the OOB state machine out of reset */ |
| 1246 | phy_configuration_value |= SCU_SAS_PCFG_GEN_BIT(OOB_ENABLE); |
| 1247 | phy_configuration_value &= ~SCU_SAS_PCFG_GEN_BIT(OOB_RESET); |
| 1248 | writel(phy_configuration_value, |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1249 | &iphy->link_layer_registers->phy_configuration); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1250 | } |
| 1251 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1252 | static void sci_phy_stopped_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1253 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1254 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1255 | struct isci_port *iport = iphy->owning_port; |
| 1256 | struct isci_host *ihost = iport->owning_controller; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1257 | |
| 1258 | /* |
| 1259 | * @todo We need to get to the controller to place this PE in a |
| 1260 | * reset state |
| 1261 | */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1262 | sci_del_timer(&iphy->sata_timer); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1263 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1264 | scu_link_layer_stop_protocol_engine(iphy); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1265 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1266 | if (iphy->sm.previous_state_id != SCI_PHY_INITIAL) |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1267 | sci_controller_link_down(ihost, phy_get_non_dummy_port(iphy), iphy); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1268 | } |
| 1269 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1270 | static void sci_phy_starting_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1271 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1272 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1273 | struct isci_port *iport = iphy->owning_port; |
| 1274 | struct isci_host *ihost = iport->owning_controller; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1275 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1276 | scu_link_layer_stop_protocol_engine(iphy); |
| 1277 | scu_link_layer_start_oob(iphy); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1278 | |
| 1279 | /* We don't know what kind of phy we are going to be just yet */ |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 1280 | iphy->protocol = SAS_PROTOCOL_NONE; |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1281 | iphy->bcn_received_while_port_unassigned = false; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1282 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1283 | if (iphy->sm.previous_state_id == SCI_PHY_READY) |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1284 | sci_controller_link_down(ihost, phy_get_non_dummy_port(iphy), iphy); |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1285 | |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1286 | sci_change_state(&iphy->sm, SCI_PHY_SUB_INITIAL); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1287 | } |
| 1288 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1289 | static void sci_phy_ready_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1290 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1291 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1292 | struct isci_port *iport = iphy->owning_port; |
| 1293 | struct isci_host *ihost = iport->owning_controller; |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1294 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1295 | sci_controller_link_up(ihost, phy_get_non_dummy_port(iphy), iphy); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1296 | } |
| 1297 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1298 | static void sci_phy_ready_state_exit(struct sci_base_state_machine *sm) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1299 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1300 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1301 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1302 | sci_phy_suspend(iphy); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1303 | } |
| 1304 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1305 | static void sci_phy_resetting_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1306 | { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1307 | struct isci_phy *iphy = container_of(sm, typeof(*iphy), sm); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1308 | |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 1309 | /* The phy is being reset, therefore deactivate it from the port. In |
| 1310 | * the resetting state we don't notify the user regarding link up and |
| 1311 | * link down notifications |
| 1312 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1313 | sci_port_deactivate_phy(iphy->owning_port, iphy, false); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1314 | |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 1315 | if (iphy->protocol == SAS_PROTOCOL_SSP) { |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1316 | scu_link_layer_tx_hard_reset(iphy); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1317 | } else { |
Dan Williams | 5b1d4af | 2011-05-12 04:51:41 -0700 | [diff] [blame] | 1318 | /* The SCU does not need to have a discrete reset state so |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1319 | * just go back to the starting state. |
| 1320 | */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1321 | sci_change_state(&iphy->sm, SCI_PHY_STARTING); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1322 | } |
| 1323 | } |
| 1324 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1325 | static const struct sci_base_state sci_phy_state_table[] = { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1326 | [SCI_PHY_INITIAL] = { }, |
| 1327 | [SCI_PHY_STOPPED] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1328 | .enter_state = sci_phy_stopped_state_enter, |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1329 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1330 | [SCI_PHY_STARTING] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1331 | .enter_state = sci_phy_starting_state_enter, |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1332 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1333 | [SCI_PHY_SUB_INITIAL] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1334 | .enter_state = sci_phy_starting_initial_substate_enter, |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1335 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1336 | [SCI_PHY_SUB_AWAIT_OSSP_EN] = { }, |
| 1337 | [SCI_PHY_SUB_AWAIT_SAS_SPEED_EN] = { }, |
| 1338 | [SCI_PHY_SUB_AWAIT_IAF_UF] = { }, |
| 1339 | [SCI_PHY_SUB_AWAIT_SAS_POWER] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1340 | .enter_state = sci_phy_starting_await_sas_power_substate_enter, |
| 1341 | .exit_state = sci_phy_starting_await_sas_power_substate_exit, |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1342 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1343 | [SCI_PHY_SUB_AWAIT_SATA_POWER] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1344 | .enter_state = sci_phy_starting_await_sata_power_substate_enter, |
| 1345 | .exit_state = sci_phy_starting_await_sata_power_substate_exit |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1346 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1347 | [SCI_PHY_SUB_AWAIT_SATA_PHY_EN] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1348 | .enter_state = sci_phy_starting_await_sata_phy_substate_enter, |
| 1349 | .exit_state = sci_phy_starting_await_sata_phy_substate_exit |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1350 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1351 | [SCI_PHY_SUB_AWAIT_SATA_SPEED_EN] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1352 | .enter_state = sci_phy_starting_await_sata_speed_substate_enter, |
| 1353 | .exit_state = sci_phy_starting_await_sata_speed_substate_exit |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1354 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1355 | [SCI_PHY_SUB_AWAIT_SIG_FIS_UF] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1356 | .enter_state = sci_phy_starting_await_sig_fis_uf_substate_enter, |
| 1357 | .exit_state = sci_phy_starting_await_sig_fis_uf_substate_exit |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1358 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1359 | [SCI_PHY_SUB_FINAL] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1360 | .enter_state = sci_phy_starting_final_substate_enter, |
Adam Gruchala | 4a33c52 | 2011-05-10 23:54:23 +0000 | [diff] [blame] | 1361 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1362 | [SCI_PHY_READY] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1363 | .enter_state = sci_phy_ready_state_enter, |
| 1364 | .exit_state = sci_phy_ready_state_exit, |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1365 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1366 | [SCI_PHY_RESETTING] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1367 | .enter_state = sci_phy_resetting_state_enter, |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1368 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1369 | [SCI_PHY_FINAL] = { }, |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1370 | }; |
| 1371 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1372 | void sci_phy_construct(struct isci_phy *iphy, |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 1373 | struct isci_port *iport, u8 phy_index) |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1374 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1375 | sci_init_sm(&iphy->sm, sci_phy_state_table, SCI_PHY_INITIAL); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1376 | |
| 1377 | /* Copy the rest of the input data to our locals */ |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 1378 | iphy->owning_port = iport; |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1379 | iphy->phy_index = phy_index; |
| 1380 | iphy->bcn_received_while_port_unassigned = false; |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 1381 | iphy->protocol = SAS_PROTOCOL_NONE; |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1382 | iphy->link_layer_registers = NULL; |
| 1383 | iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN; |
Edmund Nadolski | a628d47 | 2011-05-19 11:59:36 +0000 | [diff] [blame] | 1384 | |
| 1385 | /* Create the SIGNATURE FIS Timeout timer for this phy */ |
Dan Williams | 8528095 | 2011-06-28 15:05:53 -0700 | [diff] [blame] | 1386 | sci_init_timer(&iphy->sata_timer, phy_sata_timeout); |
Dan Williams | d35bc1b | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1387 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1388 | |
Dan Williams | 4b33981 | 2011-05-06 17:36:38 -0700 | [diff] [blame] | 1389 | void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1390 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1391 | struct sci_oem_params *oem = &ihost->oem_parameters; |
Dan Williams | 4b33981 | 2011-05-06 17:36:38 -0700 | [diff] [blame] | 1392 | u64 sci_sas_addr; |
| 1393 | __be64 sas_addr; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1394 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1395 | sci_sas_addr = oem->phys[index].sas_address.high; |
Dan Williams | 4b33981 | 2011-05-06 17:36:38 -0700 | [diff] [blame] | 1396 | sci_sas_addr <<= 32; |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1397 | sci_sas_addr |= oem->phys[index].sas_address.low; |
Dan Williams | 4b33981 | 2011-05-06 17:36:38 -0700 | [diff] [blame] | 1398 | sas_addr = cpu_to_be64(sci_sas_addr); |
| 1399 | memcpy(iphy->sas_addr, &sas_addr, sizeof(sas_addr)); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1400 | |
Dan Williams | 4b33981 | 2011-05-06 17:36:38 -0700 | [diff] [blame] | 1401 | iphy->sas_phy.enabled = 0; |
| 1402 | iphy->sas_phy.id = index; |
| 1403 | iphy->sas_phy.sas_addr = &iphy->sas_addr[0]; |
| 1404 | iphy->sas_phy.frame_rcvd = (u8 *)&iphy->frame_rcvd; |
| 1405 | iphy->sas_phy.ha = &ihost->sas_ha; |
| 1406 | iphy->sas_phy.lldd_phy = iphy; |
| 1407 | iphy->sas_phy.enabled = 1; |
| 1408 | iphy->sas_phy.class = SAS; |
| 1409 | iphy->sas_phy.iproto = SAS_PROTOCOL_ALL; |
| 1410 | iphy->sas_phy.tproto = 0; |
| 1411 | iphy->sas_phy.type = PHY_TYPE_PHYSICAL; |
| 1412 | iphy->sas_phy.role = PHY_ROLE_INITIATOR; |
| 1413 | iphy->sas_phy.oob_mode = OOB_NOT_CONNECTED; |
| 1414 | iphy->sas_phy.linkrate = SAS_LINK_RATE_UNKNOWN; |
| 1415 | memset(&iphy->frame_rcvd, 0, sizeof(iphy->frame_rcvd)); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1416 | } |
| 1417 | |
| 1418 | |
| 1419 | /** |
| 1420 | * isci_phy_control() - This function is one of the SAS Domain Template |
| 1421 | * functions. This is a phy management function. |
| 1422 | * @phy: This parameter specifies the sphy being controlled. |
| 1423 | * @func: This parameter specifies the phy control function being invoked. |
| 1424 | * @buf: This parameter is specific to the phy function being invoked. |
| 1425 | * |
| 1426 | * status, zero indicates success. |
| 1427 | */ |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1428 | int isci_phy_control(struct asd_sas_phy *sas_phy, |
| 1429 | enum phy_func func, |
| 1430 | void *buf) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1431 | { |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1432 | int ret = 0; |
| 1433 | struct isci_phy *iphy = sas_phy->lldd_phy; |
Dan Williams | c132f69 | 2012-01-03 23:26:08 -0800 | [diff] [blame] | 1434 | struct asd_sas_port *port = sas_phy->port; |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1435 | struct isci_host *ihost = sas_phy->ha->lldd_ha; |
| 1436 | unsigned long flags; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1437 | |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1438 | dev_dbg(&ihost->pdev->dev, |
| 1439 | "%s: phy %p; func %d; buf %p; isci phy %p, port %p\n", |
Dan Williams | c132f69 | 2012-01-03 23:26:08 -0800 | [diff] [blame] | 1440 | __func__, sas_phy, func, buf, iphy, port); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1441 | |
| 1442 | switch (func) { |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1443 | case PHY_FUNC_DISABLE: |
| 1444 | spin_lock_irqsave(&ihost->scic_lock, flags); |
Jeff Skirvin | c5457a8 | 2012-03-08 22:42:07 -0800 | [diff] [blame] | 1445 | scu_link_layer_start_oob(iphy); |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1446 | sci_phy_stop(iphy); |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1447 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
| 1448 | break; |
| 1449 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1450 | case PHY_FUNC_LINK_RESET: |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1451 | spin_lock_irqsave(&ihost->scic_lock, flags); |
Jeff Skirvin | c5457a8 | 2012-03-08 22:42:07 -0800 | [diff] [blame] | 1452 | scu_link_layer_start_oob(iphy); |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1453 | sci_phy_stop(iphy); |
| 1454 | sci_phy_start(iphy); |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1455 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
| 1456 | break; |
| 1457 | |
| 1458 | case PHY_FUNC_HARD_RESET: |
Dan Williams | c132f69 | 2012-01-03 23:26:08 -0800 | [diff] [blame] | 1459 | if (!port) |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1460 | return -ENODEV; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1461 | |
Dan Williams | c132f69 | 2012-01-03 23:26:08 -0800 | [diff] [blame] | 1462 | ret = isci_port_perform_hard_reset(ihost, port->lldd_port, iphy); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1463 | |
| 1464 | break; |
Dan Williams | ac013ed1 | 2011-09-28 18:48:02 -0700 | [diff] [blame] | 1465 | case PHY_FUNC_GET_EVENTS: { |
| 1466 | struct scu_link_layer_registers __iomem *r; |
| 1467 | struct sas_phy *phy = sas_phy->phy; |
| 1468 | |
| 1469 | r = iphy->link_layer_registers; |
| 1470 | phy->running_disparity_error_count = readl(&r->running_disparity_error_count); |
| 1471 | phy->loss_of_dword_sync_count = readl(&r->loss_of_sync_error_count); |
| 1472 | phy->phy_reset_problem_count = readl(&r->phy_reset_problem_count); |
| 1473 | phy->invalid_dword_count = readl(&r->invalid_dword_counter); |
| 1474 | break; |
| 1475 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1476 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1477 | default: |
Dave Jiang | 4d07f7f | 2011-03-02 12:31:24 -0800 | [diff] [blame] | 1478 | dev_dbg(&ihost->pdev->dev, |
| 1479 | "%s: phy %p; func %d NOT IMPLEMENTED!\n", |
| 1480 | __func__, sas_phy, func); |
| 1481 | ret = -ENOSYS; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1482 | break; |
| 1483 | } |
| 1484 | return ret; |
| 1485 | } |