| Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| Jonathan Neuschäfer | a1d1e0e | 2022-01-29 12:52:24 +0100 | [diff] [blame] | 2 | |
| 3 | config PINCTRL_WPCM450 |
| 4 | tristate "Pinctrl and GPIO driver for Nuvoton WPCM450" |
| 5 | depends on ARCH_WPCM450 || COMPILE_TEST |
| Zheng Bin | 44e445e | 2022-03-25 15:44:50 +0800 | [diff] [blame] | 6 | depends on OF |
| Jonathan Neuschäfer | a1d1e0e | 2022-01-29 12:52:24 +0100 | [diff] [blame] | 7 | select PINMUX |
| 8 | select PINCONF |
| 9 | select GENERIC_PINCONF |
| Jonathan Neuschäfer | 0bb8508 | 2022-03-17 12:44:12 +0100 | [diff] [blame] | 10 | select GENERIC_PINCTRL_GROUPS |
| Jonathan Neuschäfer | a1d1e0e | 2022-01-29 12:52:24 +0100 | [diff] [blame] | 11 | select GPIOLIB |
| 12 | select GPIO_GENERIC |
| 13 | select GPIOLIB_IRQCHIP |
| 14 | help |
| 15 | Say Y or M here to enable pin controller and GPIO support for |
| 16 | the Nuvoton WPCM450 SoC. This is strongly recommended when |
| 17 | building a kernel that will run on this chip. |
| 18 | |
| 19 | If this driver is compiled as a module, it will be named |
| 20 | pinctrl-wpcm450. |
| 21 | |
| Tomer Maimon | 3b588e4 | 2018-08-08 12:25:26 +0300 | [diff] [blame] | 22 | config PINCTRL_NPCM7XX |
| 23 | bool "Pinctrl and GPIO driver for Nuvoton NPCM7XX" |
| 24 | depends on (ARCH_NPCM7XX || COMPILE_TEST) && OF |
| 25 | select PINMUX |
| 26 | select PINCONF |
| 27 | select GENERIC_PINCONF |
| 28 | select GPIOLIB |
| 29 | select GPIO_GENERIC |
| 30 | select GPIOLIB_IRQCHIP |
| 31 | help |
| 32 | Say Y here to enable pin controller and GPIO support |
| 33 | for Nuvoton NPCM750/730/715/705 SoCs. |
