Jiri Olsa | c9b951c4 | 2014-01-07 13:47:29 +0100 | [diff] [blame] | 1 | #include <errno.h> |
| 2 | #include "perf_regs.h" |
Jiri Olsa | 0c4e774 | 2014-04-17 19:39:10 +0200 | [diff] [blame] | 3 | #include "event.h" |
Jiri Olsa | c9b951c4 | 2014-01-07 13:47:29 +0100 | [diff] [blame] | 4 | |
Stephane Eranian | af4aead | 2015-09-01 11:30:14 +0200 | [diff] [blame] | 5 | const struct sample_reg __weak sample_reg_masks[] = { |
| 6 | SMPL_REG_END |
| 7 | }; |
| 8 | |
Ravi Bangoria | d451a20 | 2017-03-28 15:17:53 +0530 | [diff] [blame] | 9 | int __weak arch_sdt_arg_parse_op(char *old_op __maybe_unused, |
| 10 | char **new_op __maybe_unused) |
Alexis Berlemont | 3b1f831 | 2016-12-14 01:07:32 +0100 | [diff] [blame] | 11 | { |
Ravi Bangoria | d451a20 | 2017-03-28 15:17:53 +0530 | [diff] [blame] | 12 | return SDT_ARG_SKIP; |
Alexis Berlemont | 3b1f831 | 2016-12-14 01:07:32 +0100 | [diff] [blame] | 13 | } |
| 14 | |
Sukadev Bhattiprolu | 9fb4765 | 2015-09-24 17:53:49 -0400 | [diff] [blame] | 15 | #ifdef HAVE_PERF_REGS_SUPPORT |
Jiri Olsa | c9b951c4 | 2014-01-07 13:47:29 +0100 | [diff] [blame] | 16 | int perf_reg_value(u64 *valp, struct regs_dump *regs, int id) |
| 17 | { |
| 18 | int i, idx = 0; |
| 19 | u64 mask = regs->mask; |
| 20 | |
Naveen N. Rao | f478220 | 2016-04-28 15:01:10 +0530 | [diff] [blame] | 21 | if (regs->cache_mask & (1ULL << id)) |
Jiri Olsa | 0c4e774 | 2014-04-17 19:39:10 +0200 | [diff] [blame] | 22 | goto out; |
| 23 | |
Naveen N. Rao | f478220 | 2016-04-28 15:01:10 +0530 | [diff] [blame] | 24 | if (!(mask & (1ULL << id))) |
Jiri Olsa | c9b951c4 | 2014-01-07 13:47:29 +0100 | [diff] [blame] | 25 | return -EINVAL; |
| 26 | |
| 27 | for (i = 0; i < id; i++) { |
Naveen N. Rao | f478220 | 2016-04-28 15:01:10 +0530 | [diff] [blame] | 28 | if (mask & (1ULL << i)) |
Jiri Olsa | c9b951c4 | 2014-01-07 13:47:29 +0100 | [diff] [blame] | 29 | idx++; |
| 30 | } |
| 31 | |
Naveen N. Rao | f478220 | 2016-04-28 15:01:10 +0530 | [diff] [blame] | 32 | regs->cache_mask |= (1ULL << id); |
Jiri Olsa | 0c4e774 | 2014-04-17 19:39:10 +0200 | [diff] [blame] | 33 | regs->cache_regs[id] = regs->regs[idx]; |
| 34 | |
| 35 | out: |
| 36 | *valp = regs->cache_regs[id]; |
Jiri Olsa | c9b951c4 | 2014-01-07 13:47:29 +0100 | [diff] [blame] | 37 | return 0; |
| 38 | } |
Sukadev Bhattiprolu | 9fb4765 | 2015-09-24 17:53:49 -0400 | [diff] [blame] | 39 | #endif |