Frank Wang | 72580a4 | 2016-07-22 15:00:43 +0800 | [diff] [blame] | 1 | ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK |
| 2 | |
| 3 | Required properties (phy (parent) node): |
| 4 | - compatible : should be one of the listed compatibles: |
Heiko Stuebner | 4569e64 | 2019-09-17 10:25:32 +0200 | [diff] [blame] | 5 | * "rockchip,px30-usb2phy" |
Frank Wang | b59b1d3 | 2017-06-02 11:20:26 +0800 | [diff] [blame] | 6 | * "rockchip,rk3228-usb2phy" |
Meng Dongyang | e3462f9 | 2017-03-06 09:29:36 +0800 | [diff] [blame] | 7 | * "rockchip,rk3328-usb2phy" |
Frank Wang | 72580a4 | 2016-07-22 15:00:43 +0800 | [diff] [blame] | 8 | * "rockchip,rk3366-usb2phy" |
| 9 | * "rockchip,rk3399-usb2phy" |
Frank Wang | fc93881 | 2017-08-11 16:08:48 +0800 | [diff] [blame] | 10 | * "rockchip,rv1108-usb2phy" |
Frank Wang | 72580a4 | 2016-07-22 15:00:43 +0800 | [diff] [blame] | 11 | - reg : the address offset of grf for usb-phy configuration. |
| 12 | - #clock-cells : should be 0. |
| 13 | - clock-output-names : specify the 480m output clock name. |
| 14 | |
| 15 | Optional properties: |
| 16 | - clocks : phandle + phy specifier pair, for the input clock of phy. |
| 17 | - clock-names : input clock name of phy, must be "phyclk". |
Meng Dongyang | e3462f9 | 2017-03-06 09:29:36 +0800 | [diff] [blame] | 18 | - assigned-clocks : phandle of usb 480m clock. |
| 19 | - assigned-clock-parents : parent of usb 480m clock, select between |
| 20 | usb-phy output 480m and xin24m. |
| 21 | Refer to clk/clock-bindings.txt for generic clock |
| 22 | consumer properties. |
Frank Wang | c7527e0 | 2017-08-11 16:07:48 +0800 | [diff] [blame] | 23 | - rockchip,usbgrf : phandle to the syscon managing the "usb general |
| 24 | register files". When set driver will request its |
| 25 | phandle as one companion-grf for some special SoCs |
| 26 | (e.g RV1108). |
Enric Balletbo i Serra | 68eab01 | 2019-01-09 18:17:39 +0100 | [diff] [blame] | 27 | - extcon : phandle to the extcon device providing the cable state for |
| 28 | the otg phy. |
Frank Wang | 72580a4 | 2016-07-22 15:00:43 +0800 | [diff] [blame] | 29 | |
| 30 | Required nodes : a sub-node is required for each port the phy provides. |
| 31 | The sub-node name is used to identify host or otg port, |
| 32 | and shall be the following entries: |
| 33 | * "otg-port" : the name of otg port. |
| 34 | * "host-port" : the name of host port. |
| 35 | |
| 36 | Required properties (port (child) node): |
| 37 | - #phy-cells : must be 0. See ./phy-bindings.txt for details. |
| 38 | - interrupts : specify an interrupt for each entry in interrupt-names. |
Frank Wang | 9c1712d | 2017-08-11 16:07:50 +0800 | [diff] [blame] | 39 | - interrupt-names : a list which should be one of the following cases: |
| 40 | Regular case: |
Frank Wang | 72580a4 | 2016-07-22 15:00:43 +0800 | [diff] [blame] | 41 | * "otg-id" : for the otg id interrupt. |
| 42 | * "otg-bvalid" : for the otg vbus interrupt. |
| 43 | * "linestate" : for the host/otg linestate interrupt. |
Frank Wang | 9c1712d | 2017-08-11 16:07:50 +0800 | [diff] [blame] | 44 | Some SoCs use one interrupt with the above muxed together, so for these |
| 45 | * "otg-mux" : otg-port interrupt, which mux otg-id/otg-bvalid/linestate |
| 46 | to one. |
Frank Wang | 72580a4 | 2016-07-22 15:00:43 +0800 | [diff] [blame] | 47 | |
| 48 | Optional properties: |
| 49 | - phy-supply : phandle to a regulator that provides power to VBUS. |
| 50 | See ./phy-bindings.txt for details. |
| 51 | |
| 52 | Example: |
| 53 | |
| 54 | grf: syscon@ff770000 { |
| 55 | compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd"; |
| 56 | #address-cells = <1>; |
| 57 | #size-cells = <1>; |
| 58 | |
| 59 | ... |
| 60 | |
| 61 | u2phy: usb2-phy@700 { |
| 62 | compatible = "rockchip,rk3366-usb2phy"; |
| 63 | reg = <0x700 0x2c>; |
| 64 | #clock-cells = <0>; |
| 65 | clock-output-names = "sclk_otgphy0_480m"; |
| 66 | |
| 67 | u2phy_otg: otg-port { |
| 68 | #phy-cells = <0>; |
| 69 | interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, |
| 70 | <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, |
| 71 | <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; |
| 72 | interrupt-names = "otg-id", "otg-bvalid", "linestate"; |
Frank Wang | 72580a4 | 2016-07-22 15:00:43 +0800 | [diff] [blame] | 73 | }; |
| 74 | |
| 75 | u2phy_host: host-port { |
| 76 | #phy-cells = <0>; |
| 77 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; |
| 78 | interrupt-names = "linestate"; |
Frank Wang | 72580a4 | 2016-07-22 15:00:43 +0800 | [diff] [blame] | 79 | }; |
| 80 | }; |
| 81 | }; |