blob: 265ed3e4c920762f9a4ee57dc3fdde3f9858d7d2 [file] [log] [blame]
Bjorn Helgaas7328c8f2018-01-26 11:45:16 -06001// SPDX-License-Identifier: GPL-2.0
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
Bjorn Helgaasdf62ab52018-03-09 16:36:33 -06003 * PCI Message Signaled Interrupt (MSI)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
Christoph Hellwigaff17162016-07-12 18:20:17 +09007 * Copyright (C) 2016 Christoph Hellwig.
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 */
9
Eric W. Biederman1ce03372006-10-04 02:16:41 -070010#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/mm.h>
12#include <linux/irq.h>
13#include <linux/interrupt.h>
Paul Gortmaker363c75d2011-05-27 09:37:25 -040014#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <linux/pci.h>
17#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070018#include <linux/msi.h>
Dan Williams4fdadeb2007-04-26 18:21:38 -070019#include <linux/smp.h>
Hidetoshi Seto500559a2009-08-10 10:14:15 +090020#include <linux/errno.h>
21#include <linux/io.h>
Tomasz Nowickibe2021b2016-09-12 20:32:22 +020022#include <linux/acpi_iort.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090023#include <linux/slab.h>
Jiang Liu3878eae2014-11-11 21:02:18 +080024#include <linux/irqdomain.h>
David Daneyb6eec9b2015-10-08 15:10:49 -070025#include <linux/of_irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
27#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Linus Torvalds1da177e2005-04-16 15:20:36 -070029static int pci_msi_enable = 1;
Yijing Wang38737d82014-10-27 10:44:36 +080030int pci_msi_ignore_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
Bjorn Helgaas527eee22013-04-17 17:44:48 -060032#define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1)
33
Jiang Liu8e047ad2014-11-15 22:24:07 +080034#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
Jiang Liu8e047ad2014-11-15 22:24:07 +080035static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
36{
37 struct irq_domain *domain;
38
Christoph Hellwig47feb412017-02-08 18:17:43 +010039 domain = dev_get_msi_domain(&dev->dev);
Marc Zyngier3845d292015-12-04 10:28:14 -060040 if (domain && irq_domain_is_hierarchy(domain))
Christoph Hellwig699c4ce2017-02-08 18:17:44 +010041 return msi_domain_alloc_irqs(domain, &dev->dev, nvec);
Jiang Liu8e047ad2014-11-15 22:24:07 +080042
43 return arch_setup_msi_irqs(dev, nvec, type);
44}
45
46static void pci_msi_teardown_msi_irqs(struct pci_dev *dev)
47{
48 struct irq_domain *domain;
49
Christoph Hellwig47feb412017-02-08 18:17:43 +010050 domain = dev_get_msi_domain(&dev->dev);
Marc Zyngier3845d292015-12-04 10:28:14 -060051 if (domain && irq_domain_is_hierarchy(domain))
Christoph Hellwig699c4ce2017-02-08 18:17:44 +010052 msi_domain_free_irqs(domain, &dev->dev);
Jiang Liu8e047ad2014-11-15 22:24:07 +080053 else
54 arch_teardown_msi_irqs(dev);
55}
56#else
57#define pci_msi_setup_msi_irqs arch_setup_msi_irqs
58#define pci_msi_teardown_msi_irqs arch_teardown_msi_irqs
59#endif
Bjorn Helgaas527eee22013-04-17 17:44:48 -060060
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010061/* Arch hooks */
62
Thomas Petazzoni4287d8242013-08-09 22:27:06 +020063int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
64{
Lorenzo Pieralisi2291ec02015-08-03 22:04:06 -050065 struct msi_controller *chip = dev->bus->msi;
Thierry Reding0cbdcfc2013-08-09 22:27:08 +020066 int err;
67
68 if (!chip || !chip->setup_irq)
69 return -EINVAL;
70
71 err = chip->setup_irq(chip, dev, desc);
72 if (err < 0)
73 return err;
74
75 irq_set_chip_data(desc->irq, chip);
76
77 return 0;
Thomas Petazzoni4287d8242013-08-09 22:27:06 +020078}
79
80void __weak arch_teardown_msi_irq(unsigned int irq)
81{
Yijing Wangc2791b82014-11-11 17:45:45 -070082 struct msi_controller *chip = irq_get_chip_data(irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +020083
84 if (!chip || !chip->teardown_irq)
85 return;
86
87 chip->teardown_irq(chip, irq);
Thomas Petazzoni4287d8242013-08-09 22:27:06 +020088}
89
Thomas Petazzoni4287d8242013-08-09 22:27:06 +020090int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010091{
Lucas Stach339e5b42015-09-18 13:58:34 -050092 struct msi_controller *chip = dev->bus->msi;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010093 struct msi_desc *entry;
94 int ret;
95
Lucas Stach339e5b42015-09-18 13:58:34 -050096 if (chip && chip->setup_irqs)
97 return chip->setup_irqs(chip, dev, nvec, type);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -040098 /*
99 * If an architecture wants to support multiple MSI, it needs to
100 * override arch_setup_msi_irqs()
101 */
102 if (type == PCI_CAP_ID_MSI && nvec > 1)
103 return 1;
104
Jiang Liu5004e98a2015-07-09 16:00:41 +0800105 for_each_pci_msi_entry(entry, dev) {
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100106 ret = arch_setup_msi_irq(dev, entry);
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100107 if (ret < 0)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100108 return ret;
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100109 if (ret > 0)
110 return -ENOSPC;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100111 }
112
113 return 0;
114}
115
Thomas Petazzoni4287d8242013-08-09 22:27:06 +0200116/*
117 * We have a default implementation available as a separate non-weak
118 * function, as it is used by the Xen x86 PCI code
119 */
Thomas Gleixner1525bf02010-10-06 16:05:35 -0400120void default_teardown_msi_irqs(struct pci_dev *dev)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100121{
Jiang Liu63a7b172014-11-06 22:20:32 +0800122 int i;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100123 struct msi_desc *entry;
124
Jiang Liu5004e98a2015-07-09 16:00:41 +0800125 for_each_pci_msi_entry(entry, dev)
Jiang Liu63a7b172014-11-06 22:20:32 +0800126 if (entry->irq)
127 for (i = 0; i < entry->nvec_used; i++)
128 arch_teardown_msi_irq(entry->irq + i);
Adrian Bunk6a9e7f22007-12-11 23:19:41 +0100129}
130
Thomas Petazzoni4287d8242013-08-09 22:27:06 +0200131void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
132{
133 return default_teardown_msi_irqs(dev);
134}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500135
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800136static void default_restore_msi_irq(struct pci_dev *dev, int irq)
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500137{
138 struct msi_desc *entry;
139
140 entry = NULL;
141 if (dev->msix_enabled) {
Jiang Liu5004e98a2015-07-09 16:00:41 +0800142 for_each_pci_msi_entry(entry, dev) {
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500143 if (irq == entry->irq)
144 break;
145 }
146 } else if (dev->msi_enabled) {
147 entry = irq_get_msi_desc(irq);
148 }
149
150 if (entry)
Jiang Liu83a18912014-11-09 23:10:34 +0800151 __pci_write_msi_msg(entry, &entry->msg);
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500152}
Thomas Petazzoni4287d8242013-08-09 22:27:06 +0200153
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800154void __weak arch_restore_msi_irqs(struct pci_dev *dev)
Thomas Petazzoni4287d8242013-08-09 22:27:06 +0200155{
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800156 return default_restore_msi_irqs(dev);
Thomas Petazzoni4287d8242013-08-09 22:27:06 +0200157}
Konrad Rzeszutek Wilk76ccc292011-12-16 17:38:18 -0500158
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500159static inline __attribute_const__ u32 msi_mask(unsigned x)
160{
Matthew Wilcox0b49ec32009-02-08 20:27:47 -0700161 /* Don't shift by >= width of type */
162 if (x >= 5)
163 return 0xffffffff;
164 return (1 << (1 << x)) - 1;
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500165}
166
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600167/*
168 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
169 * mask all MSI interrupts by clearing the MSI enable bit does not work
170 * reliably as devices without an INTx disable bit will then generate a
171 * level IRQ which will never be cleared.
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600172 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100173u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400175 u32 mask_bits = desc->masked;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176
Yijing Wang38737d82014-10-27 10:44:36 +0800177 if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit)
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900178 return 0;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400179
180 mask_bits &= ~mask;
181 mask_bits |= flag;
Jiang Liue39758e2015-07-09 16:00:43 +0800182 pci_write_config_dword(msi_desc_to_pci_dev(desc), desc->mask_pos,
183 mask_bits);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900184
185 return mask_bits;
186}
187
188static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
189{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100190 desc->masked = __pci_msi_desc_mask_irq(desc, mask, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400191}
192
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900193static void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
194{
195 return desc->mask_base +
196 desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
197}
198
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400199/*
200 * This internal function does not flush PCI writes to the device.
201 * All users must ensure that they read from the device before either
202 * assuming that the device state is up to date, or returning out of this
203 * file. This saves a few milliseconds when initialising devices with lots
204 * of MSI-X interrupts.
205 */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100206u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400207{
208 u32 mask_bits = desc->masked;
Yijing Wang38737d82014-10-27 10:44:36 +0800209
210 if (pci_msi_ignore_mask)
211 return 0;
212
Sheng Yang8d805282010-11-11 15:46:55 +0800213 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
214 if (flag)
215 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900216 writel(mask_bits, pci_msix_desc_addr(desc) + PCI_MSIX_ENTRY_VECTOR_CTRL);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900217
218 return mask_bits;
219}
220
221static void msix_mask_irq(struct msi_desc *desc, u32 flag)
222{
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100223 desc->masked = __pci_msix_desc_mask_irq(desc, flag);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400224}
225
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200226static void msi_set_mask_bit(struct irq_data *data, u32 flag)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400227{
Jiang Liuc391f262015-06-01 16:05:41 +0800228 struct msi_desc *desc = irq_data_get_msi_desc(data);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400229
230 if (desc->msi_attrib.is_msix) {
231 msix_mask_irq(desc, flag);
232 readl(desc->mask_base); /* Flush write to device */
Matthew Wilcox24d27552009-03-17 08:54:06 -0400233 } else {
Yijing Wanga281b782014-07-08 10:08:55 +0800234 unsigned offset = data->irq - desc->irq;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400235 msi_mask_irq(desc, 1 << offset, flag << offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 }
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400237}
238
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100239/**
240 * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts
241 * @data: pointer to irqdata associated to that interrupt
242 */
243void pci_msi_mask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400244{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200245 msi_set_mask_bit(data, 1);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400246}
Jake Oshinsa4289dc2015-12-10 17:52:59 +0000247EXPORT_SYMBOL_GPL(pci_msi_mask_irq);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400248
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100249/**
250 * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
251 * @data: pointer to irqdata associated to that interrupt
252 */
253void pci_msi_unmask_irq(struct irq_data *data)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400254{
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200255 msi_set_mask_bit(data, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256}
Jake Oshinsa4289dc2015-12-10 17:52:59 +0000257EXPORT_SYMBOL_GPL(pci_msi_unmask_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800259void default_restore_msi_irqs(struct pci_dev *dev)
260{
261 struct msi_desc *entry;
262
Jiang Liu5004e98a2015-07-09 16:00:41 +0800263 for_each_pci_msi_entry(entry, dev)
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800264 default_restore_msi_irq(dev, entry->irq);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800265}
266
Jiang Liu891d4a42014-11-09 23:10:33 +0800267void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700268{
Jiang Liue39758e2015-07-09 16:00:43 +0800269 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
270
271 BUG_ON(dev->current_state != PCI_D0);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700272
Ben Hutchings30da5522010-07-23 14:56:28 +0100273 if (entry->msi_attrib.is_msix) {
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900274 void __iomem *base = pci_msix_desc_addr(entry);
Ben Hutchings30da5522010-07-23 14:56:28 +0100275
276 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
277 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
278 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
279 } else {
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600280 int pos = dev->msi_cap;
Ben Hutchings30da5522010-07-23 14:56:28 +0100281 u16 data;
282
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600283 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
284 &msg->address_lo);
Ben Hutchings30da5522010-07-23 14:56:28 +0100285 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600286 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
287 &msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600288 pci_read_config_word(dev, pos + PCI_MSI_DATA_64, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100289 } else {
290 msg->address_hi = 0;
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600291 pci_read_config_word(dev, pos + PCI_MSI_DATA_32, &data);
Ben Hutchings30da5522010-07-23 14:56:28 +0100292 }
293 msg->data = data;
294 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700295}
296
Jiang Liu83a18912014-11-09 23:10:34 +0800297void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800298{
Jiang Liue39758e2015-07-09 16:00:43 +0800299 struct pci_dev *dev = msi_desc_to_pci_dev(entry);
300
Keith Busch01705912017-03-29 22:49:11 -0500301 if (dev->current_state != PCI_D0 || pci_dev_is_disconnected(dev)) {
Ben Hutchingsfcd097f2010-06-17 20:16:36 +0100302 /* Don't touch the hardware now */
303 } else if (entry->msi_attrib.is_msix) {
Christoph Hellwig5eb6d662016-07-12 18:20:14 +0900304 void __iomem *base = pci_msix_desc_addr(entry);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400305
Hidetoshi Seto2c21fd42009-06-23 17:40:04 +0900306 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
307 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
308 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400309 } else {
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600310 int pos = dev->msi_cap;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400311 u16 msgctl;
312
Bjorn Helgaasf84ecd282013-04-17 17:38:32 -0600313 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400314 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
315 msgctl |= entry->msi_attrib.multiple << 4;
Bjorn Helgaasf84ecd282013-04-17 17:38:32 -0600316 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700317
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600318 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO,
319 msg->address_lo);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700320 if (entry->msi_attrib.is_64) {
Bjorn Helgaas9925ad02013-04-17 17:39:57 -0600321 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI,
322 msg->address_hi);
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600323 pci_write_config_word(dev, pos + PCI_MSI_DATA_64,
324 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700325 } else {
Bjorn Helgaas2f221342013-04-17 17:41:13 -0600326 pci_write_config_word(dev, pos + PCI_MSI_DATA_32,
327 msg->data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700328 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700329 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700330 entry->msg = *msg;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700331}
332
Jiang Liu83a18912014-11-09 23:10:34 +0800333void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
Yinghai Lu3145e942008-12-05 18:58:34 -0800334{
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200335 struct msi_desc *entry = irq_get_msi_desc(irq);
Yinghai Lu3145e942008-12-05 18:58:34 -0800336
Jiang Liu83a18912014-11-09 23:10:34 +0800337 __pci_write_msi_msg(entry, msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800338}
Jiang Liu83a18912014-11-09 23:10:34 +0800339EXPORT_SYMBOL_GPL(pci_write_msi_msg);
Yinghai Lu3145e942008-12-05 18:58:34 -0800340
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900341static void free_msi_irqs(struct pci_dev *dev)
342{
Jiang Liu5004e98a2015-07-09 16:00:41 +0800343 struct list_head *msi_list = dev_to_msi_list(&dev->dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900344 struct msi_desc *entry, *tmp;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800345 struct attribute **msi_attrs;
346 struct device_attribute *dev_attr;
Jiang Liu63a7b172014-11-06 22:20:32 +0800347 int i, count = 0;
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900348
Jiang Liu5004e98a2015-07-09 16:00:41 +0800349 for_each_pci_msi_entry(entry, dev)
Jiang Liu63a7b172014-11-06 22:20:32 +0800350 if (entry->irq)
351 for (i = 0; i < entry->nvec_used; i++)
352 BUG_ON(irq_has_action(entry->irq + i));
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900353
Jiang Liu8e047ad2014-11-15 22:24:07 +0800354 pci_msi_teardown_msi_irqs(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900355
Jiang Liu5004e98a2015-07-09 16:00:41 +0800356 list_for_each_entry_safe(entry, tmp, msi_list, list) {
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900357 if (entry->msi_attrib.is_msix) {
Jiang Liu5004e98a2015-07-09 16:00:41 +0800358 if (list_is_last(&entry->list, msi_list))
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900359 iounmap(entry->mask_base);
360 }
Neil Horman424eb392012-01-03 10:29:54 -0500361
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900362 list_del(&entry->list);
Prarit Bhargava81efbad2017-02-15 11:53:08 -0500363 free_msi_entry(entry);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900364 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800365
366 if (dev->msi_irq_groups) {
367 sysfs_remove_groups(&dev->dev.kobj, dev->msi_irq_groups);
368 msi_attrs = dev->msi_irq_groups[0]->attrs;
Alexei Starovoitovb701c0b2014-06-04 15:49:50 -0700369 while (msi_attrs[count]) {
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800370 dev_attr = container_of(msi_attrs[count],
371 struct device_attribute, attr);
372 kfree(dev_attr->attr.name);
373 kfree(dev_attr);
374 ++count;
375 }
376 kfree(msi_attrs);
377 kfree(dev->msi_irq_groups[0]);
378 kfree(dev->msi_irq_groups);
379 dev->msi_irq_groups = NULL;
380 }
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900381}
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900382
David Millerba698ad2007-10-25 01:16:30 -0700383static void pci_intx_for_msi(struct pci_dev *dev, int enable)
384{
385 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
386 pci_intx(dev, enable);
387}
388
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100389static void __pci_restore_msi_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800390{
Shaohua Li41017f02006-02-08 17:11:38 +0800391 u16 control;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700392 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800393
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800394 if (!dev->msi_enabled)
395 return;
396
Thomas Gleixnerdced35a2011-03-28 17:49:12 +0200397 entry = irq_get_msi_desc(dev->irq);
Shaohua Li41017f02006-02-08 17:11:38 +0800398
David Millerba698ad2007-10-25 01:16:30 -0700399 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500400 pci_msi_set_enable(dev, 0);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800401 arch_restore_msi_irqs(dev);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700402
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600403 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
Yijing Wang31ea5d42014-06-19 16:30:30 +0800404 msi_mask_irq(entry, msi_mask(entry->msi_attrib.multi_cap),
405 entry->masked);
Jesse Barnesabad2ec2008-08-07 08:52:37 -0700406 control &= ~PCI_MSI_FLAGS_QSIZE;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400407 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
Bjorn Helgaasf5322162013-04-17 17:34:36 -0600408 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100409}
410
411static void __pci_restore_msix_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800412{
Shaohua Li41017f02006-02-08 17:11:38 +0800413 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800414
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700415 if (!dev->msix_enabled)
416 return;
Jiang Liu5004e98a2015-07-09 16:00:41 +0800417 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700418
Shaohua Li41017f02006-02-08 17:11:38 +0800419 /* route the table */
David Millerba698ad2007-10-25 01:16:30 -0700420 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500421 pci_msix_clear_and_set_ctrl(dev, 0,
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800422 PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
Shaohua Li41017f02006-02-08 17:11:38 +0800423
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800424 arch_restore_msi_irqs(dev);
Jiang Liu5004e98a2015-07-09 16:00:41 +0800425 for_each_pci_msi_entry(entry, dev)
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400426 msix_mask_irq(entry, entry->masked);
Shaohua Li41017f02006-02-08 17:11:38 +0800427
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500428 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Shaohua Li41017f02006-02-08 17:11:38 +0800429}
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100430
431void pci_restore_msi_state(struct pci_dev *dev)
432{
433 __pci_restore_msi_state(dev);
434 __pci_restore_msix_state(dev);
435}
Linas Vepstas94688cf2007-11-07 15:43:59 -0600436EXPORT_SYMBOL_GPL(pci_restore_msi_state);
Shaohua Li41017f02006-02-08 17:11:38 +0800437
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800438static ssize_t msi_mode_show(struct device *dev, struct device_attribute *attr,
Neil Hormanda8d1c82011-10-06 14:08:18 -0400439 char *buf)
440{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800441 struct msi_desc *entry;
442 unsigned long irq;
443 int retval;
444
445 retval = kstrtoul(attr->attr.name, 10, &irq);
446 if (retval)
447 return retval;
448
Yijing Wange11ece52014-07-08 10:09:19 +0800449 entry = irq_get_msi_desc(irq);
450 if (entry)
451 return sprintf(buf, "%s\n",
452 entry->msi_attrib.is_msix ? "msix" : "msi");
453
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800454 return -ENODEV;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400455}
456
Neil Hormanda8d1c82011-10-06 14:08:18 -0400457static int populate_msi_sysfs(struct pci_dev *pdev)
458{
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800459 struct attribute **msi_attrs;
460 struct attribute *msi_attr;
461 struct device_attribute *msi_dev_attr;
462 struct attribute_group *msi_irq_group;
463 const struct attribute_group **msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400464 struct msi_desc *entry;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800465 int ret = -ENOMEM;
466 int num_msi = 0;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400467 int count = 0;
Romain Bezuta8676062015-09-24 01:31:16 +0200468 int i;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400469
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800470 /* Determine how many msi entries we have */
Jiang Liu5004e98a2015-07-09 16:00:41 +0800471 for_each_pci_msi_entry(entry, pdev)
Romain Bezuta8676062015-09-24 01:31:16 +0200472 num_msi += entry->nvec_used;
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800473 if (!num_msi)
474 return 0;
475
476 /* Dynamically create the MSI attributes for the PCI device */
Kees Cook6396bb22018-06-12 14:03:40 -0700477 msi_attrs = kcalloc(num_msi + 1, sizeof(void *), GFP_KERNEL);
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800478 if (!msi_attrs)
479 return -ENOMEM;
Jiang Liu5004e98a2015-07-09 16:00:41 +0800480 for_each_pci_msi_entry(entry, pdev) {
Romain Bezuta8676062015-09-24 01:31:16 +0200481 for (i = 0; i < entry->nvec_used; i++) {
482 msi_dev_attr = kzalloc(sizeof(*msi_dev_attr), GFP_KERNEL);
483 if (!msi_dev_attr)
484 goto error_attrs;
485 msi_attrs[count] = &msi_dev_attr->attr;
Greg Kroah-Hartman86bb4f62014-02-13 10:47:20 -0700486
Romain Bezuta8676062015-09-24 01:31:16 +0200487 sysfs_attr_init(&msi_dev_attr->attr);
488 msi_dev_attr->attr.name = kasprintf(GFP_KERNEL, "%d",
489 entry->irq + i);
490 if (!msi_dev_attr->attr.name)
491 goto error_attrs;
492 msi_dev_attr->attr.mode = S_IRUGO;
493 msi_dev_attr->show = msi_mode_show;
494 ++count;
495 }
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800496 }
497
498 msi_irq_group = kzalloc(sizeof(*msi_irq_group), GFP_KERNEL);
499 if (!msi_irq_group)
500 goto error_attrs;
501 msi_irq_group->name = "msi_irqs";
502 msi_irq_group->attrs = msi_attrs;
503
Kees Cook6396bb22018-06-12 14:03:40 -0700504 msi_irq_groups = kcalloc(2, sizeof(void *), GFP_KERNEL);
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800505 if (!msi_irq_groups)
506 goto error_irq_group;
507 msi_irq_groups[0] = msi_irq_group;
508
509 ret = sysfs_create_groups(&pdev->dev.kobj, msi_irq_groups);
510 if (ret)
511 goto error_irq_groups;
512 pdev->msi_irq_groups = msi_irq_groups;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400513
514 return 0;
515
Greg Kroah-Hartman1c51b502013-12-19 12:30:17 -0800516error_irq_groups:
517 kfree(msi_irq_groups);
518error_irq_group:
519 kfree(msi_irq_group);
520error_attrs:
521 count = 0;
522 msi_attr = msi_attrs[count];
523 while (msi_attr) {
524 msi_dev_attr = container_of(msi_attr, struct device_attribute, attr);
525 kfree(msi_attr->name);
526 kfree(msi_dev_attr);
527 ++count;
528 msi_attr = msi_attrs[count];
Neil Hormanda8d1c82011-10-06 14:08:18 -0400529 }
Greg Kroah-Hartman29237752014-02-13 10:47:35 -0700530 kfree(msi_attrs);
Neil Hormanda8d1c82011-10-06 14:08:18 -0400531 return ret;
532}
533
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200534static struct msi_desc *
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800535msi_setup_entry(struct pci_dev *dev, int nvec, const struct irq_affinity *affd)
Yijing Wangd873b4d2014-07-08 10:07:23 +0800536{
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200537 struct cpumask *masks = NULL;
Yijing Wangd873b4d2014-07-08 10:07:23 +0800538 struct msi_desc *entry;
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200539 u16 control;
540
Christoph Hellwig8e1101d2017-08-25 18:58:42 -0500541 if (affd)
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800542 masks = irq_create_affinity_masks(nvec, affd);
Christoph Hellwig8e1101d2017-08-25 18:58:42 -0500543
Yijing Wangd873b4d2014-07-08 10:07:23 +0800544
545 /* MSI Entry Initialization */
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200546 entry = alloc_msi_entry(&dev->dev, nvec, masks);
Yijing Wangd873b4d2014-07-08 10:07:23 +0800547 if (!entry)
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200548 goto out;
Yijing Wangd873b4d2014-07-08 10:07:23 +0800549
550 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
551
552 entry->msi_attrib.is_msix = 0;
553 entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
554 entry->msi_attrib.entry_nr = 0;
555 entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
556 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
Yijing Wangd873b4d2014-07-08 10:07:23 +0800557 entry->msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
Jiang Liu63a7b172014-11-06 22:20:32 +0800558 entry->msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
Yijing Wangd873b4d2014-07-08 10:07:23 +0800559
560 if (control & PCI_MSI_FLAGS_64BIT)
561 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
562 else
563 entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
564
565 /* Save the initial mask status */
566 if (entry->msi_attrib.maskbit)
567 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
568
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200569out:
570 kfree(masks);
Yijing Wangd873b4d2014-07-08 10:07:23 +0800571 return entry;
572}
573
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000574static int msi_verify_entries(struct pci_dev *dev)
575{
576 struct msi_desc *entry;
577
Jiang Liu5004e98a2015-07-09 16:00:41 +0800578 for_each_pci_msi_entry(entry, dev) {
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000579 if (!dev->no_64bit_msi || !entry->msg.address_hi)
580 continue;
Frederick Lawler7506dc72018-01-18 12:55:24 -0600581 pci_err(dev, "Device has broken 64-bit MSI but arch"
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000582 " tried to assign one above 4G\n");
583 return -EIO;
584 }
585 return 0;
586}
587
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588/**
589 * msi_capability_init - configure device's MSI capability structure
590 * @dev: pointer to the pci_dev data structure of MSI device function
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400591 * @nvec: number of interrupts to allocate
Randy Dunlapdadf1732016-12-28 08:25:04 -0800592 * @affd: description of automatic irq affinity assignments (may be %NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400594 * Setup the MSI capability structure of the device with the requested
595 * number of interrupts. A return value of zero indicates the successful
596 * setup of an entry with the new MSI irq. A negative return value indicates
597 * an error, and a positive return value indicates the number of interrupts
598 * which could have been allocated.
599 */
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800600static int msi_capability_init(struct pci_dev *dev, int nvec,
601 const struct irq_affinity *affd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602{
603 struct msi_desc *entry;
Gavin Shanf4651362013-04-04 16:54:32 +0000604 int ret;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400605 unsigned mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500607 pci_msi_set_enable(dev, 0); /* Disable MSI during set up */
Matthew Wilcox110828c2009-06-16 06:31:45 -0600608
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800609 entry = msi_setup_entry(dev, nvec, affd);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700610 if (!entry)
611 return -ENOMEM;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700612
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400613 /* All MSIs are unmasked by default, Mask them all */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800614 mask = msi_mask(entry->msi_attrib.multi_cap);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400615 msi_mask_irq(entry, mask, mask);
616
Jiang Liu5004e98a2015-07-09 16:00:41 +0800617 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
Michael Ellerman9c831332007-04-18 19:39:21 +1000618
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619 /* Configure MSI capability structure */
Jiang Liu8e047ad2014-11-15 22:24:07 +0800620 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000621 if (ret) {
Hidetoshi Seto7ba19302009-06-23 17:39:27 +0900622 msi_mask_irq(entry, mask, ~mask);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900623 free_msi_irqs(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000624 return ret;
Mark Maulefd58e552006-04-10 21:17:48 -0500625 }
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700626
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000627 ret = msi_verify_entries(dev);
628 if (ret) {
629 msi_mask_irq(entry, mask, ~mask);
630 free_msi_irqs(dev);
631 return ret;
632 }
633
Neil Hormanda8d1c82011-10-06 14:08:18 -0400634 ret = populate_msi_sysfs(dev);
635 if (ret) {
636 msi_mask_irq(entry, mask, ~mask);
637 free_msi_irqs(dev);
638 return ret;
639 }
640
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641 /* Set MSI enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700642 pci_intx_for_msi(dev, 0);
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500643 pci_msi_set_enable(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800644 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700645
Jiang Liu5f226992015-07-30 14:00:08 -0500646 pcibios_free_irq(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000647 dev->irq = entry->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648 return 0;
649}
650
Gavin Shan520fe9d2013-04-04 16:54:33 +0000651static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900652{
Kenji Kaneshige4302e0f2010-06-17 10:42:44 +0900653 resource_size_t phys_addr;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900654 u32 table_offset;
Yijing Wang6a878e52015-01-28 09:52:17 +0800655 unsigned long flags;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900656 u8 bir;
657
Bjorn Helgaas909094c2013-04-17 17:43:40 -0600658 pci_read_config_dword(dev, dev->msix_cap + PCI_MSIX_TABLE,
659 &table_offset);
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600660 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
Yijing Wang6a878e52015-01-28 09:52:17 +0800661 flags = pci_resource_flags(dev, bir);
662 if (!flags || (flags & IORESOURCE_UNSET))
663 return NULL;
664
Bjorn Helgaas4d187602013-04-17 18:10:07 -0600665 table_offset &= PCI_MSIX_TABLE_OFFSET;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900666 phys_addr = pci_resource_start(dev, bir) + table_offset;
667
668 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
669}
670
Gavin Shan520fe9d2013-04-04 16:54:33 +0000671static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200672 struct msix_entry *entries, int nvec,
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800673 const struct irq_affinity *affd)
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900674{
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200675 struct cpumask *curmsk, *masks = NULL;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900676 struct msi_desc *entry;
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200677 int ret, i;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900678
Christoph Hellwig8e1101d2017-08-25 18:58:42 -0500679 if (affd)
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800680 masks = irq_create_affinity_masks(nvec, affd);
Christoph Hellwig4ef33682016-07-12 18:20:18 +0900681
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200682 for (i = 0, curmsk = masks; i < nvec; i++) {
683 entry = alloc_msi_entry(&dev->dev, 1, curmsk);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900684 if (!entry) {
685 if (!i)
686 iounmap(base);
687 else
688 free_msi_irqs(dev);
689 /* No enough memory. Don't try again */
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200690 ret = -ENOMEM;
691 goto out;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900692 }
693
694 entry->msi_attrib.is_msix = 1;
695 entry->msi_attrib.is_64 = 1;
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900696 if (entries)
697 entry->msi_attrib.entry_nr = entries[i].entry;
698 else
699 entry->msi_attrib.entry_nr = i;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900700 entry->msi_attrib.default_irq = dev->irq;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900701 entry->mask_base = base;
702
Jiang Liu5004e98a2015-07-09 16:00:41 +0800703 list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200704 if (masks)
705 curmsk++;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900706 }
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200707 ret = 0;
708out:
709 kfree(masks);
Christophe JAILLET3adfb572017-01-27 16:14:53 +0100710 return ret;
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900711}
712
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900713static void msix_program_entries(struct pci_dev *dev,
Gavin Shan520fe9d2013-04-04 16:54:33 +0000714 struct msix_entry *entries)
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900715{
716 struct msi_desc *entry;
717 int i = 0;
718
Jiang Liu5004e98a2015-07-09 16:00:41 +0800719 for_each_pci_msi_entry(entry, dev) {
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900720 if (entries)
721 entries[i++].vector = entry->irq;
Christoph Hellwig12eb21d2016-07-12 18:20:15 +0900722 entry->masked = readl(pci_msix_desc_addr(entry) +
723 PCI_MSIX_ENTRY_VECTOR_CTRL);
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900724 msix_mask_irq(entry, 1);
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900725 }
726}
727
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728/**
729 * msix_capability_init - configure device's MSI-X capability
730 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700731 * @entries: pointer to an array of struct msix_entry entries
732 * @nvec: number of @entries
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800733 * @affd: Optional pointer to enable automatic affinity assignement
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600735 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700736 * single MSI-X irq. A return of zero indicates the successful setup of
737 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700738 **/
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200739static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries,
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800740 int nvec, const struct irq_affinity *affd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741{
Gavin Shan520fe9d2013-04-04 16:54:33 +0000742 int ret;
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900743 u16 control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700744 void __iomem *base;
745
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700746 /* Ensure MSI-X is disabled while it is set up */
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500747 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700748
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800749 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750 /* Request & Map MSI-X table region */
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600751 base = msix_map_region(dev, msix_table_size(control));
Hidetoshi Seto5a05a9d2009-08-06 11:34:34 +0900752 if (!base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753 return -ENOMEM;
754
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800755 ret = msix_setup_entries(dev, base, entries, nvec, affd);
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900756 if (ret)
757 return ret;
Michael Ellerman9c831332007-04-18 19:39:21 +1000758
Jiang Liu8e047ad2014-11-15 22:24:07 +0800759 ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900760 if (ret)
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100761 goto out_avail;
Michael Ellerman9c831332007-04-18 19:39:21 +1000762
Benjamin Herrenschmidtf144d142014-10-03 15:13:24 +1000763 /* Check if all MSI entries honor device restrictions */
764 ret = msi_verify_entries(dev);
765 if (ret)
766 goto out_free;
767
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700768 /*
769 * Some devices require MSI-X to be enabled before we can touch the
770 * MSI-X registers. We need to mask all the vectors to prevent
771 * interrupts coming in before they're fully set up.
772 */
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500773 pci_msix_clear_and_set_ctrl(dev, 0,
Yijing Wang66f0d0c2014-06-19 16:29:53 +0800774 PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700775
Hidetoshi Seto75cb3422009-08-06 11:35:10 +0900776 msix_program_entries(dev, entries);
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700777
Neil Hormanda8d1c82011-10-06 14:08:18 -0400778 ret = populate_msi_sysfs(dev);
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100779 if (ret)
780 goto out_free;
Neil Hormanda8d1c82011-10-06 14:08:18 -0400781
Matthew Wilcoxf5982822009-06-18 19:15:59 -0700782 /* Set MSI-X enabled bits and unmask the function */
David Millerba698ad2007-10-25 01:16:30 -0700783 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800784 dev->msix_enabled = 1;
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500785 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_MASKALL, 0);
Matthew Wilcox8d181012009-05-08 07:13:33 -0600786
Jiang Liu5f226992015-07-30 14:00:08 -0500787 pcibios_free_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788 return 0;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900789
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100790out_avail:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900791 if (ret < 0) {
792 /*
793 * If we had some success, report the number of irqs
794 * we succeeded in setting up.
795 */
Hidetoshi Setod9d70702009-08-06 11:35:48 +0900796 struct msi_desc *entry;
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900797 int avail = 0;
798
Jiang Liu5004e98a2015-07-09 16:00:41 +0800799 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900800 if (entry->irq != 0)
801 avail++;
802 }
803 if (avail != 0)
804 ret = avail;
805 }
806
Alexander Gordeev2adc7902013-12-16 09:34:56 +0100807out_free:
Hidetoshi Seto583871d2009-08-06 11:33:39 +0900808 free_msi_irqs(dev);
809
810 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700811}
812
813/**
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600814 * pci_msi_supported - check whether MSI may be enabled on a device
Brice Goglin24334a12006-08-31 01:55:07 -0400815 * @dev: pointer to the pci_dev data structure of MSI device function
Michael Ellermanc9953a72007-04-05 17:19:08 +1000816 * @nvec: how many MSIs have been requested ?
Brice Goglin24334a12006-08-31 01:55:07 -0400817 *
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700818 * Look at global flags, the device itself, and its parent buses
Michael Ellerman17bbc122007-04-05 17:19:07 +1000819 * to determine if MSI/-X are supported for the device. If MSI/-X is
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600820 * supported return 1, else return 0.
Brice Goglin24334a12006-08-31 01:55:07 -0400821 **/
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600822static int pci_msi_supported(struct pci_dev *dev, int nvec)
Brice Goglin24334a12006-08-31 01:55:07 -0400823{
824 struct pci_bus *bus;
825
Brice Goglin0306ebf2006-10-05 10:24:31 +0200826 /* MSI must be globally enabled and supported by the device */
Alexander Gordeev27e20602014-09-23 14:25:11 -0600827 if (!pci_msi_enable)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600828 return 0;
Alexander Gordeev27e20602014-09-23 14:25:11 -0600829
830 if (!dev || dev->no_msi || dev->current_state != PCI_D0)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600831 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400832
Michael Ellerman314e77b2007-04-05 17:19:12 +1000833 /*
834 * You can't ask to have 0 or less MSIs configured.
835 * a) it's stupid ..
836 * b) the list manipulation code assumes nvec >= 1.
837 */
838 if (nvec < 1)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600839 return 0;
Michael Ellerman314e77b2007-04-05 17:19:12 +1000840
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900841 /*
842 * Any bridge which does NOT route MSI transactions from its
843 * secondary bus to its primary bus must set NO_MSI flag on
Brice Goglin0306ebf2006-10-05 10:24:31 +0200844 * the secondary pci_bus.
845 * We expect only arch-specific PCI host bus controller driver
846 * or quirks for specific PCI bridges to be setting NO_MSI.
847 */
Brice Goglin24334a12006-08-31 01:55:07 -0400848 for (bus = dev->bus; bus; bus = bus->parent)
849 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600850 return 0;
Brice Goglin24334a12006-08-31 01:55:07 -0400851
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600852 return 1;
Brice Goglin24334a12006-08-31 01:55:07 -0400853}
854
855/**
Alexander Gordeevd1ac1d22013-12-30 08:28:13 +0100856 * pci_msi_vec_count - Return the number of MSI vectors a device can send
857 * @dev: device to report about
858 *
859 * This function returns the number of MSI vectors a device requested via
860 * Multiple Message Capable register. It returns a negative errno if the
861 * device is not capable sending MSI interrupts. Otherwise, the call succeeds
862 * and returns a power of two, up to a maximum of 2^5 (32), according to the
863 * MSI specification.
864 **/
865int pci_msi_vec_count(struct pci_dev *dev)
866{
867 int ret;
868 u16 msgctl;
869
870 if (!dev->msi_cap)
871 return -EINVAL;
872
873 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
874 ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
875
876 return ret;
877}
878EXPORT_SYMBOL(pci_msi_vec_count);
879
Bjorn Helgaas688769f2017-03-09 15:45:14 -0600880static void pci_msi_shutdown(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400882 struct msi_desc *desc;
883 u32 mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700884
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100885 if (!pci_msi_enable || !dev || !dev->msi_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700886 return;
887
Jiang Liu5004e98a2015-07-09 16:00:41 +0800888 BUG_ON(list_empty(dev_to_msi_list(&dev->dev)));
Jiang Liu4a7cc832015-07-09 16:00:44 +0800889 desc = first_pci_msi_entry(dev);
Matthew Wilcox110828c2009-06-16 06:31:45 -0600890
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500891 pci_msi_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700892 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800893 dev->msi_enabled = 0;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700894
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900895 /* Return the device with MSI unmasked as initial states */
Yijing Wang31ea5d42014-06-19 16:30:30 +0800896 mask = msi_mask(desc->msi_attrib.multi_cap);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900897 /* Keep cached state to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100898 __pci_msi_desc_mask_irq(desc, mask, ~mask);
Michael Ellermane387b9e2007-03-22 21:51:27 +1100899
900 /* Restore dev->irq to its default pin-assertion irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400901 dev->irq = desc->msi_attrib.default_irq;
Jiang Liu5f226992015-07-30 14:00:08 -0500902 pcibios_alloc_irq(dev);
Yinghai Lud52877c2008-04-23 14:58:09 -0700903}
Matthew Wilcox24d27552009-03-17 08:54:06 -0400904
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900905void pci_disable_msi(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -0700906{
Yinghai Lud52877c2008-04-23 14:58:09 -0700907 if (!pci_msi_enable || !dev || !dev->msi_enabled)
908 return;
909
910 pci_msi_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +0900911 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700912}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100913EXPORT_SYMBOL(pci_disable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914
Linus Torvalds1da177e2005-04-16 15:20:36 -0700915/**
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100916 * pci_msix_vec_count - return the number of device's MSI-X table entries
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100917 * @dev: pointer to the pci_dev data structure of MSI-X device function
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100918 * This function returns the number of device's MSI-X table entries and
919 * therefore the number of MSI-X vectors device is capable of sending.
920 * It returns a negative errno if the device is not capable of sending MSI-X
921 * interrupts.
922 **/
923int pci_msix_vec_count(struct pci_dev *dev)
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100924{
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100925 u16 control;
926
Gavin Shan520fe9d2013-04-04 16:54:33 +0000927 if (!dev->msix_cap)
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100928 return -EINVAL;
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100929
Bjorn Helgaasf84ecd282013-04-17 17:38:32 -0600930 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
Bjorn Helgaas527eee22013-04-17 17:44:48 -0600931 return msix_table_size(control);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100932}
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100933EXPORT_SYMBOL(pci_msix_vec_count);
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100934
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200935static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries,
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800936 int nvec, const struct irq_affinity *affd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937{
Bjorn Helgaas5ec09402014-09-23 14:38:28 -0600938 int nr_entries;
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700939 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940
Alexander Gordeeva06cd742014-09-23 12:45:58 -0600941 if (!pci_msi_supported(dev, nvec))
942 return -EINVAL;
Michael Ellermanc9953a72007-04-05 17:19:08 +1000943
Alexander Gordeevff1aa432013-12-30 08:28:15 +0100944 nr_entries = pci_msix_vec_count(dev);
945 if (nr_entries < 0)
946 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947 if (nvec > nr_entries)
Michael S. Tsirkin57fbf522009-05-07 11:28:41 +0300948 return nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949
Christoph Hellwig3ac020e2016-07-12 18:20:16 +0900950 if (entries) {
951 /* Check for any invalid entries */
952 for (i = 0; i < nvec; i++) {
953 if (entries[i].entry >= nr_entries)
954 return -EINVAL; /* invalid entry */
955 for (j = i + 1; j < nvec; j++) {
956 if (entries[i].entry == entries[j].entry)
957 return -EINVAL; /* duplicate entry */
958 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700959 }
960 }
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700961
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700962 /* Check whether driver already requested for MSI irq */
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900963 if (dev->msi_enabled) {
Frederick Lawler7506dc72018-01-18 12:55:24 -0600964 pci_info(dev, "can't enable MSI-X (MSI IRQ already assigned)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700965 return -EINVAL;
966 }
Christoph Hellwig61e1c592016-11-08 17:15:04 -0800967 return msix_capability_init(dev, entries, nvec, affd);
Thomas Gleixnere75eafb2016-09-14 16:18:49 +0200968}
969
Bjorn Helgaas688769f2017-03-09 15:45:14 -0600970static void pci_msix_shutdown(struct pci_dev *dev)
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100971{
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900972 struct msi_desc *entry;
973
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100974 if (!pci_msi_enable || !dev || !dev->msix_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700975 return;
976
Keith Busch01705912017-03-29 22:49:11 -0500977 if (pci_dev_is_disconnected(dev)) {
978 dev->msix_enabled = 0;
979 return;
980 }
981
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900982 /* Return the device with MSI-X masked as initial states */
Jiang Liu5004e98a2015-07-09 16:00:41 +0800983 for_each_pci_msi_entry(entry, dev) {
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900984 /* Keep cached states to be restored */
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100985 __pci_msix_desc_mask_irq(entry, 1);
Hidetoshi Seto12abb8b2009-06-24 12:08:09 +0900986 }
987
Michael S. Tsirkin61b64ab2015-05-07 09:52:21 -0500988 pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
David Millerba698ad2007-10-25 01:16:30 -0700989 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800990 dev->msix_enabled = 0;
Jiang Liu5f226992015-07-30 14:00:08 -0500991 pcibios_alloc_irq(dev);
Yinghai Lud52877c2008-04-23 14:58:09 -0700992}
Hidetoshi Setoc9018512009-08-06 11:31:27 +0900993
Hidetoshi Seto500559a2009-08-10 10:14:15 +0900994void pci_disable_msix(struct pci_dev *dev)
Yinghai Lud52877c2008-04-23 14:58:09 -0700995{
996 if (!pci_msi_enable || !dev || !dev->msix_enabled)
997 return;
998
999 pci_msix_shutdown(dev);
Hidetoshi Setof56e4482009-08-06 11:32:51 +09001000 free_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001001}
Michael Ellerman4cc086f2007-03-22 21:51:34 +11001002EXPORT_SYMBOL(pci_disable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003
Matthew Wilcox309e57d2006-03-05 22:33:34 -07001004void pci_no_msi(void)
1005{
1006 pci_msi_enable = 0;
1007}
Michael Ellermanc9953a72007-04-05 17:19:08 +10001008
Andrew Patterson07ae95f2008-11-10 15:31:05 -07001009/**
1010 * pci_msi_enabled - is MSI enabled?
1011 *
1012 * Returns true if MSI has not been disabled by the command-line option
1013 * pci=nomsi.
1014 **/
1015int pci_msi_enabled(void)
1016{
1017 return pci_msi_enable;
1018}
1019EXPORT_SYMBOL(pci_msi_enabled);
1020
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001021static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec,
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001022 const struct irq_affinity *affd)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001023{
Alexander Gordeev034cd972014-04-14 15:28:35 +02001024 int nvec;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001025 int rc;
1026
Alexander Gordeeva06cd742014-09-23 12:45:58 -06001027 if (!pci_msi_supported(dev, minvec))
1028 return -EINVAL;
Alexander Gordeev034cd972014-04-14 15:28:35 +02001029
Alexander Gordeev034cd972014-04-14 15:28:35 +02001030 /* Check whether driver already requested MSI-X irqs */
1031 if (dev->msix_enabled) {
Frederick Lawler7506dc72018-01-18 12:55:24 -06001032 pci_info(dev, "can't enable MSI (MSI-X already enabled)\n");
Alexander Gordeev034cd972014-04-14 15:28:35 +02001033 return -EINVAL;
1034 }
1035
Alexander Gordeev302a2522013-12-30 08:28:16 +01001036 if (maxvec < minvec)
1037 return -ERANGE;
1038
Jens Axboe6da4b3a2018-11-02 22:59:51 +08001039 /*
1040 * If the caller is passing in sets, we can't support a range of
1041 * vectors. The caller needs to handle that.
1042 */
1043 if (affd && affd->nr_sets && minvec != maxvec)
1044 return -EINVAL;
1045
Tonghao Zhang4c1ef722018-09-24 07:00:41 -07001046 if (WARN_ON_ONCE(dev->msi_enabled))
1047 return -EINVAL;
1048
Alexander Gordeev034cd972014-04-14 15:28:35 +02001049 nvec = pci_msi_vec_count(dev);
1050 if (nvec < 0)
1051 return nvec;
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001052 if (nvec < minvec)
Dennis Chen948b7622016-12-01 10:15:04 +08001053 return -ENOSPC;
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001054
1055 if (nvec > maxvec)
Alexander Gordeev034cd972014-04-14 15:28:35 +02001056 nvec = maxvec;
1057
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001058 for (;;) {
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001059 if (affd) {
Michael Hernandez6f9a22b2017-05-18 10:47:47 -07001060 nvec = irq_calc_affinity_vectors(minvec, nvec, affd);
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001061 if (nvec < minvec)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001062 return -ENOSPC;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001063 }
Alexander Gordeev302a2522013-12-30 08:28:16 +01001064
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001065 rc = msi_capability_init(dev, nvec, affd);
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001066 if (rc == 0)
1067 return nvec;
1068
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001069 if (rc < 0)
1070 return rc;
1071 if (rc < minvec)
1072 return -ENOSPC;
1073
1074 nvec = rc;
1075 }
1076}
1077
Christoph Hellwig4fe03952017-01-09 21:37:40 +01001078/* deprecated, don't use */
1079int pci_enable_msi(struct pci_dev *dev)
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001080{
Christoph Hellwig4fe03952017-01-09 21:37:40 +01001081 int rc = __pci_enable_msi_range(dev, 1, 1, NULL);
1082 if (rc < 0)
1083 return rc;
1084 return 0;
Alexander Gordeev302a2522013-12-30 08:28:16 +01001085}
Christoph Hellwig4fe03952017-01-09 21:37:40 +01001086EXPORT_SYMBOL(pci_enable_msi);
Alexander Gordeev302a2522013-12-30 08:28:16 +01001087
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001088static int __pci_enable_msix_range(struct pci_dev *dev,
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001089 struct msix_entry *entries, int minvec,
1090 int maxvec, const struct irq_affinity *affd)
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001091{
Thomas Gleixnere75eafb2016-09-14 16:18:49 +02001092 int rc, nvec = maxvec;
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001093
1094 if (maxvec < minvec)
1095 return -ERANGE;
1096
Jens Axboe6da4b3a2018-11-02 22:59:51 +08001097 /*
1098 * If the caller is passing in sets, we can't support a range of
1099 * supported vectors. The caller needs to handle that.
1100 */
1101 if (affd && affd->nr_sets && minvec != maxvec)
1102 return -EINVAL;
1103
Tonghao Zhang4c1ef722018-09-24 07:00:41 -07001104 if (WARN_ON_ONCE(dev->msix_enabled))
1105 return -EINVAL;
1106
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001107 for (;;) {
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001108 if (affd) {
Michael Hernandez6f9a22b2017-05-18 10:47:47 -07001109 nvec = irq_calc_affinity_vectors(minvec, nvec, affd);
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001110 if (nvec < minvec)
1111 return -ENOSPC;
1112 }
1113
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001114 rc = __pci_enable_msix(dev, entries, nvec, affd);
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001115 if (rc == 0)
1116 return nvec;
1117
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001118 if (rc < 0)
1119 return rc;
1120 if (rc < minvec)
1121 return -ENOSPC;
1122
1123 nvec = rc;
1124 }
1125}
1126
Alexander Gordeev302a2522013-12-30 08:28:16 +01001127/**
1128 * pci_enable_msix_range - configure device's MSI-X capability structure
1129 * @dev: pointer to the pci_dev data structure of MSI-X device function
1130 * @entries: pointer to an array of MSI-X entries
1131 * @minvec: minimum number of MSI-X irqs requested
1132 * @maxvec: maximum number of MSI-X irqs requested
1133 *
1134 * Setup the MSI-X capability structure of device function with a maximum
1135 * possible number of interrupts in the range between @minvec and @maxvec
1136 * upon its software driver call to request for MSI-X mode enabled on its
1137 * hardware device function. It returns a negative errno if an error occurs.
1138 * If it succeeds, it returns the actual number of interrupts allocated and
1139 * indicates the successful configuration of MSI-X capability structure
1140 * with new allocated MSI-X interrupts.
1141 **/
1142int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001143 int minvec, int maxvec)
Alexander Gordeev302a2522013-12-30 08:28:16 +01001144{
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001145 return __pci_enable_msix_range(dev, entries, minvec, maxvec, NULL);
Alexander Gordeev302a2522013-12-30 08:28:16 +01001146}
1147EXPORT_SYMBOL(pci_enable_msix_range);
Jiang Liu3878eae2014-11-11 21:02:18 +08001148
Christoph Hellwigaff17162016-07-12 18:20:17 +09001149/**
Christoph Hellwig402723a2016-11-08 17:15:05 -08001150 * pci_alloc_irq_vectors_affinity - allocate multiple IRQs for a device
Christoph Hellwigaff17162016-07-12 18:20:17 +09001151 * @dev: PCI device to operate on
1152 * @min_vecs: minimum number of vectors required (must be >= 1)
1153 * @max_vecs: maximum (desired) number of vectors
1154 * @flags: flags or quirks for the allocation
Christoph Hellwig402723a2016-11-08 17:15:05 -08001155 * @affd: optional description of the affinity requirements
Christoph Hellwigaff17162016-07-12 18:20:17 +09001156 *
1157 * Allocate up to @max_vecs interrupt vectors for @dev, using MSI-X or MSI
1158 * vectors if available, and fall back to a single legacy vector
1159 * if neither is available. Return the number of vectors allocated,
1160 * (which might be smaller than @max_vecs) if successful, or a negative
1161 * error code on error. If less than @min_vecs interrupt vectors are
1162 * available for @dev the function will fail with -ENOSPC.
1163 *
1164 * To get the Linux IRQ number used for a vector that can be passed to
1165 * request_irq() use the pci_irq_vector() helper.
1166 */
Christoph Hellwig402723a2016-11-08 17:15:05 -08001167int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,
1168 unsigned int max_vecs, unsigned int flags,
1169 const struct irq_affinity *affd)
Christoph Hellwigaff17162016-07-12 18:20:17 +09001170{
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001171 static const struct irq_affinity msi_default_affd;
Christoph Hellwigaff17162016-07-12 18:20:17 +09001172 int vecs = -ENOSPC;
1173
Christoph Hellwig402723a2016-11-08 17:15:05 -08001174 if (flags & PCI_IRQ_AFFINITY) {
1175 if (!affd)
1176 affd = &msi_default_affd;
1177 } else {
1178 if (WARN_ON(affd))
1179 affd = NULL;
1180 }
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001181
Christoph Hellwig4fe0d152016-08-11 07:11:04 -07001182 if (flags & PCI_IRQ_MSIX) {
Christoph Hellwig4ef33682016-07-12 18:20:18 +09001183 vecs = __pci_enable_msix_range(dev, NULL, min_vecs, max_vecs,
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001184 affd);
Christoph Hellwigaff17162016-07-12 18:20:17 +09001185 if (vecs > 0)
1186 return vecs;
1187 }
1188
Christoph Hellwig4fe0d152016-08-11 07:11:04 -07001189 if (flags & PCI_IRQ_MSI) {
Christoph Hellwig61e1c592016-11-08 17:15:04 -08001190 vecs = __pci_enable_msi_range(dev, min_vecs, max_vecs, affd);
Christoph Hellwigaff17162016-07-12 18:20:17 +09001191 if (vecs > 0)
1192 return vecs;
1193 }
1194
1195 /* use legacy irq if allowed */
Christoph Hellwig862290f2017-02-01 14:41:42 +01001196 if (flags & PCI_IRQ_LEGACY) {
1197 if (min_vecs == 1 && dev->irq) {
1198 pci_intx(dev, 1);
1199 return 1;
1200 }
Christoph Hellwig5d0bdf22016-08-11 07:11:05 -07001201 }
1202
Christoph Hellwigaff17162016-07-12 18:20:17 +09001203 return vecs;
1204}
Christoph Hellwig402723a2016-11-08 17:15:05 -08001205EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity);
Christoph Hellwigaff17162016-07-12 18:20:17 +09001206
1207/**
1208 * pci_free_irq_vectors - free previously allocated IRQs for a device
1209 * @dev: PCI device to operate on
1210 *
1211 * Undoes the allocations and enabling in pci_alloc_irq_vectors().
1212 */
1213void pci_free_irq_vectors(struct pci_dev *dev)
1214{
1215 pci_disable_msix(dev);
1216 pci_disable_msi(dev);
1217}
1218EXPORT_SYMBOL(pci_free_irq_vectors);
1219
1220/**
1221 * pci_irq_vector - return Linux IRQ number of a device vector
1222 * @dev: PCI device to operate on
1223 * @nr: device-relative interrupt vector index (0-based).
1224 */
1225int pci_irq_vector(struct pci_dev *dev, unsigned int nr)
1226{
1227 if (dev->msix_enabled) {
1228 struct msi_desc *entry;
1229 int i = 0;
1230
1231 for_each_pci_msi_entry(entry, dev) {
1232 if (i == nr)
1233 return entry->irq;
1234 i++;
1235 }
1236 WARN_ON_ONCE(1);
1237 return -EINVAL;
1238 }
1239
1240 if (dev->msi_enabled) {
1241 struct msi_desc *entry = first_pci_msi_entry(dev);
1242
1243 if (WARN_ON_ONCE(nr >= entry->nvec_used))
1244 return -EINVAL;
1245 } else {
1246 if (WARN_ON_ONCE(nr > 0))
1247 return -EINVAL;
1248 }
1249
1250 return dev->irq + nr;
1251}
1252EXPORT_SYMBOL(pci_irq_vector);
1253
Thomas Gleixneree8d41e2016-09-14 16:18:51 +02001254/**
1255 * pci_irq_get_affinity - return the affinity of a particular msi vector
1256 * @dev: PCI device to operate on
1257 * @nr: device-relative interrupt vector index (0-based).
1258 */
1259const struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr)
1260{
1261 if (dev->msix_enabled) {
1262 struct msi_desc *entry;
1263 int i = 0;
1264
1265 for_each_pci_msi_entry(entry, dev) {
1266 if (i == nr)
1267 return entry->affinity;
1268 i++;
1269 }
1270 WARN_ON_ONCE(1);
1271 return NULL;
1272 } else if (dev->msi_enabled) {
1273 struct msi_desc *entry = first_pci_msi_entry(dev);
1274
Jan Beulichd1d111e2016-11-08 00:43:54 -07001275 if (WARN_ON_ONCE(!entry || !entry->affinity ||
1276 nr >= entry->nvec_used))
Thomas Gleixneree8d41e2016-09-14 16:18:51 +02001277 return NULL;
1278
1279 return &entry->affinity[nr];
1280 } else {
1281 return cpu_possible_mask;
1282 }
1283}
1284EXPORT_SYMBOL(pci_irq_get_affinity);
1285
Shaohua Li27ddb682017-02-01 09:53:15 -08001286/**
1287 * pci_irq_get_node - return the numa node of a particular msi vector
1288 * @pdev: PCI device to operate on
1289 * @vec: device-relative interrupt vector index (0-based).
1290 */
1291int pci_irq_get_node(struct pci_dev *pdev, int vec)
1292{
1293 const struct cpumask *mask;
1294
1295 mask = pci_irq_get_affinity(pdev, vec);
1296 if (mask)
1297 return local_memory_node(cpu_to_node(cpumask_first(mask)));
1298 return dev_to_node(&pdev->dev);
1299}
1300EXPORT_SYMBOL(pci_irq_get_node);
1301
Jiang Liu25a98bd2015-07-09 16:00:45 +08001302struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc)
1303{
1304 return to_pci_dev(desc->dev);
1305}
Jake Oshinsa4289dc2015-12-10 17:52:59 +00001306EXPORT_SYMBOL(msi_desc_to_pci_dev);
Jiang Liu25a98bd2015-07-09 16:00:45 +08001307
Jiang Liuc179c9b2015-07-09 16:00:36 +08001308void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
1309{
1310 struct pci_dev *dev = msi_desc_to_pci_dev(desc);
1311
1312 return dev->bus->sysdata;
1313}
1314EXPORT_SYMBOL_GPL(msi_desc_to_pci_sysdata);
1315
Jiang Liu3878eae2014-11-11 21:02:18 +08001316#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
1317/**
1318 * pci_msi_domain_write_msg - Helper to write MSI message to PCI config space
1319 * @irq_data: Pointer to interrupt data of the MSI interrupt
1320 * @msg: Pointer to the message
1321 */
1322void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
1323{
Jiang Liu507a8832015-06-01 16:05:42 +08001324 struct msi_desc *desc = irq_data_get_msi_desc(irq_data);
Jiang Liu3878eae2014-11-11 21:02:18 +08001325
1326 /*
1327 * For MSI-X desc->irq is always equal to irq_data->irq. For
1328 * MSI only the first interrupt of MULTI MSI passes the test.
1329 */
1330 if (desc->irq == irq_data->irq)
1331 __pci_write_msi_msg(desc, msg);
1332}
1333
1334/**
1335 * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
1336 * @dev: Pointer to the PCI device
1337 * @desc: Pointer to the msi descriptor
1338 *
1339 * The ID number is only used within the irqdomain.
1340 */
1341irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
1342 struct msi_desc *desc)
1343{
1344 return (irq_hw_number_t)desc->msi_attrib.entry_nr |
1345 PCI_DEVID(dev->bus->number, dev->devfn) << 11 |
1346 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
1347}
1348
1349static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
1350{
1351 return !desc->msi_attrib.is_msix && desc->nvec_used > 1;
1352}
1353
1354/**
1355 * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
1356 * @domain: The interrupt domain to check
1357 * @info: The domain info for verification
1358 * @dev: The device to check
1359 *
1360 * Returns:
1361 * 0 if the functionality is supported
1362 * 1 if Multi MSI is requested, but the domain does not support it
1363 * -ENOTSUPP otherwise
1364 */
1365int pci_msi_domain_check_cap(struct irq_domain *domain,
1366 struct msi_domain_info *info, struct device *dev)
1367{
1368 struct msi_desc *desc = first_pci_msi_entry(to_pci_dev(dev));
1369
Christoph Hellwig4fe03952017-01-09 21:37:40 +01001370 /* Special handling to support __pci_enable_msi_range() */
Jiang Liu3878eae2014-11-11 21:02:18 +08001371 if (pci_msi_desc_is_multi_msi(desc) &&
1372 !(info->flags & MSI_FLAG_MULTI_PCI_MSI))
1373 return 1;
1374 else if (desc->msi_attrib.is_msix && !(info->flags & MSI_FLAG_PCI_MSIX))
1375 return -ENOTSUPP;
1376
1377 return 0;
1378}
1379
1380static int pci_msi_domain_handle_error(struct irq_domain *domain,
1381 struct msi_desc *desc, int error)
1382{
Christoph Hellwig4fe03952017-01-09 21:37:40 +01001383 /* Special handling to support __pci_enable_msi_range() */
Jiang Liu3878eae2014-11-11 21:02:18 +08001384 if (pci_msi_desc_is_multi_msi(desc) && error == -ENOSPC)
1385 return 1;
1386
1387 return error;
1388}
1389
1390#ifdef GENERIC_MSI_DOMAIN_OPS
1391static void pci_msi_domain_set_desc(msi_alloc_info_t *arg,
1392 struct msi_desc *desc)
1393{
1394 arg->desc = desc;
1395 arg->hwirq = pci_msi_domain_calc_hwirq(msi_desc_to_pci_dev(desc),
1396 desc);
1397}
1398#else
1399#define pci_msi_domain_set_desc NULL
1400#endif
1401
1402static struct msi_domain_ops pci_msi_domain_ops_default = {
1403 .set_desc = pci_msi_domain_set_desc,
1404 .msi_check = pci_msi_domain_check_cap,
1405 .handle_error = pci_msi_domain_handle_error,
1406};
1407
1408static void pci_msi_domain_update_dom_ops(struct msi_domain_info *info)
1409{
1410 struct msi_domain_ops *ops = info->ops;
1411
1412 if (ops == NULL) {
1413 info->ops = &pci_msi_domain_ops_default;
1414 } else {
1415 if (ops->set_desc == NULL)
1416 ops->set_desc = pci_msi_domain_set_desc;
1417 if (ops->msi_check == NULL)
1418 ops->msi_check = pci_msi_domain_check_cap;
1419 if (ops->handle_error == NULL)
1420 ops->handle_error = pci_msi_domain_handle_error;
1421 }
1422}
1423
1424static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info)
1425{
1426 struct irq_chip *chip = info->chip;
1427
1428 BUG_ON(!chip);
1429 if (!chip->irq_write_msi_msg)
1430 chip->irq_write_msi_msg = pci_msi_domain_write_msg;
Marc Zyngier0701c532015-10-13 19:14:45 +01001431 if (!chip->irq_mask)
1432 chip->irq_mask = pci_msi_mask_irq;
1433 if (!chip->irq_unmask)
1434 chip->irq_unmask = pci_msi_unmask_irq;
Jiang Liu3878eae2014-11-11 21:02:18 +08001435}
1436
1437/**
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001438 * pci_msi_create_irq_domain - Create a MSI interrupt domain
1439 * @fwnode: Optional fwnode of the interrupt controller
Jiang Liu3878eae2014-11-11 21:02:18 +08001440 * @info: MSI domain info
1441 * @parent: Parent irq domain
1442 *
1443 * Updates the domain and chip ops and creates a MSI interrupt domain.
1444 *
1445 * Returns:
1446 * A domain pointer or NULL in case of failure.
1447 */
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001448struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu3878eae2014-11-11 21:02:18 +08001449 struct msi_domain_info *info,
1450 struct irq_domain *parent)
1451{
Marc Zyngier03808392015-07-28 14:46:09 +01001452 struct irq_domain *domain;
1453
Marc Zyngier6988e0e2018-05-08 13:14:31 +01001454 if (WARN_ON(info->flags & MSI_FLAG_LEVEL_CAPABLE))
1455 info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
1456
Jiang Liu3878eae2014-11-11 21:02:18 +08001457 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
1458 pci_msi_domain_update_dom_ops(info);
1459 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
1460 pci_msi_domain_update_chip_ops(info);
1461
Marc Zyngierf3b09462016-07-13 17:18:33 +01001462 info->flags |= MSI_FLAG_ACTIVATE_EARLY;
Thomas Gleixner25e960e2017-10-17 09:54:58 +02001463 if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE))
1464 info->flags |= MSI_FLAG_MUST_REACTIVATE;
Marc Zyngierf3b09462016-07-13 17:18:33 +01001465
Heiner Kallweit923aa4c2018-08-05 22:31:03 +02001466 /* PCI-MSI is oneshot-safe */
1467 info->chip->flags |= IRQCHIP_ONESHOT_SAFE;
1468
Marc Zyngierbe5436c2015-10-13 12:51:44 +01001469 domain = msi_create_irq_domain(fwnode, info, parent);
Marc Zyngier03808392015-07-28 14:46:09 +01001470 if (!domain)
1471 return NULL;
1472
Marc Zyngier96f0d932017-06-22 11:42:50 +01001473 irq_domain_update_bus_token(domain, DOMAIN_BUS_PCI_MSI);
Marc Zyngier03808392015-07-28 14:46:09 +01001474 return domain;
Jiang Liu3878eae2014-11-11 21:02:18 +08001475}
Jake Oshinsa4289dc2015-12-10 17:52:59 +00001476EXPORT_SYMBOL_GPL(pci_msi_create_irq_domain);
Jiang Liu3878eae2014-11-11 21:02:18 +08001477
Robin Murphy235b2c72017-08-01 18:59:08 +01001478/*
1479 * Users of the generic MSI infrastructure expect a device to have a single ID,
1480 * so with DMA aliases we have to pick the least-worst compromise. Devices with
1481 * DMA phantom functions tend to still emit MSIs from the real function number,
1482 * so we ignore those and only consider topological aliases where either the
1483 * alias device or RID appears on a different bus number. We also make the
1484 * reasonable assumption that bridges are walked in an upstream direction (so
1485 * the last one seen wins), and the much braver assumption that the most likely
1486 * case is that of PCI->PCIe so we should always use the alias RID. This echoes
1487 * the logic from intel_irq_remapping's set_msi_sid(), which presumably works
1488 * well enough in practice; in the face of the horrible PCIe<->PCI-X conditions
1489 * for taking ownership all we can really do is close our eyes and hope...
1490 */
David Daneyb6eec9b2015-10-08 15:10:49 -07001491static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data)
1492{
1493 u32 *pa = data;
Robin Murphy235b2c72017-08-01 18:59:08 +01001494 u8 bus = PCI_BUS_NUM(*pa);
David Daneyb6eec9b2015-10-08 15:10:49 -07001495
Robin Murphy235b2c72017-08-01 18:59:08 +01001496 if (pdev->bus->number != bus || PCI_BUS_NUM(alias) != bus)
1497 *pa = alias;
1498
David Daneyb6eec9b2015-10-08 15:10:49 -07001499 return 0;
1500}
Robin Murphy235b2c72017-08-01 18:59:08 +01001501
David Daneyb6eec9b2015-10-08 15:10:49 -07001502/**
1503 * pci_msi_domain_get_msi_rid - Get the MSI requester id (RID)
1504 * @domain: The interrupt domain
1505 * @pdev: The PCI device.
1506 *
1507 * The RID for a device is formed from the alias, with a firmware
1508 * supplied mapping applied
1509 *
1510 * Returns: The RID.
1511 */
1512u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev)
1513{
1514 struct device_node *of_node;
Robin Murphy235b2c72017-08-01 18:59:08 +01001515 u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn);
David Daneyb6eec9b2015-10-08 15:10:49 -07001516
1517 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
1518
1519 of_node = irq_domain_get_of_node(domain);
Tomasz Nowickibe2021b2016-09-12 20:32:22 +02001520 rid = of_node ? of_msi_map_rid(&pdev->dev, of_node, rid) :
1521 iort_msi_map_rid(&pdev->dev, rid);
David Daneyb6eec9b2015-10-08 15:10:49 -07001522
1523 return rid;
1524}
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001525
1526/**
1527 * pci_msi_get_device_domain - Get the MSI domain for a given PCI device
1528 * @pdev: The PCI device
1529 *
1530 * Use the firmware data to find a device-specific MSI domain
Robin Murphy235b2c72017-08-01 18:59:08 +01001531 * (i.e. not one that is set as a default).
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001532 *
Robin Murphy235b2c72017-08-01 18:59:08 +01001533 * Returns: The corresponding MSI domain or NULL if none has been found.
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001534 */
1535struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
1536{
Tomasz Nowickibe2021b2016-09-12 20:32:22 +02001537 struct irq_domain *dom;
Robin Murphy235b2c72017-08-01 18:59:08 +01001538 u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn);
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001539
1540 pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid);
Tomasz Nowickibe2021b2016-09-12 20:32:22 +02001541 dom = of_msi_map_get_device_domain(&pdev->dev, rid);
1542 if (!dom)
1543 dom = iort_get_device_domain(&pdev->dev, rid);
1544 return dom;
Marc Zyngier54fa97e2015-10-02 14:43:06 +01001545}
Jiang Liu3878eae2014-11-11 21:02:18 +08001546#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */