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Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
Paul Mackerrasff2e6d7e2006-03-28 09:28:14 +11003 * This file contains the power_save function for 970-family CPUs.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 */
5
Linus Torvalds1da177e2005-04-16 15:20:36 -07006#include <linux/threads.h>
7#include <asm/processor.h>
8#include <asm/page.h>
9#include <asm/cputable.h>
10#include <asm/thread_info.h>
11#include <asm/ppc_asm.h>
Sam Ravnborg0013a852005-09-09 20:57:26 +020012#include <asm/asm-offsets.h>
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110013#include <asm/irqflags.h>
Madhavan Srinivasanc2e480b2017-12-20 09:25:42 +053014#include <asm/hw_irq.h>
Christophe Leroy2c86cd12018-07-05 16:25:01 +000015#include <asm/feature-fixups.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016
17#undef DEBUG
18
19 .text
20
Linus Torvalds1da177e2005-04-16 15:20:36 -070021_GLOBAL(power4_idle)
22BEGIN_FTR_SECTION
23 blr
24END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 /* Now check if user or arch enabled NAP mode */
David Gibsone58c3492006-01-13 14:56:25 +110026 LOAD_REG_ADDRBASE(r3,powersave_nap)
27 lwz r4,ADDROFF(powersave_nap)(r3)
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 cmpwi 0,r4,0
29 beqlr
30
Nicholas Piggin993ff6d2018-08-07 23:21:56 +100031 /* This sequence is similar to prep_irq_for_idle() */
32
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110033 /* Hard disable interrupts */
Paul Mackerrasd04c56f2006-10-04 16:47:49 +100034 mfmsr r7
35 rldicl r0,r7,48,1
36 rotldi r0,r0,16
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110037 mtmsrd r0,1
38
39 /* Check if something happened while soft-disabled */
40 lbz r0,PACAIRQHAPPENED(r13)
41 cmpwi cr0,r0,0
Nicholas Piggin993ff6d2018-08-07 23:21:56 +100042 bne- 2f
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110043
Nicholas Piggin993ff6d2018-08-07 23:21:56 +100044 /*
45 * Soft-enable interrupts. This will make power4_fixup_nap return
46 * to our caller with interrupts enabled (soft and hard). The caller
47 * can cope with either interrupts disabled or enabled upon return.
48 */
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110049#ifdef CONFIG_TRACE_IRQFLAGS
Nicholas Piggin993ff6d2018-08-07 23:21:56 +100050 /* Tell the tracer interrupts are on, because idle responds to them. */
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110051 mflr r0
52 std r0,16(r1)
53 stdu r1,-128(r1)
Anton Blanchardb1576fe2014-02-04 16:04:35 +110054 bl trace_hardirqs_on
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110055 addi r1,r1,128
56 ld r0,16(r1)
57 mtlr r0
Benjamin Herrenschmidt01e8ec42012-03-16 09:26:59 +110058 mfmsr r7
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +110059#endif /* CONFIG_TRACE_IRQFLAGS */
60
Madhavan Srinivasanc2e480b2017-12-20 09:25:42 +053061 li r0,IRQS_ENABLED
Madhavan Srinivasan4e26bc42017-12-20 09:25:50 +053062 stb r0,PACAIRQSOFTMASK(r13) /* we'll hard-enable shortly */
Linus Torvalds1da177e2005-04-16 15:20:36 -070063BEGIN_FTR_SECTION
64 DSSALL
65 sync
66END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
Christophe Leroyc911d2e2019-01-12 09:55:50 +000067 ld r9, PACA_THREAD_INFO(r13)
Paul Mackerrasf39224a2006-04-18 21:49:11 +100068 ld r8,TI_LOCAL_FLAGS(r9) /* set napping bit */
69 ori r8,r8,_TLF_NAPPING /* so when we take an exception */
70 std r8,TI_LOCAL_FLAGS(r9) /* it will return to our caller */
Paul Mackerrasff2e6d7e2006-03-28 09:28:14 +110071 ori r7,r7,MSR_EE
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 oris r7,r7,MSR_POW@h
Paul Mackerrasf39224a2006-04-18 21:49:11 +1000731: sync
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 isync
75 mtmsrd r7
76 isync
Paul Mackerrasf39224a2006-04-18 21:49:11 +100077 b 1b
78
Nicholas Piggin993ff6d2018-08-07 23:21:56 +1000792: /* Return if an interrupt had happened while soft disabled */
80 /* Set the HARD_DIS flag because interrupts are now hard disabled */
81 ori r0,r0,PACA_IRQ_HARD_DIS
82 stb r0,PACAIRQHAPPENED(r13)
83 blr