blob: ee4d073c889fae7c96933ae3e2a7b3d0cfae9e32 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
Tom Duffycd4e8fb2005-06-27 14:36:37 -07003 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
Roland Dreier4885bf62006-01-30 14:31:33 -08004 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
Roland Dreier2a1d9b72005-08-10 23:03:10 -07005 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
13 *
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
17 *
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
21 *
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 */
36
37#ifndef MTHCA_DEV_H
38#define MTHCA_DEV_H
39
40#include <linux/spinlock.h>
41#include <linux/kernel.h>
42#include <linux/pci.h>
43#include <linux/dma-mapping.h>
Tim Schmielaude259682006-01-08 01:02:05 -080044#include <linux/timer.h>
Roland Dreierfd9cfdd2006-01-30 16:45:11 -080045#include <linux/mutex.h>
Jack Morgensteinb3b30f52006-08-15 21:11:18 +030046#include <linux/list.h>
Matthew Wilcox6188e102008-04-18 22:21:05 -040047#include <linux/semaphore.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
49#include "mthca_provider.h"
50#include "mthca_doorbell.h"
51
52#define DRV_NAME "ib_mthca"
53#define PFX DRV_NAME ": "
Jack Morgenstein940801b2008-04-16 21:09:34 -070054#define DRV_VERSION "1.0"
55#define DRV_RELDATE "April 4, 2008"
Linus Torvalds1da177e2005-04-16 15:20:36 -070056
Linus Torvalds1da177e2005-04-16 15:20:36 -070057enum {
58 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
59 MTHCA_FLAG_SRQ = 1 << 2,
Adrian Bunke57895d2008-01-01 15:47:10 +020060 MTHCA_FLAG_MSI_X = 1 << 3,
61 MTHCA_FLAG_NO_LAM = 1 << 4,
62 MTHCA_FLAG_FMR = 1 << 5,
63 MTHCA_FLAG_MEMFREE = 1 << 6,
64 MTHCA_FLAG_PCIE = 1 << 7,
65 MTHCA_FLAG_SINAI_OPT = 1 << 8
Linus Torvalds1da177e2005-04-16 15:20:36 -070066};
67
68enum {
69 MTHCA_MAX_PORTS = 2
70};
71
72enum {
Michael S. Tsirkin2e8b9812005-08-13 21:19:38 -070073 MTHCA_BOARD_ID_LEN = 64
74};
75
76enum {
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 MTHCA_EQ_CONTEXT_SIZE = 0x40,
78 MTHCA_CQ_CONTEXT_SIZE = 0x40,
79 MTHCA_QP_CONTEXT_SIZE = 0x200,
80 MTHCA_RDB_ENTRY_SIZE = 0x20,
81 MTHCA_AV_SIZE = 0x20,
Roland Dreier1a1eb6a2007-10-09 19:59:17 -070082 MTHCA_MGM_ENTRY_SIZE = 0x100,
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
84 /* Arbel FW gives us these, but we need them for Tavor */
85 MTHCA_MPT_ENTRY_SIZE = 0x40,
86 MTHCA_MTT_SEG_SIZE = 0x40,
Jack Morgensteinefaae8f2005-10-10 13:48:07 -070087
88 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
Linus Torvalds1da177e2005-04-16 15:20:36 -070089};
90
91enum {
92 MTHCA_EQ_CMD,
93 MTHCA_EQ_ASYNC,
94 MTHCA_EQ_COMP,
95 MTHCA_NUM_EQ
96};
97
Michael S. Tsirkin2a4443a2005-04-16 15:26:25 -070098enum {
99 MTHCA_OPCODE_NOP = 0x00,
100 MTHCA_OPCODE_RDMA_WRITE = 0x08,
101 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
102 MTHCA_OPCODE_SEND = 0x0a,
103 MTHCA_OPCODE_SEND_IMM = 0x0b,
104 MTHCA_OPCODE_RDMA_READ = 0x10,
105 MTHCA_OPCODE_ATOMIC_CS = 0x11,
106 MTHCA_OPCODE_ATOMIC_FA = 0x12,
107 MTHCA_OPCODE_BIND_MW = 0x18,
108 MTHCA_OPCODE_INVALID = 0xff
109};
110
Eli Cohen14abdff2006-02-26 14:36:06 -0800111enum {
112 MTHCA_CMD_USE_EVENTS = 1 << 0,
113 MTHCA_CMD_POST_DOORBELLS = 1 << 1
114};
115
116enum {
117 MTHCA_CMD_NUM_DBELL_DWORDS = 8
118};
119
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120struct mthca_cmd {
Roland Dreiered878452005-06-27 14:36:45 -0700121 struct pci_pool *pool;
Roland Dreierfd9cfdd2006-01-30 16:45:11 -0800122 struct mutex hcr_mutex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123 struct semaphore poll_sem;
124 struct semaphore event_sem;
125 int max_cmds;
126 spinlock_t context_lock;
127 int free_head;
128 struct mthca_cmd_context *context;
129 u16 token_mask;
Eli Cohen14abdff2006-02-26 14:36:06 -0800130 u32 flags;
131 void __iomem *dbell_map;
132 u16 dbell_offsets[MTHCA_CMD_NUM_DBELL_DWORDS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133};
134
135struct mthca_limits {
136 int num_ports;
137 int vl_cap;
138 int mtu_cap;
139 int gid_table_len;
140 int pkey_table_len;
141 int local_ca_ack_delay;
142 int num_uars;
143 int max_sg;
144 int num_qps;
Jack Morgensteinefaae8f2005-10-10 13:48:07 -0700145 int max_wqes;
Jack Morgenstein77369ed2005-11-09 11:26:07 -0800146 int max_desc_sz;
Jack Morgensteinefaae8f2005-10-10 13:48:07 -0700147 int max_qp_init_rdma;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 int reserved_qps;
149 int num_srqs;
Jack Morgensteinefaae8f2005-10-10 13:48:07 -0700150 int max_srq_wqes;
Jack Morgenstein59fef3b2006-04-11 18:16:27 +0300151 int max_srq_sge;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 int reserved_srqs;
153 int num_eecs;
154 int reserved_eecs;
155 int num_cqs;
Jack Morgensteinefaae8f2005-10-10 13:48:07 -0700156 int max_cqes;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 int reserved_cqs;
158 int num_eqs;
159 int reserved_eqs;
160 int num_mpts;
161 int num_mtt_segs;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700162 int fmr_reserved_mtts;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 int reserved_mtts;
164 int reserved_mrws;
165 int reserved_uars;
166 int num_mgms;
167 int num_amgms;
168 int reserved_mcgs;
169 int num_pds;
170 int reserved_pds;
Jack Morgenstein0f69ce12005-11-04 16:03:32 -0800171 u32 page_size_cap;
Jack Morgenstein33033b72005-09-26 12:30:02 -0700172 u32 flags;
Jack Morgensteinbf6a9e32006-04-10 09:43:47 -0700173 u16 stat_rate_support;
Roland Dreierda6561c2005-08-17 07:39:10 -0700174 u8 port_width_cap;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175};
176
177struct mthca_alloc {
178 u32 last;
179 u32 top;
180 u32 max;
181 u32 mask;
182 spinlock_t lock;
183 unsigned long *table;
184};
185
186struct mthca_array {
187 struct {
188 void **page;
189 int used;
190 } *page_list;
191};
192
193struct mthca_uar_table {
194 struct mthca_alloc alloc;
195 u64 uarc_base;
196 int uarc_size;
197};
198
199struct mthca_pd_table {
200 struct mthca_alloc alloc;
201};
202
Michael S. Tsirkin9095e202005-04-16 15:26:26 -0700203struct mthca_buddy {
204 unsigned long **bits;
205 int max_order;
206 spinlock_t lock;
207};
208
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209struct mthca_mr_table {
210 struct mthca_alloc mpt_alloc;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700211 struct mthca_buddy mtt_buddy;
212 struct mthca_buddy *fmr_mtt_buddy;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 u64 mtt_base;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700214 u64 mpt_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215 struct mthca_icm_table *mtt_table;
216 struct mthca_icm_table *mpt_table;
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700217 struct {
218 void __iomem *mpt_base;
219 void __iomem *mtt_base;
220 struct mthca_buddy mtt_buddy;
221 } tavor_fmr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222};
223
224struct mthca_eq_table {
225 struct mthca_alloc alloc;
226 void __iomem *clr_int;
227 u32 clr_mask;
228 u32 arm_mask;
229 struct mthca_eq eq[MTHCA_NUM_EQ];
230 u64 icm_virt;
231 struct page *icm_page;
232 dma_addr_t icm_dma;
233 int have_irq;
234 u8 inta_pin;
235};
236
237struct mthca_cq_table {
238 struct mthca_alloc alloc;
239 spinlock_t lock;
240 struct mthca_array cq;
241 struct mthca_icm_table *table;
242};
243
Roland Dreierec34a922005-08-19 10:59:31 -0700244struct mthca_srq_table {
245 struct mthca_alloc alloc;
246 spinlock_t lock;
247 struct mthca_array srq;
248 struct mthca_icm_table *table;
249};
250
Linus Torvalds1da177e2005-04-16 15:20:36 -0700251struct mthca_qp_table {
252 struct mthca_alloc alloc;
253 u32 rdb_base;
254 int rdb_shift;
255 int sqp_start;
256 spinlock_t lock;
257 struct mthca_array qp;
258 struct mthca_icm_table *qp_table;
259 struct mthca_icm_table *eqp_table;
Roland Dreier08aeb142005-04-16 15:26:34 -0700260 struct mthca_icm_table *rdb_table;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261};
262
263struct mthca_av_table {
264 struct pci_pool *pool;
265 int num_ddr_avs;
266 u64 ddr_av_base;
267 void __iomem *av_map;
268 struct mthca_alloc alloc;
269};
270
271struct mthca_mcg_table {
Roland Dreierfd9cfdd2006-01-30 16:45:11 -0800272 struct mutex mutex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273 struct mthca_alloc alloc;
274 struct mthca_icm_table *table;
275};
276
Roland Dreier3d155f82005-10-27 11:03:38 -0700277struct mthca_catas_err {
278 u64 addr;
279 u32 __iomem *map;
Roland Dreier3d155f82005-10-27 11:03:38 -0700280 u32 size;
281 struct timer_list timer;
Jack Morgensteinb3b30f52006-08-15 21:11:18 +0300282 struct list_head list;
Roland Dreier3d155f82005-10-27 11:03:38 -0700283};
284
Jack Morgensteinb3b30f52006-08-15 21:11:18 +0300285extern struct mutex mthca_device_mutex;
286
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287struct mthca_dev {
288 struct ib_device ib_dev;
289 struct pci_dev *pdev;
290
291 int hca_type;
292 unsigned long mthca_flags;
293 unsigned long device_cap_flags;
294
295 u32 rev_id;
Michael S. Tsirkin2e8b9812005-08-13 21:19:38 -0700296 char board_id[MTHCA_BOARD_ID_LEN];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297
298 /* firmware info */
299 u64 fw_ver;
300 union {
301 struct {
302 u64 fw_start;
303 u64 fw_end;
304 } tavor;
305 struct {
306 u64 clr_int_base;
307 u64 eq_arm_base;
308 u64 eq_set_ci_base;
309 struct mthca_icm *fw_icm;
310 struct mthca_icm *aux_icm;
311 u16 fw_pages;
312 } arbel;
313 } fw;
314
315 u64 ddr_start;
316 u64 ddr_end;
317
318 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
Roland Dreierfd9cfdd2006-01-30 16:45:11 -0800319 struct mutex cap_mask_mutex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320
321 void __iomem *hcr;
322 void __iomem *kar;
323 void __iomem *clr_base;
324 union {
325 struct {
326 void __iomem *ecr_base;
327 } tavor;
328 struct {
329 void __iomem *eq_arm;
330 void __iomem *eq_set_ci_base;
331 } arbel;
332 } eq_regs;
333
334 struct mthca_cmd cmd;
335 struct mthca_limits limits;
336
337 struct mthca_uar_table uar_table;
338 struct mthca_pd_table pd_table;
339 struct mthca_mr_table mr_table;
340 struct mthca_eq_table eq_table;
341 struct mthca_cq_table cq_table;
Roland Dreierec34a922005-08-19 10:59:31 -0700342 struct mthca_srq_table srq_table;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343 struct mthca_qp_table qp_table;
344 struct mthca_av_table av_table;
345 struct mthca_mcg_table mcg_table;
346
Roland Dreier3d155f82005-10-27 11:03:38 -0700347 struct mthca_catas_err catas_err;
348
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349 struct mthca_uar driver_uar;
350 struct mthca_db_table *db_tab;
351 struct mthca_pd driver_pd;
352 struct mthca_mr driver_mr;
353
354 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
355 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
356 spinlock_t sm_lock;
Jack Morgensteinbf6a9e32006-04-10 09:43:47 -0700357 u8 rate[MTHCA_MAX_PORTS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358};
359
Roland Dreier227c9392006-04-02 14:39:20 -0700360#ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
361extern int mthca_debug_level;
362
363#define mthca_dbg(mdev, format, arg...) \
364 do { \
365 if (mthca_debug_level) \
366 dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
367 } while (0)
368
369#else /* CONFIG_INFINIBAND_MTHCA_DEBUG */
370
371#define mthca_dbg(mdev, format, arg...) do { (void) mdev; } while (0)
372
373#endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
374
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375#define mthca_err(mdev, format, arg...) \
376 dev_err(&mdev->pdev->dev, format, ## arg)
377#define mthca_info(mdev, format, arg...) \
378 dev_info(&mdev->pdev->dev, format, ## arg)
379#define mthca_warn(mdev, format, arg...) \
380 dev_warn(&mdev->pdev->dev, format, ## arg)
381
382extern void __buggy_use_of_MTHCA_GET(void);
383extern void __buggy_use_of_MTHCA_PUT(void);
384
385#define MTHCA_GET(dest, source, offset) \
386 do { \
387 void *__p = (char *) (source) + (offset); \
388 switch (sizeof (dest)) { \
Roland Dreierb3999392008-04-16 21:01:03 -0700389 case 1: (dest) = *(u8 *) __p; break; \
390 case 2: (dest) = be16_to_cpup(__p); break; \
391 case 4: (dest) = be32_to_cpup(__p); break; \
392 case 8: (dest) = be64_to_cpup(__p); break; \
393 default: __buggy_use_of_MTHCA_GET(); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394 } \
395 } while (0)
396
397#define MTHCA_PUT(dest, source, offset) \
398 do { \
Sean Hefty97f52eb2005-08-13 21:05:57 -0700399 void *__d = ((char *) (dest) + (offset)); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 switch (sizeof(source)) { \
Sean Hefty97f52eb2005-08-13 21:05:57 -0700401 case 1: *(u8 *) __d = (source); break; \
402 case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
403 case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
404 case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
405 default: __buggy_use_of_MTHCA_PUT(); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406 } \
407 } while (0)
408
409int mthca_reset(struct mthca_dev *mdev);
410
411u32 mthca_alloc(struct mthca_alloc *alloc);
412void mthca_free(struct mthca_alloc *alloc, u32 obj);
413int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
414 u32 reserved);
415void mthca_alloc_cleanup(struct mthca_alloc *alloc);
416void *mthca_array_get(struct mthca_array *array, int index);
417int mthca_array_set(struct mthca_array *array, int index, void *value);
418void mthca_array_clear(struct mthca_array *array, int index);
419int mthca_array_init(struct mthca_array *array, int nent);
420void mthca_array_cleanup(struct mthca_array *array, int nent);
Roland Dreier87b81672005-08-18 13:39:31 -0700421int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct,
422 union mthca_buf *buf, int *is_direct, struct mthca_pd *pd,
423 int hca_write, struct mthca_mr *mr);
424void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf,
425 int is_direct, struct mthca_mr *mr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426
427int mthca_init_uar_table(struct mthca_dev *dev);
428int mthca_init_pd_table(struct mthca_dev *dev);
429int mthca_init_mr_table(struct mthca_dev *dev);
430int mthca_init_eq_table(struct mthca_dev *dev);
431int mthca_init_cq_table(struct mthca_dev *dev);
Roland Dreierec34a922005-08-19 10:59:31 -0700432int mthca_init_srq_table(struct mthca_dev *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433int mthca_init_qp_table(struct mthca_dev *dev);
434int mthca_init_av_table(struct mthca_dev *dev);
435int mthca_init_mcg_table(struct mthca_dev *dev);
436
437void mthca_cleanup_uar_table(struct mthca_dev *dev);
438void mthca_cleanup_pd_table(struct mthca_dev *dev);
439void mthca_cleanup_mr_table(struct mthca_dev *dev);
440void mthca_cleanup_eq_table(struct mthca_dev *dev);
441void mthca_cleanup_cq_table(struct mthca_dev *dev);
Roland Dreierec34a922005-08-19 10:59:31 -0700442void mthca_cleanup_srq_table(struct mthca_dev *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443void mthca_cleanup_qp_table(struct mthca_dev *dev);
444void mthca_cleanup_av_table(struct mthca_dev *dev);
445void mthca_cleanup_mcg_table(struct mthca_dev *dev);
446
447int mthca_register_device(struct mthca_dev *dev);
448void mthca_unregister_device(struct mthca_dev *dev);
449
Roland Dreier3d155f82005-10-27 11:03:38 -0700450void mthca_start_catas_poll(struct mthca_dev *dev);
451void mthca_stop_catas_poll(struct mthca_dev *dev);
Jack Morgensteinb3b30f52006-08-15 21:11:18 +0300452int __mthca_restart_one(struct pci_dev *pdev);
453int mthca_catas_init(void);
454void mthca_catas_cleanup(void);
Roland Dreier3d155f82005-10-27 11:03:38 -0700455
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
457void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
458
Roland Dreier99264c12005-07-07 17:57:18 -0700459int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
461
Michael S. Tsirkinb2875d42007-02-10 23:14:25 +0200462int mthca_write_mtt_size(struct mthca_dev *dev);
463
Roland Dreierd56d6f92005-06-27 14:36:43 -0700464struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
465void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
466int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
467 int start_index, u64 *buffer_list, int list_len);
468int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
469 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
471 u32 access, struct mthca_mr *mr);
472int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
473 u64 *buffer_list, int buffer_size_shift,
474 int list_len, u64 iova, u64 total_size,
475 u32 access, struct mthca_mr *mr);
Michael S. Tsirkine0f5fdc2005-04-16 15:26:30 -0700476void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
477
478int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
479 u32 access, struct mthca_fmr *fmr);
480int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
481 int list_len, u64 iova);
482void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
483int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
484 int list_len, u64 iova);
485void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
486int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700487
488int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
489void mthca_unmap_eq_icm(struct mthca_dev *dev);
490
491int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
492 struct ib_wc *entry);
Roland Dreiered23a722007-05-06 21:02:48 -0700493int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
494int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495int mthca_init_cq(struct mthca_dev *dev, int nent,
Roland Dreier74c21742005-07-07 17:57:19 -0700496 struct mthca_ucontext *ctx, u32 pdn,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700497 struct mthca_cq *cq);
498void mthca_free_cq(struct mthca_dev *dev,
499 struct mthca_cq *cq);
Michael S. Tsirkinaffcd502005-10-29 07:39:42 -0700500void mthca_cq_completion(struct mthca_dev *dev, u32 cqn);
501void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
502 enum ib_event_type event_type);
Roland Dreiera3285aa2006-05-09 10:50:29 -0700503void mthca_cq_clean(struct mthca_dev *dev, struct mthca_cq *cq, u32 qpn,
Roland Dreierec34a922005-08-19 10:59:31 -0700504 struct mthca_srq *srq);
Roland Dreier4885bf62006-01-30 14:31:33 -0800505void mthca_cq_resize_copy_cqes(struct mthca_cq *cq);
506int mthca_alloc_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int nent);
507void mthca_free_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int cqe);
Roland Dreierec34a922005-08-19 10:59:31 -0700508
509int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
510 struct ib_srq_attr *attr, struct mthca_srq *srq);
511void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
Roland Dreier90f104d2005-10-06 13:15:56 -0700512int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
Ralph Campbell9bc57e22006-08-11 14:58:09 -0700513 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
Eli Cohen8ebe5072006-02-13 16:40:21 -0800514int mthca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
Jack Morgenstein59fef3b2006-04-11 18:16:27 +0300515int mthca_max_srq_sge(struct mthca_dev *dev);
Roland Dreierec34a922005-08-19 10:59:31 -0700516void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
517 enum ib_event_type event_type);
518void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
519int mthca_tavor_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
520 struct ib_recv_wr **bad_wr);
521int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
522 struct ib_recv_wr **bad_wr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523
524void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
525 enum ib_event_type event_type);
Eli Cohen8ebe5072006-02-13 16:40:21 -0800526int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
527 struct ib_qp_init_attr *qp_init_attr);
Ralph Campbell9bc57e22006-08-11 14:58:09 -0700528int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
529 struct ib_udata *udata);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
531 struct ib_send_wr **bad_wr);
532int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
533 struct ib_recv_wr **bad_wr);
534int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
535 struct ib_send_wr **bad_wr);
536int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
537 struct ib_recv_wr **bad_wr);
Roland Dreierd9b98b02006-01-31 20:45:51 -0800538void mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
539 int index, int *dbd, __be32 *new_wqe);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540int mthca_alloc_qp(struct mthca_dev *dev,
541 struct mthca_pd *pd,
542 struct mthca_cq *send_cq,
543 struct mthca_cq *recv_cq,
544 enum ib_qp_type type,
545 enum ib_sig_type send_policy,
Roland Dreier80c8ec22005-07-07 17:57:20 -0700546 struct ib_qp_cap *cap,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547 struct mthca_qp *qp);
548int mthca_alloc_sqp(struct mthca_dev *dev,
549 struct mthca_pd *pd,
550 struct mthca_cq *send_cq,
551 struct mthca_cq *recv_cq,
552 enum ib_sig_type send_policy,
Roland Dreier80c8ec22005-07-07 17:57:20 -0700553 struct ib_qp_cap *cap,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554 int qpn,
555 int port,
556 struct mthca_sqp *sqp);
557void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
558int mthca_create_ah(struct mthca_dev *dev,
559 struct mthca_pd *pd,
560 struct ib_ah_attr *ah_attr,
561 struct mthca_ah *ah);
562int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
563int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
564 struct ib_ud_header *header);
Jack Morgenstein1d89b1a2006-02-26 16:05:59 -0800565int mthca_ah_query(struct ib_ah *ibah, struct ib_ah_attr *attr);
Michael S. Tsirkin9eacee22006-01-12 15:55:41 -0800566int mthca_ah_grh_present(struct mthca_ah *ah);
Jack Morgensteinbf6a9e32006-04-10 09:43:47 -0700567u8 mthca_get_rate(struct mthca_dev *dev, int static_rate, u8 port);
568enum ib_rate mthca_rate_to_ib(struct mthca_dev *dev, u8 mthca_rate, u8 port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569
570int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
571int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
572
573int mthca_process_mad(struct ib_device *ibdev,
574 int mad_flags,
575 u8 port_num,
576 struct ib_wc *in_wc,
577 struct ib_grh *in_grh,
578 struct ib_mad *in_mad,
579 struct ib_mad *out_mad);
580int mthca_create_agents(struct mthca_dev *dev);
581void mthca_free_agents(struct mthca_dev *dev);
582
583static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
584{
585 return container_of(ibdev, struct mthca_dev, ib_dev);
586}
587
Roland Dreierd10ddbf2005-04-16 15:26:32 -0700588static inline int mthca_is_memfree(struct mthca_dev *dev)
589{
Roland Dreier68a3c212005-04-16 15:26:34 -0700590 return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
Roland Dreierd10ddbf2005-04-16 15:26:32 -0700591}
592
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593#endif /* MTHCA_DEV_H */