blob: 07e8d79b4a09015e56c58aa363a3ab1b0d3d9626 [file] [log] [blame]
Paul Mundt739d3402008-02-06 01:38:44 -08001/*
2 * Dallas DS1302 RTC Support
3 *
Alessandro Zummo2bfc3302009-08-20 12:31:49 +09004 * Copyright (C) 2002 David McCullough
5 * Copyright (C) 2003 - 2007 Paul Mundt
Paul Mundt739d3402008-02-06 01:38:44 -08006 *
7 * This file is subject to the terms and conditions of the GNU General Public
Alessandro Zummo2bfc3302009-08-20 12:31:49 +09008 * License version 2. See the file "COPYING" in the main directory of
Paul Mundt739d3402008-02-06 01:38:44 -08009 * this archive for more details.
10 */
Alessandro Zummo2bfc3302009-08-20 12:31:49 +090011
Paul Mundt739d3402008-02-06 01:38:44 -080012#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Paul Mundt739d3402008-02-06 01:38:44 -080016#include <linux/rtc.h>
Paul Mundt739d3402008-02-06 01:38:44 -080017#include <linux/io.h>
18#include <linux/bcd.h>
Paul Mundt739d3402008-02-06 01:38:44 -080019
20#define DRV_NAME "rtc-ds1302"
Alessandro Zummo2bfc3302009-08-20 12:31:49 +090021#define DRV_VERSION "0.1.1"
Paul Mundt739d3402008-02-06 01:38:44 -080022
23#define RTC_CMD_READ 0x81 /* Read command */
24#define RTC_CMD_WRITE 0x80 /* Write command */
25
Sergey Yanovichdfc657b2013-07-03 15:07:46 -070026#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */
27#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */
28
Paul Mundt739d3402008-02-06 01:38:44 -080029#define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
30#define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
Sergey Yanovichdfc657b2013-07-03 15:07:46 -070031#define RTC_ADDR_CTRL 0x07 /* Address of control register */
Paul Mundt739d3402008-02-06 01:38:44 -080032#define RTC_ADDR_YEAR 0x06 /* Address of year register */
33#define RTC_ADDR_DAY 0x05 /* Address of day of week register */
34#define RTC_ADDR_MON 0x04 /* Address of month register */
35#define RTC_ADDR_DATE 0x03 /* Address of day of month register */
36#define RTC_ADDR_HOUR 0x02 /* Address of hour register */
37#define RTC_ADDR_MIN 0x01 /* Address of minute register */
38#define RTC_ADDR_SEC 0x00 /* Address of second register */
39
Marc Zyngier72cc8e52010-05-24 14:33:47 -070040#ifdef CONFIG_SH_SECUREEDGE5410
41#include <asm/rtc.h>
Paul Mundtf6eec8d2010-10-29 19:06:53 +090042#include <mach/secureedge5410.h>
Marc Zyngier72cc8e52010-05-24 14:33:47 -070043
Paul Mundt739d3402008-02-06 01:38:44 -080044#define RTC_RESET 0x1000
45#define RTC_IODATA 0x0800
46#define RTC_SCLK 0x0400
47
Paul Mundt739d3402008-02-06 01:38:44 -080048#define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
49#define get_dp() SECUREEDGE_READ_IOPORT()
Marc Zyngier72cc8e52010-05-24 14:33:47 -070050#define ds1302_set_tx()
51#define ds1302_set_rx()
52
53static inline int ds1302_hw_init(void)
54{
55 return 0;
56}
57
58static inline void ds1302_reset(void)
59{
60 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
61}
62
63static inline void ds1302_clock(void)
64{
65 set_dp(get_dp() | RTC_SCLK); /* clock high */
66 set_dp(get_dp() & ~RTC_SCLK); /* clock low */
67}
68
69static inline void ds1302_start(void)
70{
71 set_dp(get_dp() | RTC_RESET);
72}
73
74static inline void ds1302_stop(void)
75{
76 set_dp(get_dp() & ~RTC_RESET);
77}
78
79static inline void ds1302_txbit(int bit)
80{
81 set_dp((get_dp() & ~RTC_IODATA) | (bit ? RTC_IODATA : 0));
82}
83
84static inline int ds1302_rxbit(void)
85{
86 return !!(get_dp() & RTC_IODATA);
87}
88
Paul Mundt739d3402008-02-06 01:38:44 -080089#else
90#error "Add support for your platform"
91#endif
92
Paul Mundt739d3402008-02-06 01:38:44 -080093static void ds1302_sendbits(unsigned int val)
94{
95 int i;
96
Marc Zyngier72cc8e52010-05-24 14:33:47 -070097 ds1302_set_tx();
98
Paul Mundt739d3402008-02-06 01:38:44 -080099 for (i = 8; (i); i--, val >>= 1) {
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700100 ds1302_txbit(val & 0x1);
101 ds1302_clock();
Paul Mundt739d3402008-02-06 01:38:44 -0800102 }
103}
104
105static unsigned int ds1302_recvbits(void)
106{
107 unsigned int val;
108 int i;
109
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700110 ds1302_set_rx();
111
Paul Mundt739d3402008-02-06 01:38:44 -0800112 for (i = 0, val = 0; (i < 8); i++) {
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700113 val |= (ds1302_rxbit() << i);
114 ds1302_clock();
Paul Mundt739d3402008-02-06 01:38:44 -0800115 }
116
117 return val;
118}
119
120static unsigned int ds1302_readbyte(unsigned int addr)
121{
122 unsigned int val;
123
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700124 ds1302_reset();
Paul Mundt739d3402008-02-06 01:38:44 -0800125
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700126 ds1302_start();
Paul Mundt739d3402008-02-06 01:38:44 -0800127 ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
128 val = ds1302_recvbits();
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700129 ds1302_stop();
Paul Mundt739d3402008-02-06 01:38:44 -0800130
131 return val;
132}
133
134static void ds1302_writebyte(unsigned int addr, unsigned int val)
135{
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700136 ds1302_reset();
137
138 ds1302_start();
Paul Mundt739d3402008-02-06 01:38:44 -0800139 ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
140 ds1302_sendbits(val);
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700141 ds1302_stop();
Paul Mundt739d3402008-02-06 01:38:44 -0800142}
143
144static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
145{
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700146 tm->tm_sec = bcd2bin(ds1302_readbyte(RTC_ADDR_SEC));
147 tm->tm_min = bcd2bin(ds1302_readbyte(RTC_ADDR_MIN));
148 tm->tm_hour = bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR));
149 tm->tm_wday = bcd2bin(ds1302_readbyte(RTC_ADDR_DAY));
150 tm->tm_mday = bcd2bin(ds1302_readbyte(RTC_ADDR_DATE));
151 tm->tm_mon = bcd2bin(ds1302_readbyte(RTC_ADDR_MON)) - 1;
152 tm->tm_year = bcd2bin(ds1302_readbyte(RTC_ADDR_YEAR));
Paul Mundt739d3402008-02-06 01:38:44 -0800153
154 if (tm->tm_year < 70)
155 tm->tm_year += 100;
156
Paul Mundt739d3402008-02-06 01:38:44 -0800157 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
158 "mday=%d, mon=%d, year=%d, wday=%d\n",
Harvey Harrison2a4e2b8782008-04-28 02:12:00 -0700159 __func__,
Paul Mundt739d3402008-02-06 01:38:44 -0800160 tm->tm_sec, tm->tm_min, tm->tm_hour,
161 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
162
Alessandro Zummo2bfc3302009-08-20 12:31:49 +0900163 return rtc_valid_tm(tm);
Paul Mundt739d3402008-02-06 01:38:44 -0800164}
165
166static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm)
167{
Sergey Yanovichdfc657b2013-07-03 15:07:46 -0700168 ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE);
Paul Mundt739d3402008-02-06 01:38:44 -0800169 /* Stop RTC */
170 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
171
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700172 ds1302_writebyte(RTC_ADDR_SEC, bin2bcd(tm->tm_sec));
173 ds1302_writebyte(RTC_ADDR_MIN, bin2bcd(tm->tm_min));
174 ds1302_writebyte(RTC_ADDR_HOUR, bin2bcd(tm->tm_hour));
175 ds1302_writebyte(RTC_ADDR_DAY, bin2bcd(tm->tm_wday));
176 ds1302_writebyte(RTC_ADDR_DATE, bin2bcd(tm->tm_mday));
177 ds1302_writebyte(RTC_ADDR_MON, bin2bcd(tm->tm_mon + 1));
178 ds1302_writebyte(RTC_ADDR_YEAR, bin2bcd(tm->tm_year % 100));
Paul Mundt739d3402008-02-06 01:38:44 -0800179
180 /* Start RTC */
181 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
182
Sergey Yanovichdfc657b2013-07-03 15:07:46 -0700183 ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE);
184
Paul Mundt739d3402008-02-06 01:38:44 -0800185 return 0;
186}
187
188static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd,
189 unsigned long arg)
190{
191 switch (cmd) {
192#ifdef RTC_SET_CHARGE
193 case RTC_SET_CHARGE:
194 {
Paul Mundt739d3402008-02-06 01:38:44 -0800195 int tcs_val;
196
197 if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int)))
198 return -EFAULT;
199
Paul Mundt739d3402008-02-06 01:38:44 -0800200 ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf));
Paul Mundt739d3402008-02-06 01:38:44 -0800201 return 0;
202 }
203#endif
204 }
205
206 return -ENOIOCTLCMD;
207}
208
209static struct rtc_class_ops ds1302_rtc_ops = {
210 .read_time = ds1302_rtc_read_time,
211 .set_time = ds1302_rtc_set_time,
212 .ioctl = ds1302_rtc_ioctl,
213};
214
Alessandro Zummo2bfc3302009-08-20 12:31:49 +0900215static int __init ds1302_rtc_probe(struct platform_device *pdev)
Paul Mundt739d3402008-02-06 01:38:44 -0800216{
Alessandro Zummo2bfc3302009-08-20 12:31:49 +0900217 struct rtc_device *rtc;
Paul Mundt739d3402008-02-06 01:38:44 -0800218
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700219 if (ds1302_hw_init()) {
220 dev_err(&pdev->dev, "Failed to init communication channel");
221 return -EINVAL;
222 }
223
Paul Mundt739d3402008-02-06 01:38:44 -0800224 /* Reset */
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700225 ds1302_reset();
Paul Mundt739d3402008-02-06 01:38:44 -0800226
227 /* Write a magic value to the DS1302 RAM, and see if it sticks. */
228 ds1302_writebyte(RTC_ADDR_RAM0, 0x42);
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700229 if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) {
230 dev_err(&pdev->dev, "Failed to probe");
Paul Mundt739d3402008-02-06 01:38:44 -0800231 return -ENODEV;
Marc Zyngier72cc8e52010-05-24 14:33:47 -0700232 }
Paul Mundt739d3402008-02-06 01:38:44 -0800233
Jingoo Han0ea9a0e2013-04-29 16:19:33 -0700234 rtc = devm_rtc_device_register(&pdev->dev, "ds1302",
Paul Mundt739d3402008-02-06 01:38:44 -0800235 &ds1302_rtc_ops, THIS_MODULE);
Alessandro Zummo2bfc3302009-08-20 12:31:49 +0900236 if (IS_ERR(rtc))
237 return PTR_ERR(rtc);
Paul Mundt739d3402008-02-06 01:38:44 -0800238
239 platform_set_drvdata(pdev, rtc);
240
241 return 0;
Paul Mundt739d3402008-02-06 01:38:44 -0800242}
243
Paul Mundt739d3402008-02-06 01:38:44 -0800244static struct platform_driver ds1302_platform_driver = {
245 .driver = {
246 .name = DRV_NAME,
247 .owner = THIS_MODULE,
248 },
Paul Mundt739d3402008-02-06 01:38:44 -0800249};
250
Jingoo Han625f52252013-04-29 16:18:39 -0700251module_platform_driver_probe(ds1302_platform_driver, ds1302_rtc_probe);
Paul Mundt739d3402008-02-06 01:38:44 -0800252
253MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
254MODULE_VERSION(DRV_VERSION);
255MODULE_AUTHOR("Paul Mundt, David McCullough");
256MODULE_LICENSE("GPL v2");