Fabio Estevam | 1f31e25 | 2018-05-14 14:58:47 -0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | // |
| 3 | // Copyright 2012 Freescale Semiconductor, Inc. |
| 4 | // Copyright 2011 Linaro Ltd. |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 5 | |
Steve Longerbeam | 545fb52 | 2017-06-12 11:24:00 -0700 | [diff] [blame] | 6 | #include <dt-bindings/clock/imx6qdl-clock.h> |
Anson Huang | 22724cf1 | 2014-01-20 20:02:38 +0800 | [diff] [blame] | 7 | #include <dt-bindings/gpio/gpio.h> |
Anson Huang | 8e4422a | 2013-12-19 16:07:24 -0500 | [diff] [blame] | 8 | #include <dt-bindings/input/input.h> |
| 9 | |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 10 | / { |
Sascha Hauer | 48f5196 | 2014-05-07 15:19:00 +0200 | [diff] [blame] | 11 | chosen { |
| 12 | stdout-path = &uart1; |
| 13 | }; |
| 14 | |
Marco Franchi | ad00e08 | 2018-01-24 11:22:14 -0200 | [diff] [blame] | 15 | memory@10000000 { |
Marco Franchi | 404c0c9 | 2018-12-05 16:10:03 -0200 | [diff] [blame] | 16 | device_type = "memory"; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 17 | reg = <0x10000000 0x40000000>; |
| 18 | }; |
| 19 | |
Fabio Estevam | 75ad7ff | 2018-12-06 01:42:30 +0000 | [diff] [blame] | 20 | reg_usb_otg_vbus: regulator-usb-otg-vbus { |
| 21 | compatible = "regulator-fixed"; |
| 22 | regulator-name = "usb_otg_vbus"; |
| 23 | regulator-min-microvolt = <5000000>; |
| 24 | regulator-max-microvolt = <5000000>; |
Fabio Estevam | 5649dbd | 2018-12-06 08:36:41 -0200 | [diff] [blame] | 25 | gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; |
Fabio Estevam | 75ad7ff | 2018-12-06 01:42:30 +0000 | [diff] [blame] | 26 | enable-active-high; |
| 27 | vin-supply = <&swbst_reg>; |
| 28 | }; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 29 | |
Fabio Estevam | 75ad7ff | 2018-12-06 01:42:30 +0000 | [diff] [blame] | 30 | reg_usb_h1_vbus: regulator-usb-h1-vbus { |
| 31 | compatible = "regulator-fixed"; |
| 32 | regulator-name = "usb_h1_vbus"; |
| 33 | regulator-min-microvolt = <5000000>; |
| 34 | regulator-max-microvolt = <5000000>; |
Fabio Estevam | 5649dbd | 2018-12-06 08:36:41 -0200 | [diff] [blame] | 35 | gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>; |
Fabio Estevam | 75ad7ff | 2018-12-06 01:42:30 +0000 | [diff] [blame] | 36 | enable-active-high; |
| 37 | vin-supply = <&swbst_reg>; |
| 38 | }; |
Nicolin Chen | fdbfb43 | 2013-06-13 19:51:00 +0800 | [diff] [blame] | 39 | |
Fabio Estevam | 75ad7ff | 2018-12-06 01:42:30 +0000 | [diff] [blame] | 40 | reg_audio: regulator-audio { |
| 41 | compatible = "regulator-fixed"; |
| 42 | regulator-name = "wm8962-supply"; |
Fabio Estevam | 5649dbd | 2018-12-06 08:36:41 -0200 | [diff] [blame] | 43 | gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>; |
Fabio Estevam | 75ad7ff | 2018-12-06 01:42:30 +0000 | [diff] [blame] | 44 | enable-active-high; |
| 45 | }; |
Peter Chen | 015fa46 | 2013-08-12 16:46:24 +0800 | [diff] [blame] | 46 | |
Fabio Estevam | 75ad7ff | 2018-12-06 01:42:30 +0000 | [diff] [blame] | 47 | reg_pcie: regulator-pcie { |
| 48 | compatible = "regulator-fixed"; |
| 49 | pinctrl-names = "default"; |
| 50 | pinctrl-0 = <&pinctrl_pcie_reg>; |
| 51 | regulator-name = "MPCIE_3V3"; |
| 52 | regulator-min-microvolt = <3300000>; |
| 53 | regulator-max-microvolt = <3300000>; |
Fabio Estevam | 5649dbd | 2018-12-06 08:36:41 -0200 | [diff] [blame] | 54 | gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; |
Fabio Estevam | 75ad7ff | 2018-12-06 01:42:30 +0000 | [diff] [blame] | 55 | enable-active-high; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 56 | }; |
| 57 | |
Anson Huang | ab43e98 | 2018-12-06 01:42:34 +0000 | [diff] [blame] | 58 | reg_sensors: regulator-sensors { |
| 59 | compatible = "regulator-fixed"; |
| 60 | pinctrl-names = "default"; |
| 61 | pinctrl-0 = <&pinctrl_sensors_reg>; |
| 62 | regulator-name = "sensors-supply"; |
| 63 | regulator-min-microvolt = <3300000>; |
| 64 | regulator-max-microvolt = <3300000>; |
| 65 | gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; |
| 66 | enable-active-high; |
Anson Huang | ab43e98 | 2018-12-06 01:42:34 +0000 | [diff] [blame] | 67 | }; |
| 68 | |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 69 | gpio-keys { |
| 70 | compatible = "gpio-keys"; |
Anson Huang | 8e4422a | 2013-12-19 16:07:24 -0500 | [diff] [blame] | 71 | pinctrl-names = "default"; |
| 72 | pinctrl-0 = <&pinctrl_gpio_keys>; |
| 73 | |
| 74 | power { |
| 75 | label = "Power Button"; |
Anson Huang | 22724cf1 | 2014-01-20 20:02:38 +0800 | [diff] [blame] | 76 | gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; |
Sudeep Holla | 26cefdd | 2015-10-21 11:10:08 +0100 | [diff] [blame] | 77 | wakeup-source; |
Anson Huang | 8e4422a | 2013-12-19 16:07:24 -0500 | [diff] [blame] | 78 | linux,code = <KEY_POWER>; |
| 79 | }; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 80 | |
| 81 | volume-up { |
| 82 | label = "Volume Up"; |
Anson Huang | 22724cf1 | 2014-01-20 20:02:38 +0800 | [diff] [blame] | 83 | gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; |
Sudeep Holla | 26cefdd | 2015-10-21 11:10:08 +0100 | [diff] [blame] | 84 | wakeup-source; |
Anson Huang | 8e4422a | 2013-12-19 16:07:24 -0500 | [diff] [blame] | 85 | linux,code = <KEY_VOLUMEUP>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 86 | }; |
| 87 | |
| 88 | volume-down { |
| 89 | label = "Volume Down"; |
Anson Huang | 22724cf1 | 2014-01-20 20:02:38 +0800 | [diff] [blame] | 90 | gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; |
Sudeep Holla | 26cefdd | 2015-10-21 11:10:08 +0100 | [diff] [blame] | 91 | wakeup-source; |
Anson Huang | 8e4422a | 2013-12-19 16:07:24 -0500 | [diff] [blame] | 92 | linux,code = <KEY_VOLUMEDOWN>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 93 | }; |
| 94 | }; |
Nicolin Chen | 77b38fc | 2013-06-14 13:22:46 +0800 | [diff] [blame] | 95 | |
| 96 | sound { |
| 97 | compatible = "fsl,imx6q-sabresd-wm8962", |
| 98 | "fsl,imx-audio-wm8962"; |
| 99 | model = "wm8962-audio"; |
| 100 | ssi-controller = <&ssi2>; |
| 101 | audio-codec = <&codec>; |
| 102 | audio-routing = |
| 103 | "Headphone Jack", "HPOUTL", |
| 104 | "Headphone Jack", "HPOUTR", |
| 105 | "Ext Spk", "SPKOUTL", |
| 106 | "Ext Spk", "SPKOUTR", |
Fabio Estevam | 76e6868 | 2014-11-07 12:08:01 -0200 | [diff] [blame] | 107 | "AMIC", "MICBIAS", |
| 108 | "IN3R", "AMIC"; |
Nicolin Chen | 77b38fc | 2013-06-14 13:22:46 +0800 | [diff] [blame] | 109 | mux-int-port = <2>; |
| 110 | mux-ext-port = <3>; |
| 111 | }; |
Rogerio Pimentel | 2f35c0c | 2013-10-11 16:48:16 -0300 | [diff] [blame] | 112 | |
Fabio Estevam | e088494 | 2016-03-28 14:10:48 -0300 | [diff] [blame] | 113 | backlight_lvds: backlight-lvds { |
Rogerio Pimentel | 2f35c0c | 2013-10-11 16:48:16 -0300 | [diff] [blame] | 114 | compatible = "pwm-backlight"; |
| 115 | pwms = <&pwm1 0 5000000>; |
| 116 | brightness-levels = <0 4 8 16 32 64 128 255>; |
| 117 | default-brightness-level = <7>; |
| 118 | status = "okay"; |
| 119 | }; |
Vincent Stehlé | 702bfbe | 2014-03-05 19:58:39 +0100 | [diff] [blame] | 120 | |
| 121 | leds { |
| 122 | compatible = "gpio-leds"; |
| 123 | pinctrl-names = "default"; |
| 124 | pinctrl-0 = <&pinctrl_gpio_leds>; |
| 125 | |
| 126 | red { |
Jagan Teki | bf5393c | 2016-10-14 15:09:29 +0530 | [diff] [blame] | 127 | gpios = <&gpio1 2 0>; |
| 128 | default-state = "on"; |
Vincent Stehlé | 702bfbe | 2014-03-05 19:58:39 +0100 | [diff] [blame] | 129 | }; |
| 130 | }; |
Fabio Estevam | e088494 | 2016-03-28 14:10:48 -0300 | [diff] [blame] | 131 | |
| 132 | panel { |
| 133 | compatible = "hannstar,hsd100pxn1"; |
| 134 | backlight = <&backlight_lvds>; |
| 135 | |
| 136 | port { |
| 137 | panel_in: endpoint { |
| 138 | remote-endpoint = <&lvds0_out>; |
| 139 | }; |
| 140 | }; |
| 141 | }; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 142 | }; |
| 143 | |
Steve Longerbeam | 545fb52 | 2017-06-12 11:24:00 -0700 | [diff] [blame] | 144 | &ipu1_csi0_from_ipu1_csi0_mux { |
| 145 | bus-width = <8>; |
| 146 | data-shift = <12>; /* Lines 19:12 used */ |
| 147 | hsync-active = <1>; |
| 148 | vsync-active = <1>; |
| 149 | }; |
| 150 | |
| 151 | &ipu1_csi0_mux_from_parallel_sensor { |
| 152 | remote-endpoint = <&ov5642_to_ipu1_csi0_mux>; |
| 153 | }; |
| 154 | |
| 155 | &ipu1_csi0 { |
| 156 | pinctrl-names = "default"; |
| 157 | pinctrl-0 = <&pinctrl_ipu1_csi0>; |
| 158 | }; |
| 159 | |
| 160 | &mipi_csi { |
| 161 | status = "okay"; |
| 162 | |
| 163 | port@0 { |
| 164 | reg = <0>; |
| 165 | |
| 166 | mipi_csi2_in: endpoint { |
| 167 | remote-endpoint = <&ov5640_to_mipi_csi2>; |
| 168 | clock-lanes = <0>; |
| 169 | data-lanes = <1 2>; |
| 170 | }; |
| 171 | }; |
| 172 | }; |
| 173 | |
Nicolin Chen | 4882870 | 2013-06-14 13:19:57 +0800 | [diff] [blame] | 174 | &audmux { |
| 175 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 176 | pinctrl-0 = <&pinctrl_audmux>; |
Nicolin Chen | 4882870 | 2013-06-14 13:19:57 +0800 | [diff] [blame] | 177 | status = "okay"; |
| 178 | }; |
| 179 | |
Fabio Estevam | d28be49 | 2015-06-26 14:10:53 -0300 | [diff] [blame] | 180 | &clks { |
| 181 | assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, |
| 182 | <&clks IMX6QDL_CLK_LDB_DI1_SEL>; |
| 183 | assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, |
| 184 | <&clks IMX6QDL_CLK_PLL3_USB_OTG>; |
| 185 | }; |
| 186 | |
Huang Shijie | 9110ede | 2013-06-21 10:19:11 +0800 | [diff] [blame] | 187 | &ecspi1 { |
Huang Shijie | 9110ede | 2013-06-21 10:19:11 +0800 | [diff] [blame] | 188 | cs-gpios = <&gpio4 9 0>; |
| 189 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 190 | pinctrl-0 = <&pinctrl_ecspi1>; |
Huang Shijie | 9110ede | 2013-06-21 10:19:11 +0800 | [diff] [blame] | 191 | status = "okay"; |
| 192 | |
| 193 | flash: m25p80@0 { |
| 194 | #address-cells = <1>; |
| 195 | #size-cells = <1>; |
Rafał Miłecki | 79826ac | 2015-08-16 08:39:17 +0200 | [diff] [blame] | 196 | compatible = "st,m25p32", "jedec,spi-nor"; |
Huang Shijie | 9110ede | 2013-06-21 10:19:11 +0800 | [diff] [blame] | 197 | spi-max-frequency = <20000000>; |
| 198 | reg = <0>; |
| 199 | }; |
| 200 | }; |
| 201 | |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 202 | &fec { |
| 203 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 204 | pinctrl-0 = <&pinctrl_enet>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 205 | phy-mode = "rgmii"; |
Fabio Estevam | 12de44f | 2017-06-04 14:31:15 -0300 | [diff] [blame] | 206 | phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 207 | status = "okay"; |
| 208 | }; |
| 209 | |
Fabio Estevam | ad70456 | 2014-04-22 10:04:59 -0300 | [diff] [blame] | 210 | &hdmi { |
Fabio Estevam | 12ce81e | 2017-09-20 10:56:09 -0300 | [diff] [blame] | 211 | pinctrl-names = "default"; |
| 212 | pinctrl-0 = <&pinctrl_hdmi_cec>; |
Fabio Estevam | ad70456 | 2014-04-22 10:04:59 -0300 | [diff] [blame] | 213 | ddc-i2c-bus = <&i2c2>; |
| 214 | status = "okay"; |
| 215 | }; |
| 216 | |
Nicolin Chen | 20426fe | 2013-06-13 19:51:01 +0800 | [diff] [blame] | 217 | &i2c1 { |
| 218 | clock-frequency = <100000>; |
| 219 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 220 | pinctrl-0 = <&pinctrl_i2c1>; |
Nicolin Chen | 20426fe | 2013-06-13 19:51:01 +0800 | [diff] [blame] | 221 | status = "okay"; |
| 222 | |
| 223 | codec: wm8962@1a { |
| 224 | compatible = "wlf,wm8962"; |
| 225 | reg = <0x1a>; |
Fabio Estevam | f029ce3 | 2014-10-20 11:02:13 -0200 | [diff] [blame] | 226 | clocks = <&clks IMX6QDL_CLK_CKO>; |
Nicolin Chen | 20426fe | 2013-06-13 19:51:01 +0800 | [diff] [blame] | 227 | DCVDD-supply = <®_audio>; |
| 228 | DBVDD-supply = <®_audio>; |
| 229 | AVDD-supply = <®_audio>; |
| 230 | CPVDD-supply = <®_audio>; |
| 231 | MICVDD-supply = <®_audio>; |
| 232 | PLLVDD-supply = <®_audio>; |
| 233 | SPKVDD1-supply = <®_audio>; |
| 234 | SPKVDD2-supply = <®_audio>; |
| 235 | gpio-cfg = < |
| 236 | 0x0000 /* 0:Default */ |
| 237 | 0x0000 /* 1:Default */ |
| 238 | 0x0013 /* 2:FN_DMICCLK */ |
| 239 | 0x0000 /* 3:Default */ |
| 240 | 0x8014 /* 4:FN_DMICCDAT */ |
| 241 | 0x0000 /* 5:Default */ |
| 242 | >; |
Steve Longerbeam | 545fb52 | 2017-06-12 11:24:00 -0700 | [diff] [blame] | 243 | }; |
| 244 | |
Anson Huang | 47853f1 | 2018-12-06 01:42:42 +0000 | [diff] [blame] | 245 | accelerometer@1c { |
| 246 | compatible = "fsl,mma8451"; |
| 247 | reg = <0x1c>; |
| 248 | pinctrl-names = "default"; |
| 249 | pinctrl-0 = <&pinctrl_i2c1_mma8451_int>; |
| 250 | interrupt-parent = <&gpio1>; |
| 251 | interrupts = <18 IRQ_TYPE_LEVEL_LOW>; |
Anson Huang | 14cc68e | 2019-02-07 15:18:38 +0000 | [diff] [blame] | 252 | vdd-supply = <®_sensors>; |
| 253 | vddio-supply = <®_sensors>; |
Anson Huang | 47853f1 | 2018-12-06 01:42:42 +0000 | [diff] [blame] | 254 | }; |
| 255 | |
Steve Longerbeam | 545fb52 | 2017-06-12 11:24:00 -0700 | [diff] [blame] | 256 | ov5642: camera@3c { |
| 257 | compatible = "ovti,ov5642"; |
| 258 | pinctrl-names = "default"; |
| 259 | pinctrl-0 = <&pinctrl_ov5642>; |
| 260 | clocks = <&clks IMX6QDL_CLK_CKO>; |
| 261 | clock-names = "xclk"; |
| 262 | reg = <0x3c>; |
| 263 | DOVDD-supply = <&vgen4_reg>; /* 1.8v */ |
| 264 | AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3 |
| 265 | rev B board is VGEN5 */ |
| 266 | DVDD-supply = <&vgen2_reg>; /* 1.5v*/ |
| 267 | powerdown-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; |
| 268 | reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; |
| 269 | status = "disabled"; |
| 270 | |
| 271 | port { |
| 272 | ov5642_to_ipu1_csi0_mux: endpoint { |
| 273 | remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; |
| 274 | bus-width = <8>; |
| 275 | hsync-active = <1>; |
| 276 | vsync-active = <1>; |
| 277 | }; |
| 278 | }; |
| 279 | }; |
Nicolin Chen | 20426fe | 2013-06-13 19:51:01 +0800 | [diff] [blame] | 280 | }; |
| 281 | |
Fabio Estevam | 4b444bb | 2013-12-24 01:04:49 -0200 | [diff] [blame] | 282 | &i2c2 { |
| 283 | clock-frequency = <100000>; |
| 284 | pinctrl-names = "default"; |
| 285 | pinctrl-0 = <&pinctrl_i2c2>; |
| 286 | status = "okay"; |
| 287 | |
Anson Huang | c9a8cf0 | 2018-12-05 01:14:25 +0000 | [diff] [blame] | 288 | touchscreen@4 { |
| 289 | compatible = "eeti,egalax_ts"; |
| 290 | reg = <0x04>; |
| 291 | pinctrl-names = "default"; |
| 292 | pinctrl-0 = <&pinctrl_i2c2_egalax_int>; |
| 293 | interrupt-parent = <&gpio6>; |
| 294 | interrupts = <8 IRQ_TYPE_EDGE_FALLING>; |
| 295 | wakeup-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>; |
| 296 | }; |
| 297 | |
Steve Longerbeam | 545fb52 | 2017-06-12 11:24:00 -0700 | [diff] [blame] | 298 | ov5640: camera@3c { |
| 299 | compatible = "ovti,ov5640"; |
| 300 | pinctrl-names = "default"; |
| 301 | pinctrl-0 = <&pinctrl_ov5640>; |
| 302 | reg = <0x3c>; |
| 303 | clocks = <&clks IMX6QDL_CLK_CKO>; |
| 304 | clock-names = "xclk"; |
| 305 | DOVDD-supply = <&vgen4_reg>; /* 1.8v */ |
| 306 | AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3 |
| 307 | rev B board is VGEN5 */ |
| 308 | DVDD-supply = <&vgen2_reg>; /* 1.5v*/ |
| 309 | powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; |
| 310 | reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; |
| 311 | |
| 312 | port { |
Steve Longerbeam | 545fb52 | 2017-06-12 11:24:00 -0700 | [diff] [blame] | 313 | ov5640_to_mipi_csi2: endpoint { |
| 314 | remote-endpoint = <&mipi_csi2_in>; |
| 315 | clock-lanes = <0>; |
| 316 | data-lanes = <1 2>; |
| 317 | }; |
| 318 | }; |
| 319 | }; |
| 320 | |
Rob Herring | 8dccafa | 2017-10-13 12:54:51 -0500 | [diff] [blame] | 321 | pmic: pfuze100@8 { |
Fabio Estevam | 4b444bb | 2013-12-24 01:04:49 -0200 | [diff] [blame] | 322 | compatible = "fsl,pfuze100"; |
| 323 | reg = <0x08>; |
| 324 | |
| 325 | regulators { |
| 326 | sw1a_reg: sw1ab { |
| 327 | regulator-min-microvolt = <300000>; |
| 328 | regulator-max-microvolt = <1875000>; |
| 329 | regulator-boot-on; |
| 330 | regulator-always-on; |
| 331 | regulator-ramp-delay = <6250>; |
| 332 | }; |
| 333 | |
| 334 | sw1c_reg: sw1c { |
| 335 | regulator-min-microvolt = <300000>; |
| 336 | regulator-max-microvolt = <1875000>; |
| 337 | regulator-boot-on; |
| 338 | regulator-always-on; |
| 339 | regulator-ramp-delay = <6250>; |
| 340 | }; |
| 341 | |
| 342 | sw2_reg: sw2 { |
| 343 | regulator-min-microvolt = <800000>; |
| 344 | regulator-max-microvolt = <3300000>; |
| 345 | regulator-boot-on; |
| 346 | regulator-always-on; |
Bai Ping | 5d62537 | 2016-02-02 18:01:35 +0800 | [diff] [blame] | 347 | regulator-ramp-delay = <6250>; |
Fabio Estevam | 4b444bb | 2013-12-24 01:04:49 -0200 | [diff] [blame] | 348 | }; |
| 349 | |
| 350 | sw3a_reg: sw3a { |
| 351 | regulator-min-microvolt = <400000>; |
| 352 | regulator-max-microvolt = <1975000>; |
| 353 | regulator-boot-on; |
| 354 | regulator-always-on; |
| 355 | }; |
| 356 | |
| 357 | sw3b_reg: sw3b { |
| 358 | regulator-min-microvolt = <400000>; |
| 359 | regulator-max-microvolt = <1975000>; |
| 360 | regulator-boot-on; |
| 361 | regulator-always-on; |
| 362 | }; |
| 363 | |
| 364 | sw4_reg: sw4 { |
| 365 | regulator-min-microvolt = <800000>; |
| 366 | regulator-max-microvolt = <3300000>; |
Anson Huang | 9896b67 | 2018-07-17 13:12:02 +0800 | [diff] [blame] | 367 | regulator-always-on; |
Fabio Estevam | 4b444bb | 2013-12-24 01:04:49 -0200 | [diff] [blame] | 368 | }; |
| 369 | |
| 370 | swbst_reg: swbst { |
| 371 | regulator-min-microvolt = <5000000>; |
| 372 | regulator-max-microvolt = <5150000>; |
| 373 | }; |
| 374 | |
| 375 | snvs_reg: vsnvs { |
| 376 | regulator-min-microvolt = <1000000>; |
| 377 | regulator-max-microvolt = <3000000>; |
| 378 | regulator-boot-on; |
| 379 | regulator-always-on; |
| 380 | }; |
| 381 | |
| 382 | vref_reg: vrefddr { |
| 383 | regulator-boot-on; |
| 384 | regulator-always-on; |
| 385 | }; |
| 386 | |
| 387 | vgen1_reg: vgen1 { |
| 388 | regulator-min-microvolt = <800000>; |
| 389 | regulator-max-microvolt = <1550000>; |
| 390 | }; |
| 391 | |
| 392 | vgen2_reg: vgen2 { |
| 393 | regulator-min-microvolt = <800000>; |
| 394 | regulator-max-microvolt = <1550000>; |
| 395 | }; |
| 396 | |
| 397 | vgen3_reg: vgen3 { |
| 398 | regulator-min-microvolt = <1800000>; |
| 399 | regulator-max-microvolt = <3300000>; |
| 400 | }; |
| 401 | |
| 402 | vgen4_reg: vgen4 { |
| 403 | regulator-min-microvolt = <1800000>; |
| 404 | regulator-max-microvolt = <3300000>; |
| 405 | regulator-always-on; |
| 406 | }; |
| 407 | |
| 408 | vgen5_reg: vgen5 { |
| 409 | regulator-min-microvolt = <1800000>; |
| 410 | regulator-max-microvolt = <3300000>; |
| 411 | regulator-always-on; |
| 412 | }; |
| 413 | |
| 414 | vgen6_reg: vgen6 { |
| 415 | regulator-min-microvolt = <1800000>; |
| 416 | regulator-max-microvolt = <3300000>; |
| 417 | regulator-always-on; |
| 418 | }; |
| 419 | }; |
| 420 | }; |
| 421 | }; |
| 422 | |
Fabio Estevam | 3850117 | 2013-07-24 17:20:03 -0300 | [diff] [blame] | 423 | &i2c3 { |
| 424 | clock-frequency = <100000>; |
| 425 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 426 | pinctrl-0 = <&pinctrl_i2c3>; |
Fabio Estevam | 3850117 | 2013-07-24 17:20:03 -0300 | [diff] [blame] | 427 | status = "okay"; |
| 428 | |
Rob Herring | 8dccafa | 2017-10-13 12:54:51 -0500 | [diff] [blame] | 429 | egalax_ts@4 { |
Fabio Estevam | 3850117 | 2013-07-24 17:20:03 -0300 | [diff] [blame] | 430 | compatible = "eeti,egalax_ts"; |
| 431 | reg = <0x04>; |
| 432 | interrupt-parent = <&gpio6>; |
| 433 | interrupts = <7 2>; |
| 434 | wakeup-gpios = <&gpio6 7 0>; |
| 435 | }; |
Anson Huang | ab43e98 | 2018-12-06 01:42:34 +0000 | [diff] [blame] | 436 | |
Anson Huang | 9e6a7c4 | 2018-12-06 01:42:38 +0000 | [diff] [blame] | 437 | magnetometer@e { |
| 438 | compatible = "fsl,mag3110"; |
| 439 | reg = <0x0e>; |
| 440 | pinctrl-names = "default"; |
| 441 | pinctrl-0 = <&pinctrl_i2c3_mag3110_int>; |
| 442 | interrupt-parent = <&gpio3>; |
| 443 | interrupts = <16 IRQ_TYPE_EDGE_RISING>; |
Anson Huang | 72af502 | 2019-02-07 15:18:34 +0000 | [diff] [blame] | 444 | vdd-supply = <®_sensors>; |
| 445 | vddio-supply = <®_sensors>; |
Anson Huang | 9e6a7c4 | 2018-12-06 01:42:38 +0000 | [diff] [blame] | 446 | }; |
| 447 | |
Anson Huang | ab43e98 | 2018-12-06 01:42:34 +0000 | [diff] [blame] | 448 | light-sensor@44 { |
| 449 | compatible = "isil,isl29023"; |
| 450 | reg = <0x44>; |
| 451 | pinctrl-names = "default"; |
| 452 | pinctrl-0 = <&pinctrl_i2c3_isl29023_int>; |
| 453 | interrupt-parent = <&gpio3>; |
| 454 | interrupts = <9 IRQ_TYPE_EDGE_FALLING>; |
Anson Huang | 1e79715 | 2019-02-07 15:18:30 +0000 | [diff] [blame] | 455 | vcc-supply = <®_sensors>; |
Anson Huang | ab43e98 | 2018-12-06 01:42:34 +0000 | [diff] [blame] | 456 | }; |
Fabio Estevam | 3850117 | 2013-07-24 17:20:03 -0300 | [diff] [blame] | 457 | }; |
| 458 | |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 459 | &iomuxc { |
| 460 | pinctrl-names = "default"; |
| 461 | pinctrl-0 = <&pinctrl_hog>; |
| 462 | |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 463 | imx6qdl-sabresd { |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 464 | pinctrl_hog: hoggrp { |
| 465 | fsl,pins = < |
Fabio Estevam | 9a060c1 | 2014-09-05 09:46:10 -0300 | [diff] [blame] | 466 | MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 |
| 467 | MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 |
| 468 | MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 |
| 469 | MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 470 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 |
Fabio Estevam | 9a060c1 | 2014-09-05 09:46:10 -0300 | [diff] [blame] | 471 | MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0 |
| 472 | MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 |
| 473 | MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 |
| 474 | MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 475 | >; |
| 476 | }; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 477 | |
| 478 | pinctrl_audmux: audmuxgrp { |
| 479 | fsl,pins = < |
Nicolin Chen | 77112dd | 2014-02-08 10:14:28 +0800 | [diff] [blame] | 480 | MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 |
| 481 | MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 |
| 482 | MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 |
| 483 | MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 484 | >; |
| 485 | }; |
| 486 | |
| 487 | pinctrl_ecspi1: ecspi1grp { |
| 488 | fsl,pins = < |
| 489 | MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1 |
| 490 | MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1 |
| 491 | MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1 |
Fabio Estevam | f3c7238 | 2014-05-14 16:53:55 -0300 | [diff] [blame] | 492 | MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0 |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 493 | >; |
| 494 | }; |
| 495 | |
| 496 | pinctrl_enet: enetgrp { |
| 497 | fsl,pins = < |
| 498 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 |
| 499 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 500 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 |
| 501 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 |
| 502 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 |
| 503 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 |
| 504 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 |
| 505 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 506 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 |
Uwe Kleine-König | c007b3a | 2016-07-08 23:22:54 +0200 | [diff] [blame] | 507 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 |
| 508 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 |
| 509 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 |
| 510 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 |
| 511 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 |
| 512 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 513 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 |
| 514 | >; |
| 515 | }; |
| 516 | |
Anson Huang | 8e4422a | 2013-12-19 16:07:24 -0500 | [diff] [blame] | 517 | pinctrl_gpio_keys: gpio_keysgrp { |
| 518 | fsl,pins = < |
Fabio Estevam | 9a060c1 | 2014-09-05 09:46:10 -0300 | [diff] [blame] | 519 | MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 |
| 520 | MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 |
| 521 | MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 |
Anson Huang | 8e4422a | 2013-12-19 16:07:24 -0500 | [diff] [blame] | 522 | >; |
| 523 | }; |
| 524 | |
Fabio Estevam | 12ce81e | 2017-09-20 10:56:09 -0300 | [diff] [blame] | 525 | pinctrl_hdmi_cec: hdmicecgrp { |
| 526 | fsl,pins = < |
| 527 | MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 |
| 528 | >; |
| 529 | }; |
| 530 | |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 531 | pinctrl_i2c1: i2c1grp { |
| 532 | fsl,pins = < |
| 533 | MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 |
| 534 | MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 |
| 535 | >; |
| 536 | }; |
| 537 | |
Anson Huang | 47853f1 | 2018-12-06 01:42:42 +0000 | [diff] [blame] | 538 | pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp { |
| 539 | fsl,pins = < |
| 540 | MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0xb0b1 |
| 541 | >; |
| 542 | }; |
| 543 | |
Fabio Estevam | 4b444bb | 2013-12-24 01:04:49 -0200 | [diff] [blame] | 544 | pinctrl_i2c2: i2c2grp { |
| 545 | fsl,pins = < |
| 546 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| 547 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| 548 | >; |
| 549 | }; |
| 550 | |
Anson Huang | c9a8cf0 | 2018-12-05 01:14:25 +0000 | [diff] [blame] | 551 | pinctrl_i2c2_egalax_int: i2c2egalaxintgrp { |
| 552 | fsl,pins = < |
| 553 | MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0 |
| 554 | >; |
| 555 | }; |
| 556 | |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 557 | pinctrl_i2c3: i2c3grp { |
| 558 | fsl,pins = < |
| 559 | MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 |
| 560 | MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 |
| 561 | >; |
| 562 | }; |
| 563 | |
Anson Huang | ab43e98 | 2018-12-06 01:42:34 +0000 | [diff] [blame] | 564 | pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp { |
| 565 | fsl,pins = < |
| 566 | MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0xb0b1 |
| 567 | >; |
| 568 | }; |
| 569 | |
Anson Huang | 9e6a7c4 | 2018-12-06 01:42:38 +0000 | [diff] [blame] | 570 | pinctrl_i2c3_mag3110_int: i2c3mag3110intgrp { |
| 571 | fsl,pins = < |
| 572 | MX6QDL_PAD_EIM_D16__GPIO3_IO16 0xb0b1 |
| 573 | >; |
| 574 | }; |
| 575 | |
Steve Longerbeam | 545fb52 | 2017-06-12 11:24:00 -0700 | [diff] [blame] | 576 | pinctrl_ipu1_csi0: ipu1csi0grp { |
| 577 | fsl,pins = < |
| 578 | MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 |
| 579 | MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 |
| 580 | MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 |
| 581 | MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 |
| 582 | MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 |
| 583 | MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 |
| 584 | MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 |
| 585 | MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 |
| 586 | MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 |
| 587 | MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 |
| 588 | MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 |
| 589 | >; |
| 590 | }; |
| 591 | |
| 592 | pinctrl_ov5640: ov5640grp { |
| 593 | fsl,pins = < |
| 594 | MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0 |
| 595 | MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x1b0b0 |
| 596 | >; |
| 597 | }; |
| 598 | |
| 599 | pinctrl_ov5642: ov5642grp { |
| 600 | fsl,pins = < |
| 601 | MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 |
| 602 | MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 |
| 603 | >; |
| 604 | }; |
| 605 | |
Marek Vasut | 9d4ebb3 | 2014-04-21 22:56:49 +0200 | [diff] [blame] | 606 | pinctrl_pcie: pciegrp { |
| 607 | fsl,pins = < |
Fabio Estevam | 9a060c1 | 2014-09-05 09:46:10 -0300 | [diff] [blame] | 608 | MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 |
Marek Vasut | 9d4ebb3 | 2014-04-21 22:56:49 +0200 | [diff] [blame] | 609 | >; |
| 610 | }; |
| 611 | |
Lucas Stach | 78827ec | 2014-07-23 19:29:11 +0200 | [diff] [blame] | 612 | pinctrl_pcie_reg: pciereggrp { |
| 613 | fsl,pins = < |
| 614 | MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 |
| 615 | >; |
| 616 | }; |
| 617 | |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 618 | pinctrl_pwm1: pwm1grp { |
| 619 | fsl,pins = < |
| 620 | MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 |
| 621 | >; |
| 622 | }; |
| 623 | |
Anson Huang | ab43e98 | 2018-12-06 01:42:34 +0000 | [diff] [blame] | 624 | pinctrl_sensors_reg: sensorsreggrp { |
| 625 | fsl,pins = < |
| 626 | MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0 |
| 627 | >; |
| 628 | }; |
| 629 | |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 630 | pinctrl_uart1: uart1grp { |
| 631 | fsl,pins = < |
| 632 | MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 |
| 633 | MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 |
| 634 | >; |
| 635 | }; |
| 636 | |
| 637 | pinctrl_usbotg: usbotggrp { |
| 638 | fsl,pins = < |
| 639 | MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 |
| 640 | >; |
| 641 | }; |
| 642 | |
| 643 | pinctrl_usdhc2: usdhc2grp { |
| 644 | fsl,pins = < |
| 645 | MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 |
| 646 | MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 |
| 647 | MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 |
| 648 | MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 |
| 649 | MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 |
| 650 | MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 |
| 651 | MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 |
| 652 | MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 |
| 653 | MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 |
| 654 | MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 |
| 655 | >; |
| 656 | }; |
| 657 | |
| 658 | pinctrl_usdhc3: usdhc3grp { |
| 659 | fsl,pins = < |
| 660 | MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 |
| 661 | MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 |
| 662 | MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 |
| 663 | MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 |
| 664 | MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 |
| 665 | MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 |
| 666 | MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 |
| 667 | MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 |
| 668 | MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 |
| 669 | MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 |
| 670 | >; |
| 671 | }; |
Fabio Estevam | e02ab39a | 2014-05-08 11:10:56 -0300 | [diff] [blame] | 672 | |
| 673 | pinctrl_usdhc4: usdhc4grp { |
| 674 | fsl,pins = < |
| 675 | MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 |
| 676 | MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 |
| 677 | MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 |
| 678 | MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 |
| 679 | MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 |
| 680 | MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 |
| 681 | MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 |
| 682 | MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 |
| 683 | MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 |
| 684 | MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 |
| 685 | >; |
| 686 | }; |
Fabio Estevam | 49607ff | 2016-06-13 22:07:56 -0300 | [diff] [blame] | 687 | |
| 688 | pinctrl_wdog: wdoggrp { |
| 689 | fsl,pins = < |
| 690 | MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0 |
| 691 | >; |
| 692 | }; |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 693 | }; |
Vincent Stehlé | 702bfbe | 2014-03-05 19:58:39 +0100 | [diff] [blame] | 694 | |
| 695 | gpio_leds { |
| 696 | pinctrl_gpio_leds: gpioledsgrp { |
| 697 | fsl,pins = < |
Fabio Estevam | 9a060c1 | 2014-09-05 09:46:10 -0300 | [diff] [blame] | 698 | MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 |
Vincent Stehlé | 702bfbe | 2014-03-05 19:58:39 +0100 | [diff] [blame] | 699 | >; |
| 700 | }; |
| 701 | }; |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 702 | }; |
| 703 | |
Shawn Guo | b7fb710 | 2013-07-16 22:15:18 +0800 | [diff] [blame] | 704 | &ldb { |
| 705 | status = "okay"; |
| 706 | |
| 707 | lvds-channel@1 { |
| 708 | fsl,data-mapping = "spwg"; |
| 709 | fsl,data-width = <18>; |
| 710 | status = "okay"; |
| 711 | |
Fabio Estevam | e088494 | 2016-03-28 14:10:48 -0300 | [diff] [blame] | 712 | port@4 { |
| 713 | reg = <4>; |
| 714 | |
| 715 | lvds0_out: endpoint { |
| 716 | remote-endpoint = <&panel_in>; |
Shawn Guo | b7fb710 | 2013-07-16 22:15:18 +0800 | [diff] [blame] | 717 | }; |
| 718 | }; |
| 719 | }; |
| 720 | }; |
| 721 | |
Marek Vasut | 9d4ebb3 | 2014-04-21 22:56:49 +0200 | [diff] [blame] | 722 | &pcie { |
| 723 | pinctrl-names = "default"; |
| 724 | pinctrl-0 = <&pinctrl_pcie>; |
Fabio Estevam | f1472f8 | 2016-06-05 23:00:47 -0300 | [diff] [blame] | 725 | reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; |
Fabio Estevam | 46c7ec9 | 2017-09-20 10:56:08 -0300 | [diff] [blame] | 726 | vpcie-supply = <®_pcie>; |
Marek Vasut | 9d4ebb3 | 2014-04-21 22:56:49 +0200 | [diff] [blame] | 727 | status = "okay"; |
| 728 | }; |
| 729 | |
Rogerio Pimentel | 2f35c0c | 2013-10-11 16:48:16 -0300 | [diff] [blame] | 730 | &pwm1 { |
| 731 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 732 | pinctrl-0 = <&pinctrl_pwm1>; |
Rogerio Pimentel | 2f35c0c | 2013-10-11 16:48:16 -0300 | [diff] [blame] | 733 | status = "okay"; |
| 734 | }; |
| 735 | |
Leonard Crestez | c23568db | 2017-04-04 20:04:13 +0300 | [diff] [blame] | 736 | ®_arm { |
| 737 | vin-supply = <&sw1a_reg>; |
| 738 | }; |
| 739 | |
| 740 | ®_pu { |
| 741 | vin-supply = <&sw1c_reg>; |
| 742 | }; |
| 743 | |
| 744 | ®_soc { |
| 745 | vin-supply = <&sw1c_reg>; |
| 746 | }; |
| 747 | |
Robin Gong | 422b067 | 2014-11-12 16:20:37 +0800 | [diff] [blame] | 748 | &snvs_poweroff { |
| 749 | status = "okay"; |
| 750 | }; |
| 751 | |
Nicolin Chen | 4882870 | 2013-06-14 13:19:57 +0800 | [diff] [blame] | 752 | &ssi2 { |
Nicolin Chen | 4882870 | 2013-06-14 13:19:57 +0800 | [diff] [blame] | 753 | status = "okay"; |
| 754 | }; |
| 755 | |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 756 | &uart1 { |
| 757 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 758 | pinctrl-0 = <&pinctrl_uart1>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 759 | status = "okay"; |
| 760 | }; |
| 761 | |
| 762 | &usbh1 { |
Peter Chen | 015fa46 | 2013-08-12 16:46:24 +0800 | [diff] [blame] | 763 | vbus-supply = <®_usb_h1_vbus>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 764 | status = "okay"; |
| 765 | }; |
| 766 | |
| 767 | &usbotg { |
| 768 | vbus-supply = <®_usb_otg_vbus>; |
| 769 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 770 | pinctrl-0 = <&pinctrl_usbotg>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 771 | disable-over-current; |
| 772 | status = "okay"; |
| 773 | }; |
| 774 | |
| 775 | &usdhc2 { |
| 776 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 777 | pinctrl-0 = <&pinctrl_usdhc2>; |
Fabio Estevam | e367817 | 2013-09-17 13:46:23 -0300 | [diff] [blame] | 778 | bus-width = <8>; |
Dong Aisheng | 89c1a8cf | 2015-07-22 20:53:02 +0800 | [diff] [blame] | 779 | cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; |
| 780 | wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 781 | status = "okay"; |
| 782 | }; |
| 783 | |
| 784 | &usdhc3 { |
| 785 | pinctrl-names = "default"; |
Shawn Guo | 817c27a | 2013-10-23 15:36:09 +0800 | [diff] [blame] | 786 | pinctrl-0 = <&pinctrl_usdhc3>; |
Fabio Estevam | e367817 | 2013-09-17 13:46:23 -0300 | [diff] [blame] | 787 | bus-width = <8>; |
Dong Aisheng | 89c1a8cf | 2015-07-22 20:53:02 +0800 | [diff] [blame] | 788 | cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; |
| 789 | wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; |
Shawn Guo | 082d33d | 2013-04-02 13:15:16 +0800 | [diff] [blame] | 790 | status = "okay"; |
| 791 | }; |
Fabio Estevam | e02ab39a | 2014-05-08 11:10:56 -0300 | [diff] [blame] | 792 | |
| 793 | &usdhc4 { |
| 794 | pinctrl-names = "default"; |
| 795 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 796 | bus-width = <8>; |
| 797 | non-removable; |
| 798 | no-1-8-v; |
| 799 | status = "okay"; |
| 800 | }; |
Fabio Estevam | 49607ff | 2016-06-13 22:07:56 -0300 | [diff] [blame] | 801 | |
| 802 | &wdog1 { |
| 803 | status = "disabled"; |
| 804 | }; |
| 805 | |
| 806 | &wdog2 { |
| 807 | pinctrl-names = "default"; |
| 808 | pinctrl-0 = <&pinctrl_wdog>; |
| 809 | fsl,ext-reset-output; |
| 810 | status = "okay"; |
| 811 | }; |