blob: e0f4613918ad6062c3a9891a1112b4f47e7ed0eb [file] [log] [blame]
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +02001/*
2 * Copyright 2012 Red Hat Inc.
3 * Parts based on xf86-video-ast
4 * Copyright (c) 2005 ASPEED Technology Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26/*
27 * Authors: Dave Airlie <airlied@redhat.com>
28 */
29
30#include <drm/drm_gem_vram_helper.h>
Thomas Zimmermann3e9d7872020-07-02 13:50:25 +020031#include <drm/drm_managed.h>
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020032
33#include "ast_drv.h"
34
Thomas Zimmermann3e9d7872020-07-02 13:50:25 +020035static void ast_cursor_fini(struct ast_private *ast)
36{
37 size_t i;
38 struct drm_gem_vram_object *gbo;
39
40 for (i = 0; i < ARRAY_SIZE(ast->cursor.gbo); ++i) {
41 gbo = ast->cursor.gbo[i];
42 drm_gem_vram_vunmap(gbo, ast->cursor.vaddr[i]);
43 drm_gem_vram_unpin(gbo);
44 drm_gem_vram_put(gbo);
45 }
46}
47
48static void ast_cursor_release(struct drm_device *dev, void *ptr)
49{
Thomas Zimmermann365c0e72020-07-30 15:52:01 +020050 struct ast_private *ast = to_ast_private(dev);
Thomas Zimmermann3e9d7872020-07-02 13:50:25 +020051
52 ast_cursor_fini(ast);
53}
54
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020055/*
56 * Allocate cursor BOs and pins them at the end of VRAM.
57 */
Thomas Zimmermannbeb23552020-07-02 13:50:17 +020058int ast_cursor_init(struct ast_private *ast)
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020059{
Thomas Zimmermanne0f5a732020-07-30 15:52:03 +020060 struct drm_device *dev = &ast->base;
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020061 size_t size, i;
62 struct drm_gem_vram_object *gbo;
Thomas Zimmermann0d384ee2020-07-02 13:50:24 +020063 void __iomem *vaddr;
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020064 int ret;
65
66 size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
67
68 for (i = 0; i < ARRAY_SIZE(ast->cursor.gbo); ++i) {
69 gbo = drm_gem_vram_create(dev, size, 0);
70 if (IS_ERR(gbo)) {
71 ret = PTR_ERR(gbo);
72 goto err_drm_gem_vram_put;
73 }
74 ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM |
75 DRM_GEM_VRAM_PL_FLAG_TOPDOWN);
76 if (ret) {
77 drm_gem_vram_put(gbo);
78 goto err_drm_gem_vram_put;
79 }
Thomas Zimmermann0d384ee2020-07-02 13:50:24 +020080 vaddr = drm_gem_vram_vmap(gbo);
81 if (IS_ERR(vaddr)) {
82 ret = PTR_ERR(vaddr);
83 drm_gem_vram_unpin(gbo);
84 drm_gem_vram_put(gbo);
85 goto err_drm_gem_vram_put;
86 }
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020087
88 ast->cursor.gbo[i] = gbo;
Thomas Zimmermann0d384ee2020-07-02 13:50:24 +020089 ast->cursor.vaddr[i] = vaddr;
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020090 }
91
Thomas Zimmermann3e9d7872020-07-02 13:50:25 +020092 return drmm_add_action_or_reset(dev, ast_cursor_release, NULL);
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020093
94err_drm_gem_vram_put:
95 while (i) {
96 --i;
97 gbo = ast->cursor.gbo[i];
Thomas Zimmermann0d384ee2020-07-02 13:50:24 +020098 drm_gem_vram_vunmap(gbo, ast->cursor.vaddr[i]);
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +020099 drm_gem_vram_unpin(gbo);
100 drm_gem_vram_put(gbo);
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200101 }
102 return ret;
103}
104
Thomas Zimmermann932a62aa2020-07-02 13:50:19 +0200105static void update_cursor_image(u8 __iomem *dst, const u8 *src, int width, int height)
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200106{
107 union {
108 u32 ul;
109 u8 b[4];
110 } srcdata32[2], data32;
111 union {
112 u16 us;
113 u8 b[2];
114 } data16;
115 u32 csum = 0;
116 s32 alpha_dst_delta, last_alpha_dst_delta;
Thomas Zimmermann932a62aa2020-07-02 13:50:19 +0200117 u8 __iomem *dstxor;
118 const u8 *srcxor;
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200119 int i, j;
120 u32 per_pixel_copy, two_pixel_copy;
121
122 alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
123 last_alpha_dst_delta = alpha_dst_delta - (width << 1);
124
125 srcxor = src;
126 dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
127 per_pixel_copy = width & 1;
128 two_pixel_copy = width >> 1;
129
130 for (j = 0; j < height; j++) {
131 for (i = 0; i < two_pixel_copy; i++) {
132 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
133 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
134 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
135 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
136 data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
137 data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
138
139 writel(data32.ul, dstxor);
140 csum += data32.ul;
141
142 dstxor += 4;
143 srcxor += 8;
144
145 }
146
147 for (i = 0; i < per_pixel_copy; i++) {
148 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
149 data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
150 data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
151 writew(data16.us, dstxor);
152 csum += (u32)data16.us;
153
154 dstxor += 2;
155 srcxor += 4;
156 }
157 dstxor += last_alpha_dst_delta;
158 }
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200159
160 /* write checksum + signature */
161 dst += AST_HWC_SIZE;
162 writel(csum, dst);
163 writel(width, dst + AST_HWC_SIGNATURE_SizeX);
164 writel(height, dst + AST_HWC_SIGNATURE_SizeY);
165 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
166 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200167}
168
Thomas Zimmermanndd004b92020-07-02 13:50:18 +0200169int ast_cursor_blit(struct ast_private *ast, struct drm_framebuffer *fb)
170{
Thomas Zimmermanne0f5a732020-07-30 15:52:03 +0200171 struct drm_device *dev = &ast->base;
Thomas Zimmermanndd004b92020-07-02 13:50:18 +0200172 struct drm_gem_vram_object *gbo;
173 int ret;
174 void *src;
Thomas Zimmermann0d384ee2020-07-02 13:50:24 +0200175 void __iomem *dst;
Thomas Zimmermanndd004b92020-07-02 13:50:18 +0200176
177 if (drm_WARN_ON_ONCE(dev, fb->width > AST_MAX_HWC_WIDTH) ||
178 drm_WARN_ON_ONCE(dev, fb->height > AST_MAX_HWC_HEIGHT))
179 return -EINVAL;
180
181 gbo = drm_gem_vram_of_gem(fb->obj[0]);
182
183 ret = drm_gem_vram_pin(gbo, 0);
184 if (ret)
185 return ret;
186 src = drm_gem_vram_vmap(gbo);
187 if (IS_ERR(src)) {
188 ret = PTR_ERR(src);
189 goto err_drm_gem_vram_unpin;
190 }
191
Thomas Zimmermann0d384ee2020-07-02 13:50:24 +0200192 dst = ast->cursor.vaddr[ast->cursor.next_index];
Thomas Zimmermanndd004b92020-07-02 13:50:18 +0200193
Thomas Zimmermann932a62aa2020-07-02 13:50:19 +0200194 /* do data transfer to cursor BO */
195 update_cursor_image(dst, src, fb->width, fb->height);
Thomas Zimmermanndd004b92020-07-02 13:50:18 +0200196
Thomas Zimmermanndd004b92020-07-02 13:50:18 +0200197 drm_gem_vram_vunmap(gbo, src);
198 drm_gem_vram_unpin(gbo);
199
200 return 0;
201
Thomas Zimmermanndd004b92020-07-02 13:50:18 +0200202err_drm_gem_vram_unpin:
203 drm_gem_vram_unpin(gbo);
204 return ret;
205}
206
Thomas Zimmermann75d9d8e2020-07-02 13:50:20 +0200207static void ast_cursor_set_base(struct ast_private *ast, u64 address)
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200208{
209 u8 addr0 = (address >> 3) & 0xff;
210 u8 addr1 = (address >> 11) & 0xff;
211 u8 addr2 = (address >> 19) & 0xff;
212
213 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0);
214 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1);
215 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2);
216}
217
Thomas Zimmermann75d9d8e2020-07-02 13:50:20 +0200218void ast_cursor_page_flip(struct ast_private *ast)
219{
Thomas Zimmermanne0f5a732020-07-30 15:52:03 +0200220 struct drm_device *dev = &ast->base;
Thomas Zimmermann75d9d8e2020-07-02 13:50:20 +0200221 struct drm_gem_vram_object *gbo;
222 s64 off;
223
224 gbo = ast->cursor.gbo[ast->cursor.next_index];
225
226 off = drm_gem_vram_offset(gbo);
227 if (drm_WARN_ON_ONCE(dev, off < 0))
228 return; /* Bug: we didn't pin the cursor HW BO to VRAM. */
229
230 ast_cursor_set_base(ast, off);
231
232 ++ast->cursor.next_index;
233 ast->cursor.next_index %= ARRAY_SIZE(ast->cursor.gbo);
234}
235
Thomas Zimmermann81039ad2020-07-02 13:50:21 +0200236static void ast_cursor_set_location(struct ast_private *ast, u16 x, u16 y,
237 u8 x_offset, u8 y_offset)
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200238{
Thomas Zimmermann81039ad2020-07-02 13:50:21 +0200239 u8 x0 = (x & 0x00ff);
240 u8 x1 = (x & 0x0f00) >> 8;
241 u8 y0 = (y & 0x00ff);
242 u8 y1 = (y & 0x0700) >> 8;
243
244 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
245 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
246 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, x0);
247 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, x1);
248 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, y0);
249 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, y1);
250}
251
Thomas Zimmermann0d384ee2020-07-02 13:50:24 +0200252void ast_cursor_show(struct ast_private *ast, int x, int y,
253 unsigned int offset_x, unsigned int offset_y)
Thomas Zimmermann81039ad2020-07-02 13:50:21 +0200254{
Thomas Zimmermann81039ad2020-07-02 13:50:21 +0200255 u8 x_offset, y_offset;
Randy Dunlap9c6b8762020-08-18 13:28:11 -0700256 u8 __iomem *dst;
257 u8 __iomem *sig;
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200258 u8 jreg;
259
Thomas Zimmermann0d384ee2020-07-02 13:50:24 +0200260 dst = ast->cursor.vaddr[ast->cursor.next_index];
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200261
262 sig = dst + AST_HWC_SIZE;
263 writel(x, sig + AST_HWC_SIGNATURE_X);
264 writel(y, sig + AST_HWC_SIGNATURE_Y);
265
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200266 if (x < 0) {
Thomas Zimmermann81039ad2020-07-02 13:50:21 +0200267 x_offset = (-x) + offset_x;
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200268 x = 0;
Thomas Zimmermann81039ad2020-07-02 13:50:21 +0200269 } else {
270 x_offset = offset_x;
271 }
272 if (y < 0) {
273 y_offset = (-y) + offset_y;
274 y = 0;
275 } else {
276 y_offset = offset_y;
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200277 }
278
Thomas Zimmermann81039ad2020-07-02 13:50:21 +0200279 ast_cursor_set_location(ast, x, y, x_offset, y_offset);
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200280
281 /* dummy write to fire HWC */
282 jreg = 0x02 |
283 0x01; /* enable ARGB4444 cursor */
284 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
Thomas Zimmermann2ccebf52020-07-02 13:50:16 +0200285}
Thomas Zimmermannc91eadd2020-07-02 13:50:23 +0200286
287void ast_cursor_hide(struct ast_private *ast)
288{
289 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);
290}