Thomas Gleixner | 74ba920 | 2019-05-20 09:19:02 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Malcolm Priestley | ae8dc8ee | 2012-03-07 18:11:03 -0300 | [diff] [blame] | 2 | /* |
| 3 | Driver for M88RS2000 demodulator |
| 4 | |
Malcolm Priestley | ae8dc8ee | 2012-03-07 18:11:03 -0300 | [diff] [blame] | 5 | |
| 6 | */ |
| 7 | |
| 8 | #ifndef M88RS2000_H |
| 9 | #define M88RS2000_H |
| 10 | |
| 11 | #include <linux/dvb/frontend.h> |
Mauro Carvalho Chehab | fada193 | 2017-12-28 13:03:51 -0500 | [diff] [blame] | 12 | #include <media/dvb_frontend.h> |
Malcolm Priestley | ae8dc8ee | 2012-03-07 18:11:03 -0300 | [diff] [blame] | 13 | |
| 14 | struct m88rs2000_config { |
| 15 | /* Demodulator i2c address */ |
| 16 | u8 demod_addr; |
Malcolm Priestley | ae8dc8ee | 2012-03-07 18:11:03 -0300 | [diff] [blame] | 17 | |
| 18 | u8 *inittab; |
| 19 | |
| 20 | /* minimum delay before retuning */ |
| 21 | int min_delay_ms; |
| 22 | |
| 23 | int (*set_ts_params)(struct dvb_frontend *, int); |
| 24 | }; |
| 25 | |
| 26 | enum { |
| 27 | CALL_IS_SET_FRONTEND = 0x0, |
| 28 | CALL_IS_READ, |
| 29 | }; |
| 30 | |
Arnd Bergmann | 9b17452 | 2015-02-18 14:12:42 -0300 | [diff] [blame] | 31 | #if IS_REACHABLE(CONFIG_DVB_M88RS2000) |
Malcolm Priestley | ae8dc8ee | 2012-03-07 18:11:03 -0300 | [diff] [blame] | 32 | extern struct dvb_frontend *m88rs2000_attach( |
| 33 | const struct m88rs2000_config *config, struct i2c_adapter *i2c); |
| 34 | #else |
| 35 | static inline struct dvb_frontend *m88rs2000_attach( |
| 36 | const struct m88rs2000_config *config, struct i2c_adapter *i2c) |
| 37 | { |
| 38 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); |
| 39 | return NULL; |
| 40 | } |
| 41 | #endif /* CONFIG_DVB_M88RS2000 */ |
| 42 | |
Malcolm Priestley | 06af15d | 2013-12-24 13:17:12 -0300 | [diff] [blame] | 43 | #define RS2000_FE_CRYSTAL_KHZ 27000 |
| 44 | |
Malcolm Priestley | ae8dc8ee | 2012-03-07 18:11:03 -0300 | [diff] [blame] | 45 | enum { |
| 46 | DEMOD_WRITE = 0x1, |
Malcolm Priestley | ae8dc8ee | 2012-03-07 18:11:03 -0300 | [diff] [blame] | 47 | WRITE_DELAY = 0x10, |
| 48 | }; |
| 49 | #endif /* M88RS2000_H */ |