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Ralf Baechlee7c47822007-07-10 17:33:01 +01001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
Ralf Baechle566a3b92008-12-01 08:16:08 +00006 * Copyright (C) 2006, 07 MIPS Technologies, Inc.
Ralf Baechlee7c47822007-07-10 17:33:01 +01007 * written by Ralf Baechle (ralf@linux-mips.org)
Ralf Baechle566a3b92008-12-01 08:16:08 +00008 * written by Ralf Baechle <ralf@linux-mips.org>
Ralf Baechlee7c47822007-07-10 17:33:01 +01009 *
Tiejun Chen192cc7f2008-11-25 16:33:20 +080010 * Copyright (C) 2008 Wind River Systems, Inc.
11 * updated by Tiejun Chen <tiejun.chen@windriver.com>
12 *
13 * 1. Probe driver for the Malta's UART ports:
Ralf Baechlee7c47822007-07-10 17:33:01 +010014 *
15 * o 2 ports in the SMC SuperIO
16 * o 1 port in the CBUS UART, a discrete 16550 which normally is only used
17 * for bringups.
18 *
19 * We don't use 8250_platform.c on Malta as it would result in the CBUS
20 * UART becoming ttyS0.
Tiejun Chen192cc7f2008-11-25 16:33:20 +080021 *
22 * 2. Register RTC-CMOS platform device on Malta.
Ralf Baechlee7c47822007-07-10 17:33:01 +010023 */
Ralf Baechlee7c47822007-07-10 17:33:01 +010024#include <linux/init.h>
25#include <linux/serial_8250.h>
David Howellsca4d3e672010-10-07 14:08:54 +010026#include <linux/irq.h>
Tiejun Chen192cc7f2008-11-25 16:33:20 +080027#include <linux/platform_device.h>
Ralf Baechle225ae5f2012-11-13 10:41:50 +010028#include <asm/mips-boards/maltaint.h>
Ralf Baechlee7c47822007-07-10 17:33:01 +010029
30#define SMC_PORT(base, int) \
31{ \
32 .iobase = base, \
33 .irq = int, \
34 .uartclk = 1843200, \
35 .iotype = UPIO_PORT, \
Maciej W. Rozycki78884782021-06-10 20:38:48 +020036 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | \
37 UPF_MAGIC_MULTIPLIER, \
Ralf Baechlee7c47822007-07-10 17:33:01 +010038 .regshift = 0, \
39}
40
41#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
42
43static struct plat_serial8250_port uart8250_data[] = {
44 SMC_PORT(0x3F8, 4),
45 SMC_PORT(0x2F8, 3),
Leonid Yegoshinf6ba0612013-10-14 09:49:25 +010046#ifndef CONFIG_MIPS_CMP
Ralf Baechlee7c47822007-07-10 17:33:01 +010047 {
48 .mapbase = 0x1f000900, /* The CBUS UART */
Ralf Baechle225ae5f2012-11-13 10:41:50 +010049 .irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
Ralf Baechlee7c47822007-07-10 17:33:01 +010050 .uartclk = 3686400, /* Twice the usual clk! */
Maciej W. Rozycki9a936d62021-06-26 06:11:13 +020051 .iotype = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) ?
52 UPIO_MEM32BE : UPIO_MEM32,
Ralf Baechlee7c47822007-07-10 17:33:01 +010053 .flags = CBUS_UART_FLAGS,
54 .regshift = 3,
55 },
Leonid Yegoshinf6ba0612013-10-14 09:49:25 +010056#endif
Ralf Baechlee7c47822007-07-10 17:33:01 +010057 { },
58};
59
Tiejun Chen192cc7f2008-11-25 16:33:20 +080060static struct platform_device malta_uart8250_device = {
Ralf Baechlee7c47822007-07-10 17:33:01 +010061 .name = "serial8250",
Ralf Baechle566a3b92008-12-01 08:16:08 +000062 .id = PLAT8250_DEV_PLATFORM,
Ralf Baechlee7c47822007-07-10 17:33:01 +010063 .dev = {
64 .platform_data = uart8250_data,
65 },
66};
67
Tiejun Chen192cc7f2008-11-25 16:33:20 +080068static struct platform_device *malta_devices[] __initdata = {
69 &malta_uart8250_device,
Tiejun Chen192cc7f2008-11-25 16:33:20 +080070};
71
72static int __init malta_add_devices(void)
Ralf Baechlee7c47822007-07-10 17:33:01 +010073{
Masahiro Yamadadb194622016-09-15 00:31:01 +090074 return platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
Ralf Baechlee7c47822007-07-10 17:33:01 +010075}
76
Tiejun Chen192cc7f2008-11-25 16:33:20 +080077device_initcall(malta_add_devices);