Dominik Brodowski | 7fe2f63 | 2011-03-30 16:30:11 +0200 | [diff] [blame] | 1 | .TH CPUPOWER\-SET "1" "22/02/2011" "" "cpupower Manual" |
| 2 | .SH NAME |
| 3 | cpupower\-set \- Set processor power related kernel or hardware configurations |
| 4 | .SH SYNOPSIS |
| 5 | .ft B |
| 6 | .B cpupower set [ \-b VAL ] [ \-s VAL ] [ \-m VAL ] |
| 7 | |
| 8 | |
| 9 | .SH DESCRIPTION |
| 10 | \fBcpupower set \fP sets kernel configurations or directly accesses hardware |
| 11 | registers affecting processor power saving policies. |
| 12 | |
| 13 | Some options are platform wide, some affect single cores. By default values |
| 14 | are applied on all cores. How to modify single core configurations is |
| 15 | described in the cpupower(1) manpage in the \-\-cpu option section. Whether an |
| 16 | option affects the whole system or can be applied to individual cores is |
| 17 | described in the Options sections. |
| 18 | |
| 19 | Use \fBcpupower info \fP to read out current settings and whether they are |
| 20 | supported on the system at all. |
| 21 | |
| 22 | .SH Options |
| 23 | .PP |
| 24 | \-\-perf-bias, \-b |
| 25 | .RS 4 |
| 26 | Sets a register on supported Intel processore which allows software to convey |
| 27 | its policy for the relative importance of performance versus energy savings to |
| 28 | the processor. |
| 29 | |
| 30 | The range of valid numbers is 0-15, where 0 is maximum |
| 31 | performance and 15 is maximum energy efficiency. |
| 32 | |
| 33 | The processor uses this information in model-specific ways |
| 34 | when it must select trade-offs between performance and |
| 35 | energy efficiency. |
| 36 | |
| 37 | This policy hint does not supersede Processor Performance states |
| 38 | (P-states) or CPU Idle power states (C-states), but allows |
| 39 | software to have influence where it would otherwise be unable |
| 40 | to express a preference. |
| 41 | |
| 42 | For example, this setting may tell the hardware how |
| 43 | aggressively or conservatively to control frequency |
| 44 | in the "turbo range" above the explicitly OS-controlled |
| 45 | P-state frequency range. It may also tell the hardware |
| 46 | how aggressively it should enter the OS requested C-states. |
| 47 | |
| 48 | This option can be applied to individual cores only via the \-\-cpu option, |
| 49 | cpupower(1). |
| 50 | |
| 51 | Setting the performance bias value on one CPU can modify the setting on |
| 52 | related CPUs as well (for example all CPUs on one socket), because of |
| 53 | hardware restrictions. |
| 54 | Use \fBcpupower -c all info -b\fP to verify. |
| 55 | |
| 56 | This options needs the msr kernel driver (CONFIG_X86_MSR) loaded. |
| 57 | .RE |
| 58 | .PP |
| 59 | \-\-sched\-mc, \-m [ VAL ] |
| 60 | .RE |
| 61 | \-\-sched\-smt, \-s [ VAL ] |
| 62 | .RS 4 |
| 63 | \-\-sched\-mc utilizes cores in one processor package/socket first before |
| 64 | processes are scheduled to other processor packages/sockets. |
| 65 | |
| 66 | \-\-sched\-smt utilizes thread siblings of one processor core first before |
| 67 | processes are scheduled to other cores. |
| 68 | |
| 69 | The impact on power consumption and performance (positiv or negativ) heavily |
| 70 | depends on processor support for deep sleep states, frequency scaling and |
| 71 | frequency boost modes and their dependencies between other thread siblings |
| 72 | and processor cores. |
| 73 | |
| 74 | Taken over from kernel documentation: |
| 75 | |
| 76 | Adjust the kernel's multi-core scheduler support. |
| 77 | |
| 78 | Possible values are: |
| 79 | .RS 2 |
| 80 | 0 - No power saving load balance (default value) |
| 81 | |
| 82 | 1 - Fill one thread/core/package first for long running threads |
| 83 | |
| 84 | 2 - Also bias task wakeups to semi-idle cpu package for power |
| 85 | savings |
| 86 | .RE |
| 87 | |
Dominik Brodowski | 7fe2f63 | 2011-03-30 16:30:11 +0200 | [diff] [blame] | 88 | .SH "SEE ALSO" |
| 89 | cpupower-info(1), cpupower-monitor(1), powertop(1) |
| 90 | .PP |
| 91 | .SH AUTHORS |
| 92 | .nf |
| 93 | \-\-perf\-bias parts written by Len Brown <len.brown@intel.com> |
| 94 | Thomas Renninger <trenn@suse.de> |