Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 1 | #ifndef __POWERNV_PCI_H |
| 2 | #define __POWERNV_PCI_H |
| 3 | |
| 4 | struct pci_dn; |
| 5 | |
| 6 | enum pnv_phb_type { |
Gavin Shan | aa0c033 | 2013-04-25 19:20:57 +0000 | [diff] [blame] | 7 | PNV_PHB_P5IOC2 = 0, |
| 8 | PNV_PHB_IODA1 = 1, |
| 9 | PNV_PHB_IODA2 = 2, |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 10 | }; |
| 11 | |
Benjamin Herrenschmidt | cee72d5 | 2011-11-29 18:22:53 +0000 | [diff] [blame] | 12 | /* Precise PHB model for error management */ |
| 13 | enum pnv_phb_model { |
| 14 | PNV_PHB_MODEL_UNKNOWN, |
| 15 | PNV_PHB_MODEL_P5IOC2, |
| 16 | PNV_PHB_MODEL_P7IOC, |
Gavin Shan | aa0c033 | 2013-04-25 19:20:57 +0000 | [diff] [blame] | 17 | PNV_PHB_MODEL_PHB3, |
Benjamin Herrenschmidt | cee72d5 | 2011-11-29 18:22:53 +0000 | [diff] [blame] | 18 | }; |
| 19 | |
Gavin Shan | 5c9d6d7 | 2013-09-06 09:00:03 +0800 | [diff] [blame] | 20 | #define PNV_PCI_DIAG_BUF_SIZE 8192 |
Gavin Shan | 7ebdf95 | 2012-08-20 03:49:15 +0000 | [diff] [blame] | 21 | #define PNV_IODA_PE_DEV (1 << 0) /* PE has single PCI device */ |
| 22 | #define PNV_IODA_PE_BUS (1 << 1) /* PE has primary PCI bus */ |
| 23 | #define PNV_IODA_PE_BUS_ALL (1 << 2) /* PE has subordinate buses */ |
Guo Chao | 262af55 | 2014-07-21 14:42:30 +1000 | [diff] [blame] | 24 | #define PNV_IODA_PE_MASTER (1 << 3) /* Master PE in compound case */ |
| 25 | #define PNV_IODA_PE_SLAVE (1 << 4) /* Slave PE in compound case */ |
Wei Yang | 781a868 | 2015-03-25 16:23:57 +0800 | [diff] [blame] | 26 | #define PNV_IODA_PE_VF (1 << 5) /* PE for one VF */ |
Benjamin Herrenschmidt | cee72d5 | 2011-11-29 18:22:53 +0000 | [diff] [blame] | 27 | |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 28 | /* Data associated with a PE, including IOMMU tracking etc.. */ |
Gavin Shan | 4cce955 | 2013-04-25 19:21:00 +0000 | [diff] [blame] | 29 | struct pnv_phb; |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 30 | struct pnv_ioda_pe { |
Gavin Shan | 7ebdf95 | 2012-08-20 03:49:15 +0000 | [diff] [blame] | 31 | unsigned long flags; |
Gavin Shan | 4cce955 | 2013-04-25 19:21:00 +0000 | [diff] [blame] | 32 | struct pnv_phb *phb; |
Gavin Shan | 7ebdf95 | 2012-08-20 03:49:15 +0000 | [diff] [blame] | 33 | |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 34 | /* A PE can be associated with a single device or an |
| 35 | * entire bus (& children). In the former case, pdev |
| 36 | * is populated, in the later case, pbus is. |
| 37 | */ |
Wei Yang | 781a868 | 2015-03-25 16:23:57 +0800 | [diff] [blame] | 38 | #ifdef CONFIG_PCI_IOV |
| 39 | struct pci_dev *parent_dev; |
| 40 | #endif |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 41 | struct pci_dev *pdev; |
| 42 | struct pci_bus *pbus; |
| 43 | |
| 44 | /* Effective RID (device RID for a device PE and base bus |
| 45 | * RID with devfn 0 for a bus PE) |
| 46 | */ |
| 47 | unsigned int rid; |
| 48 | |
| 49 | /* PE number */ |
| 50 | unsigned int pe_number; |
| 51 | |
| 52 | /* "Weight" assigned to the PE for the sake of DMA resource |
| 53 | * allocations |
| 54 | */ |
| 55 | unsigned int dma_weight; |
| 56 | |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 57 | /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */ |
| 58 | int tce32_seg; |
| 59 | int tce32_segcount; |
Alexey Kardashevskiy | b348aa6 | 2015-06-05 16:35:08 +1000 | [diff] [blame] | 60 | struct iommu_table_group table_group; |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 61 | |
Benjamin Herrenschmidt | cd15b04 | 2014-02-11 11:32:38 +1100 | [diff] [blame] | 62 | /* 64-bit TCE bypass region */ |
| 63 | bool tce_bypass_enabled; |
| 64 | uint64_t tce_bypass_base; |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 65 | |
| 66 | /* MSIs. MVE index is identical for for 32 and 64 bit MSI |
| 67 | * and -1 if not supported. (It's actually identical to the |
| 68 | * PE number) |
| 69 | */ |
| 70 | int mve_number; |
| 71 | |
Guo Chao | 262af55 | 2014-07-21 14:42:30 +1000 | [diff] [blame] | 72 | /* PEs in compound case */ |
| 73 | struct pnv_ioda_pe *master; |
| 74 | struct list_head slaves; |
| 75 | |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 76 | /* Link in list of PE#s */ |
Gavin Shan | 7ebdf95 | 2012-08-20 03:49:15 +0000 | [diff] [blame] | 77 | struct list_head dma_link; |
| 78 | struct list_head list; |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 79 | }; |
| 80 | |
Gavin Shan | f5bc6b7 | 2014-04-24 18:00:09 +1000 | [diff] [blame] | 81 | #define PNV_PHB_FLAG_EEH (1 << 0) |
| 82 | |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 83 | struct pnv_phb { |
| 84 | struct pci_controller *hose; |
| 85 | enum pnv_phb_type type; |
Benjamin Herrenschmidt | cee72d5 | 2011-11-29 18:22:53 +0000 | [diff] [blame] | 86 | enum pnv_phb_model model; |
Gavin Shan | 8747f36 | 2013-06-20 13:21:06 +0800 | [diff] [blame] | 87 | u64 hub_id; |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 88 | u64 opal_id; |
Gavin Shan | f5bc6b7 | 2014-04-24 18:00:09 +1000 | [diff] [blame] | 89 | int flags; |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 90 | void __iomem *regs; |
Gavin Shan | db1266c | 2012-08-20 03:49:18 +0000 | [diff] [blame] | 91 | int initialized; |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 92 | spinlock_t lock; |
| 93 | |
Gavin Shan | 37c367f | 2013-06-20 18:13:25 +0800 | [diff] [blame] | 94 | #ifdef CONFIG_DEBUG_FS |
Gavin Shan | 7f52a526 | 2014-04-24 18:00:18 +1000 | [diff] [blame] | 95 | int has_dbgfs; |
Gavin Shan | 37c367f | 2013-06-20 18:13:25 +0800 | [diff] [blame] | 96 | struct dentry *dbgfs; |
| 97 | #endif |
| 98 | |
Benjamin Herrenschmidt | c1a2562 | 2011-09-19 17:45:06 +0000 | [diff] [blame] | 99 | #ifdef CONFIG_PCI_MSI |
Benjamin Herrenschmidt | c1a2562 | 2011-09-19 17:45:06 +0000 | [diff] [blame] | 100 | unsigned int msi_base; |
Benjamin Herrenschmidt | c1a2562 | 2011-09-19 17:45:06 +0000 | [diff] [blame] | 101 | unsigned int msi32_support; |
Gavin Shan | fb1b55d | 2013-03-05 21:12:37 +0000 | [diff] [blame] | 102 | struct msi_bitmap msi_bmp; |
Benjamin Herrenschmidt | c1a2562 | 2011-09-19 17:45:06 +0000 | [diff] [blame] | 103 | #endif |
| 104 | int (*msi_setup)(struct pnv_phb *phb, struct pci_dev *dev, |
Gavin Shan | 137436c | 2013-04-25 19:20:59 +0000 | [diff] [blame] | 105 | unsigned int hwirq, unsigned int virq, |
| 106 | unsigned int is_64, struct msi_msg *msg); |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 107 | void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev); |
Gavin Shan | fe7e85c | 2014-09-30 12:39:10 +1000 | [diff] [blame] | 108 | u64 (*dma_get_required_mask)(struct pnv_phb *phb, |
| 109 | struct pci_dev *pdev); |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 110 | void (*fixup_phb)(struct pci_controller *hose); |
| 111 | u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn); |
Guo Chao | 262af55 | 2014-07-21 14:42:30 +1000 | [diff] [blame] | 112 | int (*init_m64)(struct pnv_phb *phb); |
Gavin Shan | 96a2f92 | 2015-06-19 12:26:17 +1000 | [diff] [blame^] | 113 | void (*reserve_m64_pe)(struct pci_bus *bus, |
| 114 | unsigned long *pe_bitmap, bool all); |
Guo Chao | 262af55 | 2014-07-21 14:42:30 +1000 | [diff] [blame] | 115 | int (*pick_m64_pe)(struct pnv_phb *phb, struct pci_bus *bus, int all); |
Gavin Shan | 49dec92 | 2014-07-21 14:42:33 +1000 | [diff] [blame] | 116 | int (*get_pe_state)(struct pnv_phb *phb, int pe_no); |
| 117 | void (*freeze_pe)(struct pnv_phb *phb, int pe_no); |
| 118 | int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt); |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 119 | |
| 120 | union { |
| 121 | struct { |
| 122 | struct iommu_table iommu_table; |
Alexey Kardashevskiy | b348aa6 | 2015-06-05 16:35:08 +1000 | [diff] [blame] | 123 | struct iommu_table_group table_group; |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 124 | } p5ioc2; |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 125 | |
| 126 | struct { |
| 127 | /* Global bridge info */ |
| 128 | unsigned int total_pe; |
Gavin Shan | 36954dc | 2013-11-04 16:32:47 +0800 | [diff] [blame] | 129 | unsigned int reserved_pe; |
Guo Chao | 262af55 | 2014-07-21 14:42:30 +1000 | [diff] [blame] | 130 | |
| 131 | /* 32-bit MMIO window */ |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 132 | unsigned int m32_size; |
| 133 | unsigned int m32_segsize; |
| 134 | unsigned int m32_pci_base; |
Guo Chao | 262af55 | 2014-07-21 14:42:30 +1000 | [diff] [blame] | 135 | |
| 136 | /* 64-bit MMIO window */ |
| 137 | unsigned int m64_bar_idx; |
| 138 | unsigned long m64_size; |
| 139 | unsigned long m64_segsize; |
| 140 | unsigned long m64_base; |
| 141 | unsigned long m64_bar_alloc; |
| 142 | |
| 143 | /* IO ports */ |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 144 | unsigned int io_size; |
| 145 | unsigned int io_segsize; |
| 146 | unsigned int io_pci_base; |
| 147 | |
| 148 | /* PE allocation bitmap */ |
| 149 | unsigned long *pe_alloc; |
Wei Yang | 781a868 | 2015-03-25 16:23:57 +0800 | [diff] [blame] | 150 | /* PE allocation mutex */ |
| 151 | struct mutex pe_alloc_mutex; |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 152 | |
| 153 | /* M32 & IO segment maps */ |
| 154 | unsigned int *m32_segmap; |
| 155 | unsigned int *io_segmap; |
| 156 | struct pnv_ioda_pe *pe_array; |
| 157 | |
Gavin Shan | 137436c | 2013-04-25 19:20:59 +0000 | [diff] [blame] | 158 | /* IRQ chip */ |
| 159 | int irq_chip_init; |
| 160 | struct irq_chip irq_chip; |
| 161 | |
Gavin Shan | 7ebdf95 | 2012-08-20 03:49:15 +0000 | [diff] [blame] | 162 | /* Sorted list of used PE's based |
| 163 | * on the sequence of creation |
| 164 | */ |
| 165 | struct list_head pe_list; |
Wei Yang | 781a868 | 2015-03-25 16:23:57 +0800 | [diff] [blame] | 166 | struct mutex pe_list_mutex; |
Gavin Shan | 7ebdf95 | 2012-08-20 03:49:15 +0000 | [diff] [blame] | 167 | |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 168 | /* Reverse map of PEs, will have to extend if |
| 169 | * we are to support more than 256 PEs, indexed |
| 170 | * bus { bus, devfn } |
| 171 | */ |
| 172 | unsigned char pe_rmap[0x10000]; |
| 173 | |
| 174 | /* 32-bit TCE tables allocation */ |
| 175 | unsigned long tce32_count; |
| 176 | |
| 177 | /* Total "weight" for the sake of DMA resources |
| 178 | * allocation |
| 179 | */ |
| 180 | unsigned int dma_weight; |
| 181 | unsigned int dma_pe_count; |
| 182 | |
| 183 | /* Sorted list of used PE's, sorted at |
| 184 | * boot for resource allocation purposes |
| 185 | */ |
Gavin Shan | 7ebdf95 | 2012-08-20 03:49:15 +0000 | [diff] [blame] | 186 | struct list_head pe_dma_list; |
Alexey Kardashevskiy | 5780fb0 | 2015-06-05 16:35:12 +1000 | [diff] [blame] | 187 | |
| 188 | /* TCE cache invalidate registers (physical and |
| 189 | * remapped) |
| 190 | */ |
| 191 | phys_addr_t tce_inval_reg_phys; |
| 192 | __be64 __iomem *tce_inval_reg; |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 193 | } ioda; |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 194 | }; |
Benjamin Herrenschmidt | cee72d5 | 2011-11-29 18:22:53 +0000 | [diff] [blame] | 195 | |
Brian W Hart | ca1de5d | 2013-12-20 13:06:01 -0600 | [diff] [blame] | 196 | /* PHB and hub status structure */ |
Benjamin Herrenschmidt | cee72d5 | 2011-11-29 18:22:53 +0000 | [diff] [blame] | 197 | union { |
| 198 | unsigned char blob[PNV_PCI_DIAG_BUF_SIZE]; |
| 199 | struct OpalIoP7IOCPhbErrorData p7ioc; |
Gavin Shan | 93aef2a | 2013-11-22 16:28:45 +0800 | [diff] [blame] | 200 | struct OpalIoPhb3ErrorData phb3; |
Brian W Hart | ca1de5d | 2013-12-20 13:06:01 -0600 | [diff] [blame] | 201 | struct OpalIoP7IOCErrorData hub_diag; |
Benjamin Herrenschmidt | cee72d5 | 2011-11-29 18:22:53 +0000 | [diff] [blame] | 202 | } diag; |
Brian W Hart | ca1de5d | 2013-12-20 13:06:01 -0600 | [diff] [blame] | 203 | |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 204 | }; |
| 205 | |
| 206 | extern struct pci_ops pnv_pci_ops; |
Alexey Kardashevskiy | da004c3 | 2015-06-05 16:35:06 +1000 | [diff] [blame] | 207 | extern int pnv_tce_build(struct iommu_table *tbl, long index, long npages, |
| 208 | unsigned long uaddr, enum dma_data_direction direction, |
| 209 | struct dma_attrs *attrs); |
| 210 | extern void pnv_tce_free(struct iommu_table *tbl, long index, long npages); |
Alexey Kardashevskiy | 05c6cfb | 2015-06-05 16:35:15 +1000 | [diff] [blame] | 211 | extern int pnv_tce_xchg(struct iommu_table *tbl, long index, |
| 212 | unsigned long *hpa, enum dma_data_direction *direction); |
Alexey Kardashevskiy | da004c3 | 2015-06-05 16:35:06 +1000 | [diff] [blame] | 213 | extern unsigned long pnv_tce_get(struct iommu_table *tbl, long index); |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 214 | |
Gavin Shan | 93aef2a | 2013-11-22 16:28:45 +0800 | [diff] [blame] | 215 | void pnv_pci_dump_phb_diag_data(struct pci_controller *hose, |
| 216 | unsigned char *log_buff); |
Gavin Shan | 3532a741 | 2015-03-17 16:15:03 +1100 | [diff] [blame] | 217 | int pnv_pci_cfg_read(struct pci_dn *pdn, |
Gavin Shan | 9bf41be | 2013-06-27 13:46:48 +0800 | [diff] [blame] | 218 | int where, int size, u32 *val); |
Gavin Shan | 3532a741 | 2015-03-17 16:15:03 +1100 | [diff] [blame] | 219 | int pnv_pci_cfg_write(struct pci_dn *pdn, |
Gavin Shan | 9bf41be | 2013-06-27 13:46:48 +0800 | [diff] [blame] | 220 | int where, int size, u32 val); |
Alexey Kardashevskiy | 0eaf4de | 2015-06-05 16:35:09 +1000 | [diff] [blame] | 221 | extern struct iommu_table *pnv_pci_table_alloc(int nid); |
| 222 | |
| 223 | extern long pnv_pci_link_table_and_group(int node, int num, |
| 224 | struct iommu_table *tbl, |
| 225 | struct iommu_table_group *table_group); |
| 226 | extern void pnv_pci_unlink_table_and_group(struct iommu_table *tbl, |
| 227 | struct iommu_table_group *table_group); |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 228 | extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl, |
| 229 | void *tce_mem, u64 tce_size, |
Alexey Kardashevskiy | 8fa5d45 | 2014-06-06 18:44:03 +1000 | [diff] [blame] | 230 | u64 dma_offset, unsigned page_shift); |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 231 | extern void pnv_pci_init_p5ioc2_hub(struct device_node *np); |
Benjamin Herrenschmidt | 184cd4a | 2011-11-15 17:29:08 +0000 | [diff] [blame] | 232 | extern void pnv_pci_init_ioda_hub(struct device_node *np); |
Gavin Shan | aa0c033 | 2013-04-25 19:20:57 +0000 | [diff] [blame] | 233 | extern void pnv_pci_init_ioda2_phb(struct device_node *np); |
Gavin Shan | 4cce955 | 2013-04-25 19:21:00 +0000 | [diff] [blame] | 234 | extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl, |
Benjamin Herrenschmidt | 3ad26e5 | 2013-10-11 18:23:53 +1100 | [diff] [blame] | 235 | __be64 *startp, __be64 *endp, bool rm); |
Gavin Shan | d92a208 | 2014-04-24 18:00:24 +1000 | [diff] [blame] | 236 | extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev); |
Gavin Shan | cadf364 | 2015-02-16 14:45:47 +1100 | [diff] [blame] | 237 | extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option); |
Benjamin Herrenschmidt | 73ed148 | 2013-05-10 16:59:18 +1000 | [diff] [blame] | 238 | |
Daniel Axtens | 92ae035 | 2015-04-28 15:12:05 +1000 | [diff] [blame] | 239 | extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev); |
| 240 | extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type); |
| 241 | extern void pnv_teardown_msi_irqs(struct pci_dev *pdev); |
| 242 | |
Benjamin Herrenschmidt | 61305a9 | 2011-09-19 17:45:05 +0000 | [diff] [blame] | 243 | #endif /* __POWERNV_PCI_H */ |