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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +02002/***************************************************************************/
3
4/*
5 * sltimers.c -- generic ColdFire slice timer support.
6 *
7 * Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be>
8 * based on
9 * timers.c -- generic ColdFire hardware timer support.
10 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/sched.h>
18#include <linux/interrupt.h>
19#include <linux/irq.h>
20#include <linux/profile.h>
21#include <linux/clocksource.h>
22#include <asm/io.h>
23#include <asm/traps.h>
24#include <asm/machdep.h>
25#include <asm/coldfire.h>
26#include <asm/mcfslt.h>
27#include <asm/mcfsim.h>
28
29/***************************************************************************/
30
31#ifdef CONFIG_HIGHPROFILE
32
33/*
34 * By default use Slice Timer 1 as the profiler clock timer.
35 */
Greg Ungererf2f41c62012-09-17 16:51:20 +100036#define PA(a) (MCFSLT_TIMER1 + (a))
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +020037
38/*
39 * Choose a reasonably fast profile timer. Make it an odd value to
40 * try and get good coverage of kernel operations.
41 */
42#define PROFILEHZ 1013
43
44irqreturn_t mcfslt_profile_tick(int irq, void *dummy)
45{
46 /* Reset Slice Timer 1 */
47 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR));
48 if (current->pid)
49 profile_tick(CPU_PROFILING);
50 return IRQ_HANDLED;
51}
52
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +020053void mcfslt_profile_init(void)
54{
afzal mohammedba000762020-03-01 06:56:55 +053055 int ret;
56
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +020057 printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n",
58 PROFILEHZ);
59
afzal mohammedba000762020-03-01 06:56:55 +053060 ret = request_irq(MCF_IRQ_PROFILER, mcfslt_profile_tick, IRQF_TIMER,
61 "profile timer", NULL);
62 if (ret) {
63 pr_err("Failed to request irq %d (profile timer): %pe\n",
64 MCF_IRQ_PROFILER, ERR_PTR(ret));
65 }
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +020066
67 /* Set up TIMER 2 as high speed profile clock */
68 __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT));
69 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
70 PA(MCFSLT_SCR));
71
72}
73
74#endif /* CONFIG_HIGHPROFILE */
75
76/***************************************************************************/
77
78/*
79 * By default use Slice Timer 0 as the system clock timer.
80 */
Greg Ungererf2f41c62012-09-17 16:51:20 +100081#define TA(a) (MCFSLT_TIMER0 + (a))
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +020082
83static u32 mcfslt_cycles_per_jiffy;
84static u32 mcfslt_cnt;
85
Greg Ungerer35aefb22012-01-23 15:34:58 +100086static irq_handler_t timer_interrupt;
87
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +020088static irqreturn_t mcfslt_tick(int irq, void *dummy)
89{
90 /* Reset Slice Timer 0 */
91 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
92 mcfslt_cnt += mcfslt_cycles_per_jiffy;
Greg Ungerer35aefb22012-01-23 15:34:58 +100093 return timer_interrupt(irq, dummy);
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +020094}
95
Thomas Gleixnera5a1d1c2016-12-21 20:32:01 +010096static u64 mcfslt_read_clk(struct clocksource *cs)
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +020097{
98 unsigned long flags;
Greg Ungerer1f2aab02011-11-16 15:09:02 +100099 u32 cycles, scnt;
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200100
101 local_irq_save(flags);
102 scnt = __raw_readl(TA(MCFSLT_SCNT));
103 cycles = mcfslt_cnt;
Greg Ungerer1f2aab02011-11-16 15:09:02 +1000104 if (__raw_readl(TA(MCFSLT_SSR)) & MCFSLT_SSR_TE) {
105 cycles += mcfslt_cycles_per_jiffy;
106 scnt = __raw_readl(TA(MCFSLT_SCNT));
107 }
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200108 local_irq_restore(flags);
109
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300110 /* subtract because slice timers count down */
Greg Ungerer1f2aab02011-11-16 15:09:02 +1000111 return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt);
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200112}
113
114static struct clocksource mcfslt_clk = {
115 .name = "slt",
116 .rating = 250,
117 .read = mcfslt_read_clk,
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200118 .mask = CLOCKSOURCE_MASK(32),
119 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
120};
121
Greg Ungerer35aefb22012-01-23 15:34:58 +1000122void hw_timer_init(irq_handler_t handler)
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200123{
afzal mohammedba000762020-03-01 06:56:55 +0530124 int r;
125
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200126 mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
127 /*
128 * The coldfire slice timer (SLT) runs from STCNT to 0 included,
129 * then STCNT again and so on. It counts thus actually
130 * STCNT + 1 steps for 1 tick, not STCNT. So if you want
131 * n cycles, initialize STCNT with n - 1.
132 */
133 __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT));
134 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
135 TA(MCFSLT_SCR));
136 /* initialize mcfslt_cnt knowing that slice timers count down */
137 mcfslt_cnt = mcfslt_cycles_per_jiffy;
138
Greg Ungerer35aefb22012-01-23 15:34:58 +1000139 timer_interrupt = handler;
afzal mohammedba000762020-03-01 06:56:55 +0530140 r = request_irq(MCF_IRQ_TIMER, mcfslt_tick, IRQF_TIMER, "timer", NULL);
141 if (r) {
142 pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER,
143 ERR_PTR(r));
144 }
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200145
john stultza2a3dfb2011-10-25 11:46:10 -0700146 clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK);
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200147
148#ifdef CONFIG_HIGHPROFILE
149 mcfslt_profile_init();
150#endif
151}