Thomas Gleixner | 1a59d1b8 | 2019-05-27 08:55:05 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 2 | /* |
| 3 | * The file intends to implement PE based on the information from |
| 4 | * platforms. Basically, there have 3 types of PEs: PHB/Bus/Device. |
| 5 | * All the PEs should be organized as hierarchy tree. The first level |
| 6 | * of the tree will be associated to existing PHBs since the particular |
| 7 | * PE is only meaningful in one PHB domain. |
| 8 | * |
| 9 | * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2012. |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 10 | */ |
| 11 | |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 12 | #include <linux/delay.h> |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 13 | #include <linux/export.h> |
| 14 | #include <linux/gfp.h> |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 15 | #include <linux/kernel.h> |
Christophe Leroy | e6f6390 | 2022-03-08 20:20:25 +0100 | [diff] [blame] | 16 | #include <linux/of.h> |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 17 | #include <linux/pci.h> |
| 18 | #include <linux/string.h> |
| 19 | |
| 20 | #include <asm/pci-bridge.h> |
| 21 | #include <asm/ppc-pci.h> |
| 22 | |
Gavin Shan | bb593c0 | 2014-07-17 14:41:43 +1000 | [diff] [blame] | 23 | static int eeh_pe_aux_size = 0; |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 24 | static LIST_HEAD(eeh_phb_pe); |
| 25 | |
| 26 | /** |
Gavin Shan | bb593c0 | 2014-07-17 14:41:43 +1000 | [diff] [blame] | 27 | * eeh_set_pe_aux_size - Set PE auxillary data size |
| 28 | * @size: PE auxillary data size |
| 29 | * |
| 30 | * Set PE auxillary data size |
| 31 | */ |
| 32 | void eeh_set_pe_aux_size(int size) |
| 33 | { |
| 34 | if (size < 0) |
| 35 | return; |
| 36 | |
| 37 | eeh_pe_aux_size = size; |
| 38 | } |
| 39 | |
| 40 | /** |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 41 | * eeh_pe_alloc - Allocate PE |
| 42 | * @phb: PCI controller |
| 43 | * @type: PE type |
| 44 | * |
| 45 | * Allocate PE instance dynamically. |
| 46 | */ |
| 47 | static struct eeh_pe *eeh_pe_alloc(struct pci_controller *phb, int type) |
| 48 | { |
| 49 | struct eeh_pe *pe; |
Gavin Shan | bb593c0 | 2014-07-17 14:41:43 +1000 | [diff] [blame] | 50 | size_t alloc_size; |
| 51 | |
| 52 | alloc_size = sizeof(struct eeh_pe); |
| 53 | if (eeh_pe_aux_size) { |
| 54 | alloc_size = ALIGN(alloc_size, cache_line_size()); |
| 55 | alloc_size += eeh_pe_aux_size; |
| 56 | } |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 57 | |
| 58 | /* Allocate PHB PE */ |
Gavin Shan | bb593c0 | 2014-07-17 14:41:43 +1000 | [diff] [blame] | 59 | pe = kzalloc(alloc_size, GFP_KERNEL); |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 60 | if (!pe) return NULL; |
| 61 | |
| 62 | /* Initialize PHB PE */ |
| 63 | pe->type = type; |
| 64 | pe->phb = phb; |
| 65 | INIT_LIST_HEAD(&pe->child_list); |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 66 | INIT_LIST_HEAD(&pe->edevs); |
| 67 | |
Gavin Shan | bb593c0 | 2014-07-17 14:41:43 +1000 | [diff] [blame] | 68 | pe->data = (void *)pe + ALIGN(sizeof(struct eeh_pe), |
| 69 | cache_line_size()); |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 70 | return pe; |
| 71 | } |
| 72 | |
| 73 | /** |
| 74 | * eeh_phb_pe_create - Create PHB PE |
| 75 | * @phb: PCI controller |
| 76 | * |
| 77 | * The function should be called while the PHB is detected during |
| 78 | * system boot or PCI hotplug in order to create PHB PE. |
| 79 | */ |
Greg Kroah-Hartman | cad5cef | 2012-12-21 14:04:10 -0800 | [diff] [blame] | 80 | int eeh_phb_pe_create(struct pci_controller *phb) |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 81 | { |
| 82 | struct eeh_pe *pe; |
| 83 | |
| 84 | /* Allocate PHB PE */ |
| 85 | pe = eeh_pe_alloc(phb, EEH_PE_PHB); |
| 86 | if (!pe) { |
| 87 | pr_err("%s: out of memory!\n", __func__); |
| 88 | return -ENOMEM; |
| 89 | } |
| 90 | |
| 91 | /* Put it into the list */ |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 92 | list_add_tail(&pe->child, &eeh_phb_pe); |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 93 | |
Russell Currey | 1f52f17 | 2016-11-16 14:02:15 +1100 | [diff] [blame] | 94 | pr_debug("EEH: Add PE for PHB#%x\n", phb->global_number); |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | |
| 99 | /** |
Sam Bobroff | fef7f90 | 2018-09-12 11:23:32 +1000 | [diff] [blame] | 100 | * eeh_wait_state - Wait for PE state |
| 101 | * @pe: EEH PE |
| 102 | * @max_wait: maximal period in millisecond |
| 103 | * |
| 104 | * Wait for the state of associated PE. It might take some time |
| 105 | * to retrieve the PE's state. |
| 106 | */ |
| 107 | int eeh_wait_state(struct eeh_pe *pe, int max_wait) |
| 108 | { |
| 109 | int ret; |
| 110 | int mwait; |
| 111 | |
| 112 | /* |
| 113 | * According to PAPR, the state of PE might be temporarily |
| 114 | * unavailable. Under the circumstance, we have to wait |
| 115 | * for indicated time determined by firmware. The maximal |
| 116 | * wait time is 5 minutes, which is acquired from the original |
| 117 | * EEH implementation. Also, the original implementation |
| 118 | * also defined the minimal wait time as 1 second. |
| 119 | */ |
| 120 | #define EEH_STATE_MIN_WAIT_TIME (1000) |
| 121 | #define EEH_STATE_MAX_WAIT_TIME (300 * 1000) |
| 122 | |
| 123 | while (1) { |
| 124 | ret = eeh_ops->get_state(pe, &mwait); |
| 125 | |
| 126 | if (ret != EEH_STATE_UNAVAILABLE) |
| 127 | return ret; |
| 128 | |
| 129 | if (max_wait <= 0) { |
| 130 | pr_warn("%s: Timeout when getting PE's state (%d)\n", |
| 131 | __func__, max_wait); |
| 132 | return EEH_STATE_NOT_SUPPORT; |
| 133 | } |
| 134 | |
| 135 | if (mwait < EEH_STATE_MIN_WAIT_TIME) { |
| 136 | pr_warn("%s: Firmware returned bad wait value %d\n", |
| 137 | __func__, mwait); |
| 138 | mwait = EEH_STATE_MIN_WAIT_TIME; |
| 139 | } else if (mwait > EEH_STATE_MAX_WAIT_TIME) { |
| 140 | pr_warn("%s: Firmware returned too long wait value %d\n", |
| 141 | __func__, mwait); |
| 142 | mwait = EEH_STATE_MAX_WAIT_TIME; |
| 143 | } |
| 144 | |
| 145 | msleep(min(mwait, max_wait)); |
| 146 | max_wait -= mwait; |
| 147 | } |
| 148 | } |
| 149 | |
| 150 | /** |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 151 | * eeh_phb_pe_get - Retrieve PHB PE based on the given PHB |
| 152 | * @phb: PCI controller |
| 153 | * |
| 154 | * The overall PEs form hierarchy tree. The first layer of the |
| 155 | * hierarchy tree is composed of PHB PEs. The function is used |
| 156 | * to retrieve the corresponding PHB PE according to the given PHB. |
| 157 | */ |
Gavin Shan | 9ff6743 | 2013-06-20 13:20:53 +0800 | [diff] [blame] | 158 | struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb) |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 159 | { |
| 160 | struct eeh_pe *pe; |
| 161 | |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 162 | list_for_each_entry(pe, &eeh_phb_pe, child) { |
| 163 | /* |
| 164 | * Actually, we needn't check the type since |
| 165 | * the PE for PHB has been determined when that |
| 166 | * was created. |
| 167 | */ |
Aneesh Kumar K.V | 7844663 | 2012-09-20 23:29:46 +0000 | [diff] [blame] | 168 | if ((pe->type & EEH_PE_PHB) && pe->phb == phb) |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 169 | return pe; |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 170 | } |
| 171 | |
Gavin Shan | 55037d1 | 2012-09-07 22:44:07 +0000 | [diff] [blame] | 172 | return NULL; |
| 173 | } |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 174 | |
| 175 | /** |
| 176 | * eeh_pe_next - Retrieve the next PE in the tree |
| 177 | * @pe: current PE |
| 178 | * @root: root PE |
| 179 | * |
| 180 | * The function is used to retrieve the next PE in the |
| 181 | * hierarchy PE tree. |
| 182 | */ |
Sam Bobroff | 309ed3a | 2018-05-25 13:11:35 +1000 | [diff] [blame] | 183 | struct eeh_pe *eeh_pe_next(struct eeh_pe *pe, struct eeh_pe *root) |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 184 | { |
| 185 | struct list_head *next = pe->child_list.next; |
| 186 | |
| 187 | if (next == &pe->child_list) { |
| 188 | while (1) { |
| 189 | if (pe == root) |
| 190 | return NULL; |
| 191 | next = pe->child.next; |
| 192 | if (next != &pe->parent->child_list) |
| 193 | break; |
| 194 | pe = pe->parent; |
| 195 | } |
| 196 | } |
| 197 | |
| 198 | return list_entry(next, struct eeh_pe, child); |
| 199 | } |
| 200 | |
| 201 | /** |
| 202 | * eeh_pe_traverse - Traverse PEs in the specified PHB |
| 203 | * @root: root PE |
| 204 | * @fn: callback |
| 205 | * @flag: extra parameter to callback |
| 206 | * |
| 207 | * The function is used to traverse the specified PE and its |
| 208 | * child PEs. The traversing is to be terminated once the |
| 209 | * callback returns something other than NULL, or no more PEs |
| 210 | * to be traversed. |
| 211 | */ |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 212 | void *eeh_pe_traverse(struct eeh_pe *root, |
Sam Bobroff | d6c4932 | 2018-05-25 13:11:32 +1000 | [diff] [blame] | 213 | eeh_pe_traverse_func fn, void *flag) |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 214 | { |
| 215 | struct eeh_pe *pe; |
| 216 | void *ret; |
| 217 | |
Sam Bobroff | 309ed3a | 2018-05-25 13:11:35 +1000 | [diff] [blame] | 218 | eeh_for_each_pe(root, pe) { |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 219 | ret = fn(pe, flag); |
| 220 | if (ret) return ret; |
| 221 | } |
| 222 | |
| 223 | return NULL; |
| 224 | } |
| 225 | |
| 226 | /** |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 227 | * eeh_pe_dev_traverse - Traverse the devices from the PE |
| 228 | * @root: EEH PE |
| 229 | * @fn: function callback |
| 230 | * @flag: extra parameter to callback |
| 231 | * |
| 232 | * The function is used to traverse the devices of the specified |
| 233 | * PE and its child PEs. |
| 234 | */ |
Sam Bobroff | cef50c6 | 2019-08-16 14:48:15 +1000 | [diff] [blame] | 235 | void eeh_pe_dev_traverse(struct eeh_pe *root, |
Sam Bobroff | d6c4932 | 2018-05-25 13:11:32 +1000 | [diff] [blame] | 236 | eeh_edev_traverse_func fn, void *flag) |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 237 | { |
| 238 | struct eeh_pe *pe; |
Gavin Shan | 9feed42 | 2013-07-24 10:24:56 +0800 | [diff] [blame] | 239 | struct eeh_dev *edev, *tmp; |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 240 | |
| 241 | if (!root) { |
Gavin Shan | 0dae274 | 2014-07-17 14:41:41 +1000 | [diff] [blame] | 242 | pr_warn("%s: Invalid PE %p\n", |
| 243 | __func__, root); |
Sam Bobroff | cef50c6 | 2019-08-16 14:48:15 +1000 | [diff] [blame] | 244 | return; |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 245 | } |
| 246 | |
| 247 | /* Traverse root PE */ |
Sam Bobroff | cef50c6 | 2019-08-16 14:48:15 +1000 | [diff] [blame] | 248 | eeh_for_each_pe(root, pe) |
| 249 | eeh_pe_for_each_dev(pe, edev, tmp) |
| 250 | fn(edev, flag); |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 251 | } |
| 252 | |
| 253 | /** |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 254 | * __eeh_pe_get - Check the PE address |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 255 | * |
| 256 | * For one particular PE, it can be identified by PE address |
| 257 | * or tranditional BDF address. BDF address is composed of |
| 258 | * Bus/Device/Function number. The extra data referred by flag |
| 259 | * indicates which type of address should be used. |
| 260 | */ |
Sam Bobroff | d6c4932 | 2018-05-25 13:11:32 +1000 | [diff] [blame] | 261 | static void *__eeh_pe_get(struct eeh_pe *pe, void *flag) |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 262 | { |
Oliver O'Halloran | 35d6473 | 2020-09-18 19:30:50 +1000 | [diff] [blame] | 263 | int *target_pe = flag; |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 264 | |
Oliver O'Halloran | 35d6473 | 2020-09-18 19:30:50 +1000 | [diff] [blame] | 265 | /* PHB PEs are special and should be ignored */ |
Gavin Shan | 5efc3ad | 2012-09-11 19:16:16 +0000 | [diff] [blame] | 266 | if (pe->type & EEH_PE_PHB) |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 267 | return NULL; |
| 268 | |
Oliver O'Halloran | 35d6473 | 2020-09-18 19:30:50 +1000 | [diff] [blame] | 269 | if (*target_pe == pe->addr) |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 270 | return pe; |
| 271 | |
| 272 | return NULL; |
| 273 | } |
| 274 | |
| 275 | /** |
| 276 | * eeh_pe_get - Search PE based on the given address |
Alexey Kardashevskiy | 8bae6a2 | 2017-08-29 17:34:00 +1000 | [diff] [blame] | 277 | * @phb: PCI controller |
| 278 | * @pe_no: PE number |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 279 | * |
| 280 | * Search the corresponding PE based on the specified address which |
| 281 | * is included in the eeh device. The function is used to check if |
| 282 | * the associated PE has been created against the PE address. It's |
| 283 | * notable that the PE address has 2 format: traditional PE address |
| 284 | * which is composed of PCI bus/device/function number, or unified |
| 285 | * PE address. |
| 286 | */ |
Oliver O'Halloran | 35d6473 | 2020-09-18 19:30:50 +1000 | [diff] [blame] | 287 | struct eeh_pe *eeh_pe_get(struct pci_controller *phb, int pe_no) |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 288 | { |
Alexey Kardashevskiy | 8bae6a2 | 2017-08-29 17:34:00 +1000 | [diff] [blame] | 289 | struct eeh_pe *root = eeh_phb_pe_get(phb); |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 290 | |
Oliver O'Halloran | 35d6473 | 2020-09-18 19:30:50 +1000 | [diff] [blame] | 291 | return eeh_pe_traverse(root, __eeh_pe_get, &pe_no); |
Gavin Shan | 22f4ab1 | 2012-09-07 22:44:08 +0000 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | /** |
Oliver O'Halloran | d923ab7 | 2020-07-25 18:12:29 +1000 | [diff] [blame] | 295 | * eeh_pe_tree_insert - Add EEH device to parent PE |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 296 | * @edev: EEH device |
Oliver O'Halloran | a131bfc | 2020-07-25 18:12:31 +1000 | [diff] [blame] | 297 | * @new_pe_parent: PE to create additional PEs under |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 298 | * |
Oliver O'Halloran | a131bfc | 2020-07-25 18:12:31 +1000 | [diff] [blame] | 299 | * Add EEH device to the PE in edev->pe_config_addr. If a PE already |
| 300 | * exists with that address then @edev is added to that PE. Otherwise |
| 301 | * a new PE is created and inserted into the PE tree as a child of |
| 302 | * @new_pe_parent. |
| 303 | * |
| 304 | * If @new_pe_parent is NULL then the new PE will be inserted under |
Michael Ellerman | 87c78b6 | 2022-05-19 00:26:29 +1000 | [diff] [blame] | 305 | * directly under the PHB. |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 306 | */ |
Oliver O'Halloran | a131bfc | 2020-07-25 18:12:31 +1000 | [diff] [blame] | 307 | int eeh_pe_tree_insert(struct eeh_dev *edev, struct eeh_pe *new_pe_parent) |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 308 | { |
Oliver O'Halloran | 31595ae | 2020-07-25 18:12:30 +1000 | [diff] [blame] | 309 | struct pci_controller *hose = edev->controller; |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 310 | struct eeh_pe *pe, *parent; |
| 311 | |
| 312 | /* |
| 313 | * Search the PE has been existing or not according |
| 314 | * to the PE address. If that has been existing, the |
| 315 | * PE should be composed of PCI bus and its subordinate |
| 316 | * components. |
| 317 | */ |
Oliver O'Halloran | 35d6473 | 2020-09-18 19:30:50 +1000 | [diff] [blame] | 318 | pe = eeh_pe_get(hose, edev->pe_config_addr); |
Sam Bobroff | 27d4396 | 2019-08-16 14:48:16 +1000 | [diff] [blame] | 319 | if (pe) { |
| 320 | if (pe->type & EEH_PE_INVALID) { |
| 321 | list_add_tail(&edev->entry, &pe->edevs); |
| 322 | edev->pe = pe; |
| 323 | /* |
| 324 | * We're running to here because of PCI hotplug caused by |
| 325 | * EEH recovery. We need clear EEH_PE_INVALID until the top. |
| 326 | */ |
| 327 | parent = pe; |
| 328 | while (parent) { |
| 329 | if (!(parent->type & EEH_PE_INVALID)) |
| 330 | break; |
| 331 | parent->type &= ~EEH_PE_INVALID; |
| 332 | parent = parent->parent; |
| 333 | } |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 334 | |
Oliver O'Halloran | a131bfc | 2020-07-25 18:12:31 +1000 | [diff] [blame] | 335 | eeh_edev_dbg(edev, "Added to existing PE (parent: PE#%x)\n", |
Sam Bobroff | 27d4396 | 2019-08-16 14:48:16 +1000 | [diff] [blame] | 336 | pe->parent->addr); |
| 337 | } else { |
| 338 | /* Mark the PE as type of PCI bus */ |
| 339 | pe->type = EEH_PE_BUS; |
| 340 | edev->pe = pe; |
| 341 | |
| 342 | /* Put the edev to PE */ |
| 343 | list_add_tail(&edev->entry, &pe->edevs); |
| 344 | eeh_edev_dbg(edev, "Added to bus PE\n"); |
Gavin Shan | 5efc3ad | 2012-09-11 19:16:16 +0000 | [diff] [blame] | 345 | } |
Gavin Shan | 5efc3ad | 2012-09-11 19:16:16 +0000 | [diff] [blame] | 346 | return 0; |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 347 | } |
| 348 | |
| 349 | /* Create a new EEH PE */ |
Wei Yang | c29fa27 | 2016-03-04 10:53:08 +1100 | [diff] [blame] | 350 | if (edev->physfn) |
Oliver O'Halloran | 31595ae | 2020-07-25 18:12:30 +1000 | [diff] [blame] | 351 | pe = eeh_pe_alloc(hose, EEH_PE_VF); |
Wei Yang | c29fa27 | 2016-03-04 10:53:08 +1100 | [diff] [blame] | 352 | else |
Oliver O'Halloran | 31595ae | 2020-07-25 18:12:30 +1000 | [diff] [blame] | 353 | pe = eeh_pe_alloc(hose, EEH_PE_DEVICE); |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 354 | if (!pe) { |
| 355 | pr_err("%s: out of memory!\n", __func__); |
| 356 | return -ENOMEM; |
| 357 | } |
Oliver O'Halloran | 269e583 | 2020-10-07 15:09:02 +1100 | [diff] [blame] | 358 | |
| 359 | pe->addr = edev->pe_config_addr; |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 360 | |
| 361 | /* |
| 362 | * Put the new EEH PE into hierarchy tree. If the parent |
| 363 | * can't be found, the newly created PE will be attached |
| 364 | * to PHB directly. Otherwise, we have to associate the |
| 365 | * PE with its parent. |
| 366 | */ |
Oliver O'Halloran | a131bfc | 2020-07-25 18:12:31 +1000 | [diff] [blame] | 367 | if (!new_pe_parent) { |
| 368 | new_pe_parent = eeh_phb_pe_get(hose); |
| 369 | if (!new_pe_parent) { |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 370 | pr_err("%s: No PHB PE is found (PHB Domain=%d)\n", |
Oliver O'Halloran | 31595ae | 2020-07-25 18:12:30 +1000 | [diff] [blame] | 371 | __func__, hose->global_number); |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 372 | edev->pe = NULL; |
| 373 | kfree(pe); |
| 374 | return -EEXIST; |
| 375 | } |
| 376 | } |
Oliver O'Halloran | a131bfc | 2020-07-25 18:12:31 +1000 | [diff] [blame] | 377 | |
| 378 | /* link new PE into the tree */ |
| 379 | pe->parent = new_pe_parent; |
| 380 | list_add_tail(&pe->child, &new_pe_parent->child_list); |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 381 | |
| 382 | /* |
| 383 | * Put the newly created PE into the child list and |
| 384 | * link the EEH device accordingly. |
| 385 | */ |
Sam Bobroff | 80e65b0 | 2018-09-12 11:23:26 +1000 | [diff] [blame] | 386 | list_add_tail(&edev->entry, &pe->edevs); |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 387 | edev->pe = pe; |
Oliver O'Halloran | a131bfc | 2020-07-25 18:12:31 +1000 | [diff] [blame] | 388 | eeh_edev_dbg(edev, "Added to new (parent: PE#%x)\n", |
| 389 | new_pe_parent->addr); |
Gavin Shan | 9b84348 | 2012-09-07 22:44:09 +0000 | [diff] [blame] | 390 | |
| 391 | return 0; |
| 392 | } |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 393 | |
| 394 | /** |
Oliver O'Halloran | d923ab7 | 2020-07-25 18:12:29 +1000 | [diff] [blame] | 395 | * eeh_pe_tree_remove - Remove one EEH device from the associated PE |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 396 | * @edev: EEH device |
| 397 | * |
| 398 | * The PE hierarchy tree might be changed when doing PCI hotplug. |
| 399 | * Also, the PCI devices or buses could be removed from the system |
| 400 | * during EEH recovery. So we have to call the function remove the |
| 401 | * corresponding PE accordingly if necessary. |
| 402 | */ |
Oliver O'Halloran | d923ab7 | 2020-07-25 18:12:29 +1000 | [diff] [blame] | 403 | int eeh_pe_tree_remove(struct eeh_dev *edev) |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 404 | { |
Gavin Shan | 5efc3ad | 2012-09-11 19:16:16 +0000 | [diff] [blame] | 405 | struct eeh_pe *pe, *parent, *child; |
Oliver O'Halloran | 799abe2 | 2019-09-03 20:15:52 +1000 | [diff] [blame] | 406 | bool keep, recover; |
Gavin Shan | 5efc3ad | 2012-09-11 19:16:16 +0000 | [diff] [blame] | 407 | int cnt; |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 408 | |
Sam Bobroff | 9a3eda2 | 2018-09-12 11:23:28 +1000 | [diff] [blame] | 409 | pe = eeh_dev_to_pe(edev); |
| 410 | if (!pe) { |
Sam Bobroff | 1ff8f36 | 2019-08-16 14:48:13 +1000 | [diff] [blame] | 411 | eeh_edev_dbg(edev, "No PE found for device.\n"); |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 412 | return -EEXIST; |
| 413 | } |
| 414 | |
| 415 | /* Remove the EEH device */ |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 416 | edev->pe = NULL; |
Sam Bobroff | 80e65b0 | 2018-09-12 11:23:26 +1000 | [diff] [blame] | 417 | list_del(&edev->entry); |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 418 | |
| 419 | /* |
| 420 | * Check if the parent PE includes any EEH devices. |
| 421 | * If not, we should delete that. Also, we should |
| 422 | * delete the parent PE if it doesn't have associated |
| 423 | * child PEs and EEH devices. |
| 424 | */ |
| 425 | while (1) { |
| 426 | parent = pe->parent; |
Oliver O'Halloran | 799abe2 | 2019-09-03 20:15:52 +1000 | [diff] [blame] | 427 | |
| 428 | /* PHB PEs should never be removed */ |
Gavin Shan | 5efc3ad | 2012-09-11 19:16:16 +0000 | [diff] [blame] | 429 | if (pe->type & EEH_PE_PHB) |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 430 | break; |
| 431 | |
Oliver O'Halloran | 799abe2 | 2019-09-03 20:15:52 +1000 | [diff] [blame] | 432 | /* |
| 433 | * XXX: KEEP is set while resetting a PE. I don't think it's |
| 434 | * ever set without RECOVERING also being set. I could |
| 435 | * be wrong though so catch that with a WARN. |
| 436 | */ |
| 437 | keep = !!(pe->state & EEH_PE_KEEP); |
| 438 | recover = !!(pe->state & EEH_PE_RECOVERING); |
| 439 | WARN_ON(keep && !recover); |
| 440 | |
| 441 | if (!keep && !recover) { |
Gavin Shan | 20ee6a9 | 2012-09-11 19:16:17 +0000 | [diff] [blame] | 442 | if (list_empty(&pe->edevs) && |
| 443 | list_empty(&pe->child_list)) { |
| 444 | list_del(&pe->child); |
| 445 | kfree(pe); |
| 446 | } else { |
Gavin Shan | 5efc3ad | 2012-09-11 19:16:16 +0000 | [diff] [blame] | 447 | break; |
Gavin Shan | 20ee6a9 | 2012-09-11 19:16:17 +0000 | [diff] [blame] | 448 | } |
| 449 | } else { |
Oliver O'Halloran | 799abe2 | 2019-09-03 20:15:52 +1000 | [diff] [blame] | 450 | /* |
| 451 | * Mark the PE as invalid. At the end of the recovery |
| 452 | * process any invalid PEs will be garbage collected. |
| 453 | * |
| 454 | * We need to delay the free()ing of them since we can |
| 455 | * remove edev's while traversing the PE tree which |
| 456 | * might trigger the removal of a PE and we can't |
| 457 | * deal with that (yet). |
| 458 | */ |
Gavin Shan | 20ee6a9 | 2012-09-11 19:16:17 +0000 | [diff] [blame] | 459 | if (list_empty(&pe->edevs)) { |
| 460 | cnt = 0; |
| 461 | list_for_each_entry(child, &pe->child_list, child) { |
Gavin Shan | e716e01 | 2012-11-22 21:58:26 +0000 | [diff] [blame] | 462 | if (!(child->type & EEH_PE_INVALID)) { |
Gavin Shan | 20ee6a9 | 2012-09-11 19:16:17 +0000 | [diff] [blame] | 463 | cnt++; |
| 464 | break; |
| 465 | } |
| 466 | } |
| 467 | |
| 468 | if (!cnt) |
| 469 | pe->type |= EEH_PE_INVALID; |
| 470 | else |
| 471 | break; |
| 472 | } |
Gavin Shan | 82e8882 | 2012-09-07 22:44:10 +0000 | [diff] [blame] | 473 | } |
| 474 | |
| 475 | pe = parent; |
| 476 | } |
| 477 | |
| 478 | return 0; |
| 479 | } |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 480 | |
| 481 | /** |
Gavin Shan | 5a71978 | 2013-06-20 13:21:01 +0800 | [diff] [blame] | 482 | * eeh_pe_update_time_stamp - Update PE's frozen time stamp |
| 483 | * @pe: EEH PE |
| 484 | * |
| 485 | * We have time stamp for each PE to trace its time of getting |
| 486 | * frozen in last hour. The function should be called to update |
| 487 | * the time stamp on first error of the specific PE. On the other |
| 488 | * handle, we needn't account for errors happened in last hour. |
| 489 | */ |
| 490 | void eeh_pe_update_time_stamp(struct eeh_pe *pe) |
| 491 | { |
Arnd Bergmann | edfd17f | 2017-11-04 22:26:52 +0100 | [diff] [blame] | 492 | time64_t tstamp; |
Gavin Shan | 5a71978 | 2013-06-20 13:21:01 +0800 | [diff] [blame] | 493 | |
| 494 | if (!pe) return; |
| 495 | |
| 496 | if (pe->freeze_count <= 0) { |
| 497 | pe->freeze_count = 0; |
Arnd Bergmann | edfd17f | 2017-11-04 22:26:52 +0100 | [diff] [blame] | 498 | pe->tstamp = ktime_get_seconds(); |
Gavin Shan | 5a71978 | 2013-06-20 13:21:01 +0800 | [diff] [blame] | 499 | } else { |
Arnd Bergmann | edfd17f | 2017-11-04 22:26:52 +0100 | [diff] [blame] | 500 | tstamp = ktime_get_seconds(); |
| 501 | if (tstamp - pe->tstamp > 3600) { |
Gavin Shan | 5a71978 | 2013-06-20 13:21:01 +0800 | [diff] [blame] | 502 | pe->tstamp = tstamp; |
| 503 | pe->freeze_count = 0; |
| 504 | } |
| 505 | } |
| 506 | } |
| 507 | |
| 508 | /** |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 509 | * eeh_pe_state_mark - Mark specified state for PE and its associated device |
| 510 | * @pe: EEH PE |
| 511 | * |
| 512 | * EEH error affects the current PE and its child PEs. The function |
| 513 | * is used to mark appropriate state for the affected PEs and the |
| 514 | * associated devices. |
| 515 | */ |
Sam Bobroff | e762bb8 | 2018-09-12 11:23:31 +1000 | [diff] [blame] | 516 | void eeh_pe_state_mark(struct eeh_pe *root, int state) |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 517 | { |
Sam Bobroff | e762bb8 | 2018-09-12 11:23:31 +1000 | [diff] [blame] | 518 | struct eeh_pe *pe; |
| 519 | |
| 520 | eeh_for_each_pe(root, pe) |
| 521 | if (!(pe->state & EEH_PE_REMOVED)) |
| 522 | pe->state |= state; |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 523 | } |
Gavin Shan | e0056b0 | 2016-09-28 14:34:55 +1000 | [diff] [blame] | 524 | EXPORT_SYMBOL_GPL(eeh_pe_state_mark); |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 525 | |
Sam Bobroff | e762bb8 | 2018-09-12 11:23:31 +1000 | [diff] [blame] | 526 | /** |
| 527 | * eeh_pe_mark_isolated |
| 528 | * @pe: EEH PE |
| 529 | * |
| 530 | * Record that a PE has been isolated by marking the PE and it's children as |
| 531 | * EEH_PE_ISOLATED (and EEH_PE_CFG_BLOCKED, if required) and their PCI devices |
| 532 | * as pci_channel_io_frozen. |
| 533 | */ |
| 534 | void eeh_pe_mark_isolated(struct eeh_pe *root) |
| 535 | { |
| 536 | struct eeh_pe *pe; |
| 537 | struct eeh_dev *edev; |
| 538 | struct pci_dev *pdev; |
| 539 | |
| 540 | eeh_pe_state_mark(root, EEH_PE_ISOLATED); |
| 541 | eeh_for_each_pe(root, pe) { |
| 542 | list_for_each_entry(edev, &pe->edevs, entry) { |
| 543 | pdev = eeh_dev_to_pci_dev(edev); |
| 544 | if (pdev) |
| 545 | pdev->error_state = pci_channel_io_frozen; |
| 546 | } |
| 547 | /* Block PCI config access if required */ |
| 548 | if (pe->state & EEH_PE_CFG_RESTRICTED) |
| 549 | pe->state |= EEH_PE_CFG_BLOCKED; |
| 550 | } |
| 551 | } |
| 552 | EXPORT_SYMBOL_GPL(eeh_pe_mark_isolated); |
| 553 | |
Sam Bobroff | cef50c6 | 2019-08-16 14:48:15 +1000 | [diff] [blame] | 554 | static void __eeh_pe_dev_mode_mark(struct eeh_dev *edev, void *flag) |
Gavin Shan | d2b0f6f | 2014-04-24 18:00:19 +1000 | [diff] [blame] | 555 | { |
Gavin Shan | d2b0f6f | 2014-04-24 18:00:19 +1000 | [diff] [blame] | 556 | int mode = *((int *)flag); |
| 557 | |
| 558 | edev->mode |= mode; |
Gavin Shan | d2b0f6f | 2014-04-24 18:00:19 +1000 | [diff] [blame] | 559 | } |
| 560 | |
| 561 | /** |
| 562 | * eeh_pe_dev_state_mark - Mark state for all device under the PE |
| 563 | * @pe: EEH PE |
| 564 | * |
| 565 | * Mark specific state for all child devices of the PE. |
| 566 | */ |
| 567 | void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode) |
| 568 | { |
| 569 | eeh_pe_dev_traverse(pe, __eeh_pe_dev_mode_mark, &mode); |
| 570 | } |
| 571 | |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 572 | /** |
Sam Bobroff | 9ed5ca6 | 2018-11-29 14:16:39 +1100 | [diff] [blame] | 573 | * eeh_pe_state_clear - Clear state for the PE |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 574 | * @data: EEH PE |
Sam Bobroff | 9ed5ca6 | 2018-11-29 14:16:39 +1100 | [diff] [blame] | 575 | * @state: state |
| 576 | * @include_passed: include passed-through devices? |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 577 | * |
| 578 | * The function is used to clear the indicated state from the |
| 579 | * given PE. Besides, we also clear the check count of the PE |
| 580 | * as well. |
| 581 | */ |
Sam Bobroff | 9ed5ca6 | 2018-11-29 14:16:39 +1100 | [diff] [blame] | 582 | void eeh_pe_state_clear(struct eeh_pe *root, int state, bool include_passed) |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 583 | { |
Sam Bobroff | 9ed5ca6 | 2018-11-29 14:16:39 +1100 | [diff] [blame] | 584 | struct eeh_pe *pe; |
Gavin Shan | 22fca179 | 2014-09-30 12:38:59 +1000 | [diff] [blame] | 585 | struct eeh_dev *edev, *tmp; |
| 586 | struct pci_dev *pdev; |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 587 | |
Sam Bobroff | 9ed5ca6 | 2018-11-29 14:16:39 +1100 | [diff] [blame] | 588 | eeh_for_each_pe(root, pe) { |
| 589 | /* Keep the state of permanently removed PE intact */ |
| 590 | if (pe->state & EEH_PE_REMOVED) |
Gavin Shan | 22fca179 | 2014-09-30 12:38:59 +1000 | [diff] [blame] | 591 | continue; |
| 592 | |
Sam Bobroff | 9ed5ca6 | 2018-11-29 14:16:39 +1100 | [diff] [blame] | 593 | if (!include_passed && eeh_pe_passed(pe)) |
| 594 | continue; |
| 595 | |
| 596 | pe->state &= ~state; |
| 597 | |
| 598 | /* |
| 599 | * Special treatment on clearing isolated state. Clear |
| 600 | * check count since last isolation and put all affected |
| 601 | * devices to normal state. |
| 602 | */ |
| 603 | if (!(state & EEH_PE_ISOLATED)) |
| 604 | continue; |
| 605 | |
| 606 | pe->check_count = 0; |
| 607 | eeh_pe_for_each_dev(pe, edev, tmp) { |
| 608 | pdev = eeh_dev_to_pci_dev(edev); |
| 609 | if (!pdev) |
| 610 | continue; |
| 611 | |
| 612 | pdev->error_state = pci_channel_io_normal; |
| 613 | } |
| 614 | |
| 615 | /* Unblock PCI config access if required */ |
| 616 | if (pe->state & EEH_PE_CFG_RESTRICTED) |
| 617 | pe->state &= ~EEH_PE_CFG_BLOCKED; |
Gavin Shan | 22fca179 | 2014-09-30 12:38:59 +1000 | [diff] [blame] | 618 | } |
Gavin Shan | 5b66352 | 2012-09-07 22:44:12 +0000 | [diff] [blame] | 619 | } |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 620 | |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 621 | /* |
| 622 | * Some PCI bridges (e.g. PLX bridges) have primary/secondary |
| 623 | * buses assigned explicitly by firmware, and we probably have |
| 624 | * lost that after reset. So we have to delay the check until |
| 625 | * the PCI-CFG registers have been restored for the parent |
| 626 | * bridge. |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 627 | * |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 628 | * Don't use normal PCI-CFG accessors, which probably has been |
| 629 | * blocked on normal path during the stage. So we need utilize |
| 630 | * eeh operations, which is always permitted. |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 631 | */ |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 632 | static void eeh_bridge_check_link(struct eeh_dev *edev) |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 633 | { |
| 634 | int cap; |
| 635 | uint32_t val; |
| 636 | int timeout = 0; |
| 637 | |
| 638 | /* |
| 639 | * We only check root port and downstream ports of |
| 640 | * PCIe switches |
| 641 | */ |
Gavin Shan | 4b83bd4 | 2013-07-24 10:24:59 +0800 | [diff] [blame] | 642 | if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT))) |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 643 | return; |
| 644 | |
Sam Bobroff | 1ff8f36 | 2019-08-16 14:48:13 +1000 | [diff] [blame] | 645 | eeh_edev_dbg(edev, "Checking PCIe link...\n"); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 646 | |
| 647 | /* Check slot status */ |
Gavin Shan | 4b83bd4 | 2013-07-24 10:24:59 +0800 | [diff] [blame] | 648 | cap = edev->pcie_cap; |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 649 | eeh_ops->read_config(edev, cap + PCI_EXP_SLTSTA, 2, &val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 650 | if (!(val & PCI_EXP_SLTSTA_PDS)) { |
Sam Bobroff | 1ff8f36 | 2019-08-16 14:48:13 +1000 | [diff] [blame] | 651 | eeh_edev_dbg(edev, "No card in the slot (0x%04x) !\n", val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 652 | return; |
| 653 | } |
| 654 | |
| 655 | /* Check power status if we have the capability */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 656 | eeh_ops->read_config(edev, cap + PCI_EXP_SLTCAP, 2, &val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 657 | if (val & PCI_EXP_SLTCAP_PCP) { |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 658 | eeh_ops->read_config(edev, cap + PCI_EXP_SLTCTL, 2, &val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 659 | if (val & PCI_EXP_SLTCTL_PCC) { |
Sam Bobroff | 1ff8f36 | 2019-08-16 14:48:13 +1000 | [diff] [blame] | 660 | eeh_edev_dbg(edev, "In power-off state, power it on ...\n"); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 661 | val &= ~(PCI_EXP_SLTCTL_PCC | PCI_EXP_SLTCTL_PIC); |
| 662 | val |= (0x0100 & PCI_EXP_SLTCTL_PIC); |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 663 | eeh_ops->write_config(edev, cap + PCI_EXP_SLTCTL, 2, val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 664 | msleep(2 * 1000); |
| 665 | } |
| 666 | } |
| 667 | |
| 668 | /* Enable link */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 669 | eeh_ops->read_config(edev, cap + PCI_EXP_LNKCTL, 2, &val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 670 | val &= ~PCI_EXP_LNKCTL_LD; |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 671 | eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 672 | |
| 673 | /* Check link */ |
Maciej W. Rozycki | 1541a21 | 2023-06-11 18:19:32 +0100 | [diff] [blame] | 674 | if (!edev->pdev->link_active_reporting) { |
| 675 | eeh_edev_dbg(edev, "No link reporting capability\n"); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 676 | msleep(1000); |
| 677 | return; |
| 678 | } |
| 679 | |
| 680 | /* Wait the link is up until timeout (5s) */ |
| 681 | timeout = 0; |
| 682 | while (timeout < 5000) { |
| 683 | msleep(20); |
| 684 | timeout += 20; |
| 685 | |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 686 | eeh_ops->read_config(edev, cap + PCI_EXP_LNKSTA, 2, &val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 687 | if (val & PCI_EXP_LNKSTA_DLLLA) |
| 688 | break; |
| 689 | } |
| 690 | |
| 691 | if (val & PCI_EXP_LNKSTA_DLLLA) |
Sam Bobroff | 1ff8f36 | 2019-08-16 14:48:13 +1000 | [diff] [blame] | 692 | eeh_edev_dbg(edev, "Link up (%s)\n", |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 693 | (val & PCI_EXP_LNKSTA_CLS_2_5GB) ? "2.5GB" : "5GB"); |
| 694 | else |
Sam Bobroff | 1ff8f36 | 2019-08-16 14:48:13 +1000 | [diff] [blame] | 695 | eeh_edev_dbg(edev, "Link not ready (0x%04x)\n", val); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 696 | } |
| 697 | |
| 698 | #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF)) |
| 699 | #define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)]) |
| 700 | |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 701 | static void eeh_restore_bridge_bars(struct eeh_dev *edev) |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 702 | { |
| 703 | int i; |
| 704 | |
| 705 | /* |
| 706 | * Device BARs: 0x10 - 0x18 |
| 707 | * Bus numbers and windows: 0x18 - 0x30 |
| 708 | */ |
| 709 | for (i = 4; i < 13; i++) |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 710 | eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 711 | /* Rom: 0x38 */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 712 | eeh_ops->write_config(edev, 14*4, 4, edev->config_space[14]); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 713 | |
| 714 | /* Cache line & Latency timer: 0xC 0xD */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 715 | eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1, |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 716 | SAVED_BYTE(PCI_CACHE_LINE_SIZE)); |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 717 | eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1, |
| 718 | SAVED_BYTE(PCI_LATENCY_TIMER)); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 719 | /* Max latency, min grant, interrupt ping and line: 0x3C */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 720 | eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 721 | |
| 722 | /* PCI Command: 0x4 */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 723 | eeh_ops->write_config(edev, PCI_COMMAND, 4, edev->config_space[1] | |
Michael Neuling | 13a83ea | 2018-04-11 13:37:58 +1000 | [diff] [blame] | 724 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 725 | |
| 726 | /* Check the PCIe link is ready */ |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 727 | eeh_bridge_check_link(edev); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 728 | } |
| 729 | |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 730 | static void eeh_restore_device_bars(struct eeh_dev *edev) |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 731 | { |
| 732 | int i; |
| 733 | u32 cmd; |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 734 | |
| 735 | for (i = 4; i < 10; i++) |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 736 | eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]); |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 737 | /* 12 == Expansion ROM Address */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 738 | eeh_ops->write_config(edev, 12*4, 4, edev->config_space[12]); |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 739 | |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 740 | eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1, |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 741 | SAVED_BYTE(PCI_CACHE_LINE_SIZE)); |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 742 | eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1, |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 743 | SAVED_BYTE(PCI_LATENCY_TIMER)); |
| 744 | |
| 745 | /* max latency, min grant, interrupt pin and line */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 746 | eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]); |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 747 | |
| 748 | /* |
| 749 | * Restore PERR & SERR bits, some devices require it, |
| 750 | * don't touch the other command bits |
| 751 | */ |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 752 | eeh_ops->read_config(edev, PCI_COMMAND, 4, &cmd); |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 753 | if (edev->config_space[1] & PCI_COMMAND_PARITY) |
| 754 | cmd |= PCI_COMMAND_PARITY; |
| 755 | else |
| 756 | cmd &= ~PCI_COMMAND_PARITY; |
| 757 | if (edev->config_space[1] & PCI_COMMAND_SERR) |
| 758 | cmd |= PCI_COMMAND_SERR; |
| 759 | else |
| 760 | cmd &= ~PCI_COMMAND_SERR; |
Oliver O'Halloran | 17d2a48 | 2020-07-25 18:12:26 +1000 | [diff] [blame] | 761 | eeh_ops->write_config(edev, PCI_COMMAND, 4, cmd); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 762 | } |
| 763 | |
| 764 | /** |
| 765 | * eeh_restore_one_device_bars - Restore the Base Address Registers for one device |
| 766 | * @data: EEH device |
| 767 | * @flag: Unused |
| 768 | * |
| 769 | * Loads the PCI configuration space base address registers, |
| 770 | * the expansion ROM base address, the latency timer, and etc. |
| 771 | * from the saved values in the device node. |
| 772 | */ |
Sam Bobroff | cef50c6 | 2019-08-16 14:48:15 +1000 | [diff] [blame] | 773 | static void eeh_restore_one_device_bars(struct eeh_dev *edev, void *flag) |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 774 | { |
Gavin Shan | f5c5771 | 2013-07-24 10:24:58 +0800 | [diff] [blame] | 775 | /* Do special restore for bridges */ |
Gavin Shan | 4b83bd4 | 2013-07-24 10:24:59 +0800 | [diff] [blame] | 776 | if (edev->mode & EEH_DEV_BRIDGE) |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 777 | eeh_restore_bridge_bars(edev); |
Gavin Shan | 652defe | 2013-06-27 13:46:43 +0800 | [diff] [blame] | 778 | else |
Gavin Shan | 0bd7858 | 2015-03-17 16:15:07 +1100 | [diff] [blame] | 779 | eeh_restore_device_bars(edev); |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 780 | |
Oliver O'Halloran | 0c2c765 | 2020-07-25 18:12:24 +1000 | [diff] [blame] | 781 | if (eeh_ops->restore_config) |
| 782 | eeh_ops->restore_config(edev); |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 783 | } |
| 784 | |
| 785 | /** |
| 786 | * eeh_pe_restore_bars - Restore the PCI config space info |
| 787 | * @pe: EEH PE |
| 788 | * |
| 789 | * This routine performs a recursive walk to the children |
| 790 | * of this device as well. |
| 791 | */ |
| 792 | void eeh_pe_restore_bars(struct eeh_pe *pe) |
| 793 | { |
Gavin Shan | ea81245 | 2012-09-11 19:16:18 +0000 | [diff] [blame] | 794 | /* |
| 795 | * We needn't take the EEH lock since eeh_pe_dev_traverse() |
| 796 | * will take that. |
| 797 | */ |
Gavin Shan | 9e6d2cf | 2012-09-07 22:44:15 +0000 | [diff] [blame] | 798 | eeh_pe_dev_traverse(pe, eeh_restore_one_device_bars, NULL); |
| 799 | } |
Gavin Shan | 9b3c76f | 2012-09-07 22:44:19 +0000 | [diff] [blame] | 800 | |
| 801 | /** |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 802 | * eeh_pe_loc_get - Retrieve location code binding to the given PE |
| 803 | * @pe: EEH PE |
| 804 | * |
| 805 | * Retrieve the location code of the given PE. If the primary PE bus |
| 806 | * is root bus, we will grab location code from PHB device tree node |
| 807 | * or root port. Otherwise, the upstream bridge's device tree node |
| 808 | * of the primary PE bus will be checked for the location code. |
| 809 | */ |
| 810 | const char *eeh_pe_loc_get(struct eeh_pe *pe) |
| 811 | { |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 812 | struct pci_bus *bus = eeh_pe_bus_get(pe); |
Gavin Shan | 7e56f62 | 2015-12-02 16:25:32 +1100 | [diff] [blame] | 813 | struct device_node *dn; |
Mike Qiu | 9e5c6e5 | 2014-07-15 01:42:22 -0400 | [diff] [blame] | 814 | const char *loc = NULL; |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 815 | |
Gavin Shan | 7e56f62 | 2015-12-02 16:25:32 +1100 | [diff] [blame] | 816 | while (bus) { |
| 817 | dn = pci_bus_to_OF_node(bus); |
| 818 | if (!dn) { |
| 819 | bus = bus->parent; |
| 820 | continue; |
| 821 | } |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 822 | |
Gavin Shan | 7e56f62 | 2015-12-02 16:25:32 +1100 | [diff] [blame] | 823 | if (pci_is_root_bus(bus)) |
Mike Qiu | 9e5c6e5 | 2014-07-15 01:42:22 -0400 | [diff] [blame] | 824 | loc = of_get_property(dn, "ibm,io-base-loc-code", NULL); |
Gavin Shan | 7e56f62 | 2015-12-02 16:25:32 +1100 | [diff] [blame] | 825 | else |
| 826 | loc = of_get_property(dn, "ibm,slot-location-code", |
| 827 | NULL); |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 828 | |
Gavin Shan | 7e56f62 | 2015-12-02 16:25:32 +1100 | [diff] [blame] | 829 | if (loc) |
| 830 | return loc; |
| 831 | |
| 832 | bus = bus->parent; |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 833 | } |
| 834 | |
Gavin Shan | 7e56f62 | 2015-12-02 16:25:32 +1100 | [diff] [blame] | 835 | return "N/A"; |
Gavin Shan | 357b2f3 | 2014-06-11 18:26:44 +1000 | [diff] [blame] | 836 | } |
| 837 | |
| 838 | /** |
Gavin Shan | 9b3c76f | 2012-09-07 22:44:19 +0000 | [diff] [blame] | 839 | * eeh_pe_bus_get - Retrieve PCI bus according to the given PE |
| 840 | * @pe: EEH PE |
| 841 | * |
| 842 | * Retrieve the PCI bus according to the given PE. Basically, |
| 843 | * there're 3 types of PEs: PHB/Bus/Device. For PHB PE, the |
| 844 | * primary PCI bus will be retrieved. The parent bus will be |
| 845 | * returned for BUS PE. However, we don't have associated PCI |
| 846 | * bus for DEVICE PE. |
| 847 | */ |
| 848 | struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe) |
| 849 | { |
Gavin Shan | 9b3c76f | 2012-09-07 22:44:19 +0000 | [diff] [blame] | 850 | struct eeh_dev *edev; |
| 851 | struct pci_dev *pdev; |
| 852 | |
Gavin Shan | 4eb0799 | 2016-02-09 15:50:23 +1100 | [diff] [blame] | 853 | if (pe->type & EEH_PE_PHB) |
| 854 | return pe->phb->bus; |
Gavin Shan | 8cdb283 | 2013-06-20 13:20:55 +0800 | [diff] [blame] | 855 | |
Gavin Shan | 4eb0799 | 2016-02-09 15:50:23 +1100 | [diff] [blame] | 856 | /* The primary bus might be cached during probe time */ |
| 857 | if (pe->state & EEH_PE_PRI_BUS) |
| 858 | return pe->bus; |
Gavin Shan | 9b3c76f | 2012-09-07 22:44:19 +0000 | [diff] [blame] | 859 | |
Gavin Shan | 4eb0799 | 2016-02-09 15:50:23 +1100 | [diff] [blame] | 860 | /* Retrieve the parent PCI bus of first (top) PCI device */ |
Sam Bobroff | 80e65b0 | 2018-09-12 11:23:26 +1000 | [diff] [blame] | 861 | edev = list_first_entry_or_null(&pe->edevs, struct eeh_dev, entry); |
Gavin Shan | 4eb0799 | 2016-02-09 15:50:23 +1100 | [diff] [blame] | 862 | pdev = eeh_dev_to_pci_dev(edev); |
| 863 | if (pdev) |
| 864 | return pdev->bus; |
| 865 | |
| 866 | return NULL; |
Gavin Shan | 9b3c76f | 2012-09-07 22:44:19 +0000 | [diff] [blame] | 867 | } |