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Bjorn Helgaas8cfab3c2018-01-26 12:50:27 -06001// SPDX-License-Identifier: GPL-2.0
Rob Herringb7e78172015-01-28 10:16:18 -06002/*
3 * Copyright 2004 Koninklijke Philips Electronics NV
4 *
5 * Conversion to platform driver and DT:
6 * Copyright 2014 Linaro Ltd.
7 *
Rob Herringb7e78172015-01-28 10:16:18 -06008 * 14/04/2005 Initial version, colin.king@philips.com
9 */
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/of_address.h>
13#include <linux/of_pci.h>
14#include <linux/of_platform.h>
15#include <linux/pci.h>
16#include <linux/platform_device.h>
17
Bjorn Helgaasf03c7aa2018-06-06 16:10:27 -050018#include "../pci.h"
19
Rob Herringb7e78172015-01-28 10:16:18 -060020static void __iomem *versatile_pci_base;
21static void __iomem *versatile_cfg_base[2];
22
23#define PCI_IMAP(m) (versatile_pci_base + ((m) * 4))
24#define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4))
25#define PCI_SELFID (versatile_pci_base + 0xc)
26
27#define VP_PCI_DEVICE_ID 0x030010ee
28#define VP_PCI_CLASS_ID 0x0b400000
29
30static u32 pci_slot_ignore;
31
32static int __init versatile_pci_slot_ignore(char *str)
33{
34 int retval;
35 int slot;
36
37 while ((retval = get_option(&str, &slot))) {
38 if ((slot < 0) || (slot > 31))
39 pr_err("Illegal slot value: %d\n", slot);
40 else
41 pci_slot_ignore |= (1 << slot);
42 }
43 return 1;
44}
45__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
46
47
48static void __iomem *versatile_map_bus(struct pci_bus *bus,
49 unsigned int devfn, int offset)
50{
51 unsigned int busnr = bus->number;
52
53 if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
54 return NULL;
55
56 return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
57}
58
59static struct pci_ops pci_versatile_ops = {
60 .map_bus = versatile_map_bus,
61 .read = pci_generic_config_read32,
62 .write = pci_generic_config_write,
63};
64
65static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
66 struct list_head *res)
67{
68 int err, mem = 1, res_valid = 0;
Rob Herringb7e78172015-01-28 10:16:18 -060069 resource_size_t iobase;
Lorenzo Pieralisi53f4f7e2016-08-15 17:50:43 +010070 struct resource_entry *win, *tmp;
Rob Herringb7e78172015-01-28 10:16:18 -060071
Jan Kiszka5bd51b32018-05-15 11:07:05 +020072 err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, res, &iobase);
Rob Herringb7e78172015-01-28 10:16:18 -060073 if (err)
74 return err;
75
Bjorn Helgaas2fbb3532016-05-31 12:09:28 -050076 err = devm_request_pci_bus_resources(dev, res);
77 if (err)
78 goto out_release_res;
79
Lorenzo Pieralisi53f4f7e2016-08-15 17:50:43 +010080 resource_list_for_each_entry_safe(win, tmp, res) {
Bjorn Helgaas2fbb3532016-05-31 12:09:28 -050081 struct resource *res = win->res;
Rob Herringb7e78172015-01-28 10:16:18 -060082
83 switch (resource_type(res)) {
84 case IORESOURCE_IO:
Rob Herringb7e78172015-01-28 10:16:18 -060085 err = pci_remap_iospace(res, iobase);
Lorenzo Pieralisi53f4f7e2016-08-15 17:50:43 +010086 if (err) {
Rob Herringb7e78172015-01-28 10:16:18 -060087 dev_warn(dev, "error %d: failed to map resource %pR\n",
88 err, res);
Lorenzo Pieralisi53f4f7e2016-08-15 17:50:43 +010089 resource_list_destroy_entry(win);
90 }
Rob Herringb7e78172015-01-28 10:16:18 -060091 break;
92 case IORESOURCE_MEM:
Rob Herringb7e78172015-01-28 10:16:18 -060093 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
94
95 writel(res->start >> 28, PCI_IMAP(mem));
96 writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
97 mem++;
98
99 break;
Rob Herringb7e78172015-01-28 10:16:18 -0600100 }
Rob Herringb7e78172015-01-28 10:16:18 -0600101 }
102
Bjorn Helgaasda6163a2016-05-28 18:31:26 -0500103 if (res_valid)
104 return 0;
Rob Herringb7e78172015-01-28 10:16:18 -0600105
Bjorn Helgaasda6163a2016-05-28 18:31:26 -0500106 dev_err(dev, "non-prefetchable memory resource required\n");
107 err = -EINVAL;
Rob Herringb7e78172015-01-28 10:16:18 -0600108
109out_release_res:
110 pci_free_resource_list(res);
111 return err;
112}
113
Rob Herringb7e78172015-01-28 10:16:18 -0600114static int versatile_pci_probe(struct platform_device *pdev)
115{
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500116 struct device *dev = &pdev->dev;
Rob Herringb7e78172015-01-28 10:16:18 -0600117 struct resource *res;
118 int ret, i, myslot = -1;
119 u32 val;
120 void __iomem *local_pci_cfg_base;
Bjorn Helgaas70bc1b62017-02-08 15:42:26 -0600121 struct pci_bus *bus, *child;
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500122 struct pci_host_bridge *bridge;
Rob Herringb7e78172015-01-28 10:16:18 -0600123 LIST_HEAD(pci_res);
124
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500125 bridge = devm_pci_alloc_host_bridge(dev, 0);
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500126 if (!bridge)
127 return -ENOMEM;
128
Rob Herringb7e78172015-01-28 10:16:18 -0600129 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500130 versatile_pci_base = devm_ioremap_resource(dev, res);
Jisheng Zhang87358162015-04-03 21:17:05 +0800131 if (IS_ERR(versatile_pci_base))
132 return PTR_ERR(versatile_pci_base);
Rob Herringb7e78172015-01-28 10:16:18 -0600133
134 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500135 versatile_cfg_base[0] = devm_ioremap_resource(dev, res);
Jisheng Zhang87358162015-04-03 21:17:05 +0800136 if (IS_ERR(versatile_cfg_base[0]))
137 return PTR_ERR(versatile_cfg_base[0]);
Rob Herringb7e78172015-01-28 10:16:18 -0600138
139 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500140 versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
Jisheng Zhang87358162015-04-03 21:17:05 +0800141 if (IS_ERR(versatile_cfg_base[1]))
142 return PTR_ERR(versatile_cfg_base[1]);
Rob Herringb7e78172015-01-28 10:16:18 -0600143
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500144 ret = versatile_pci_parse_request_of_pci_ranges(dev, &pci_res);
Rob Herringb7e78172015-01-28 10:16:18 -0600145 if (ret)
146 return ret;
147
148 /*
149 * We need to discover the PCI core first to configure itself
150 * before the main PCI probing is performed
151 */
152 for (i = 0; i < 32; i++) {
153 if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
154 (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
155 myslot = i;
156 break;
157 }
158 }
159 if (myslot == -1) {
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500160 dev_err(dev, "Cannot find PCI core!\n");
Rob Herringb7e78172015-01-28 10:16:18 -0600161 return -EIO;
162 }
163 /*
164 * Do not to map Versatile FPGA PCI device into memory space
165 */
166 pci_slot_ignore |= (1 << myslot);
167
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500168 dev_info(dev, "PCI core found (slot %d)\n", myslot);
Rob Herringb7e78172015-01-28 10:16:18 -0600169
170 writel(myslot, PCI_SELFID);
171 local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
172
173 val = readl(local_pci_cfg_base + PCI_COMMAND);
174 val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
175 writel(val, local_pci_cfg_base + PCI_COMMAND);
176
177 /*
178 * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
179 */
180 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
181 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
182 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
183
184 /*
185 * For many years the kernel and QEMU were symbiotically buggy
186 * in that they both assumed the same broken IRQ mapping.
187 * QEMU therefore attempts to auto-detect old broken kernels
188 * so that they still work on newer QEMU as they did on old
189 * QEMU. Since we now use the correct (ie matching-hardware)
190 * IRQ mapping we write a definitely different value to a
191 * PCI_INTERRUPT_LINE register to tell QEMU that we expect
192 * real hardware behaviour and it need not be backwards
193 * compatible for us. This write is harmless on real hardware.
194 */
195 writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
196
197 pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
Bjorn Helgaas71538842017-11-30 11:21:57 -0600198 pci_add_flags(PCI_REASSIGN_ALL_BUS);
Rob Herringb7e78172015-01-28 10:16:18 -0600199
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500200 list_splice_init(&pci_res, &bridge->windows);
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500201 bridge->dev.parent = dev;
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500202 bridge->sysdata = NULL;
203 bridge->busnr = 0;
204 bridge->ops = &pci_versatile_ops;
Lorenzo Pieralisicf603742017-06-28 15:14:09 -0500205 bridge->map_irq = of_irq_parse_and_map_pci;
206 bridge->swizzle_irq = pci_common_swizzle;
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500207
208 ret = pci_scan_root_bus_bridge(bridge);
209 if (ret < 0)
210 return ret;
211
212 bus = bridge->bus;
Rob Herringb7e78172015-01-28 10:16:18 -0600213
Rob Herringb7e78172015-01-28 10:16:18 -0600214 pci_assign_unassigned_bus_resources(bus);
Bjorn Helgaas70bc1b62017-02-08 15:42:26 -0600215 list_for_each_entry(child, &bus->children, node)
216 pcie_bus_configure_settings(child);
Yijing Wangb97ea282015-03-16 11:18:56 +0800217 pci_bus_add_devices(bus);
Rob Herringb7e78172015-01-28 10:16:18 -0600218
219 return 0;
220}
221
222static const struct of_device_id versatile_pci_of_match[] = {
223 { .compatible = "arm,versatile-pci", },
224 { },
225};
226MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
227
228static struct platform_driver versatile_pci_driver = {
229 .driver = {
230 .name = "versatile-pci",
231 .of_match_table = versatile_pci_of_match,
Brian Norrisa5f40e802017-04-20 15:36:25 -0500232 .suppress_bind_attrs = true,
Rob Herringb7e78172015-01-28 10:16:18 -0600233 },
234 .probe = versatile_pci_probe,
235};
236module_platform_driver(versatile_pci_driver);
237
238MODULE_DESCRIPTION("Versatile PCI driver");
239MODULE_LICENSE("GPL v2");