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Marc Dietrich162c7d82011-09-27 19:00:40 +02001/*
2 * NVEC: NVIDIA compliant embedded controller interface
3 *
4 * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net>
5 *
6 * Authors: Pierre-Hugues Husson <phhusson@free.fr>
7 * Ilya Petrov <ilya.muromec@gmail.com>
8 * Marc Dietrich <marvin24@gmx.de>
Julian Andres Klode791c4a62011-09-27 19:00:53 +02009 * Julian Andres Klode <jak@jak-linux.org>
Marc Dietrich162c7d82011-09-27 19:00:40 +020010 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
Marc Dietrich32890b92011-05-19 16:34:42 +020016
Marc Dietrich162c7d82011-09-27 19:00:40 +020017/* #define DEBUG */
Marc Dietrich32890b92011-05-19 16:34:42 +020018
Julian Andres Klode12b5a552011-09-27 19:01:06 +020019#include <linux/kernel.h>
Julian Andres Klode0b1076c2011-09-27 19:00:48 +020020#include <linux/atomic.h>
Julian Andres Klode12b5a552011-09-27 19:01:06 +020021#include <linux/clk.h>
Marc Dietrich32890b92011-05-19 16:34:42 +020022#include <linux/completion.h>
Julian Andres Klode12b5a552011-09-27 19:01:06 +020023#include <linux/delay.h>
24#include <linux/err.h>
25#include <linux/gpio.h>
Marc Dietrich32890b92011-05-19 16:34:42 +020026#include <linux/interrupt.h>
Marc Dietrich162c7d82011-09-27 19:00:40 +020027#include <linux/io.h>
Marc Dietrich32890b92011-05-19 16:34:42 +020028#include <linux/irq.h>
Marc Dietrich32890b92011-05-19 16:34:42 +020029#include <linux/list.h>
Julian Andres Klode12b5a552011-09-27 19:01:06 +020030#include <linux/mfd/core.h>
31#include <linux/mutex.h>
Marc Dietrich32890b92011-05-19 16:34:42 +020032#include <linux/notifier.h>
Marc Dietrich32890b92011-05-19 16:34:42 +020033#include <linux/platform_device.h>
Julian Andres Klode12b5a552011-09-27 19:01:06 +020034#include <linux/slab.h>
35#include <linux/spinlock.h>
36#include <linux/workqueue.h>
Marc Dietrich162c7d82011-09-27 19:00:40 +020037
Marc Dietrich162c7d82011-09-27 19:00:40 +020038#include <mach/clk.h>
Julian Andres Klode12b5a552011-09-27 19:01:06 +020039#include <mach/iomap.h>
Marc Dietrich162c7d82011-09-27 19:00:40 +020040
Marc Dietrich32890b92011-05-19 16:34:42 +020041#include "nvec.h"
42
Julian Andres Klode391d2fa2011-09-27 19:00:57 +020043#define I2C_CNFG 0x00
44#define I2C_CNFG_PACKET_MODE_EN (1<<10)
45#define I2C_CNFG_NEW_MASTER_SFM (1<<11)
46#define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12
47
48#define I2C_SL_CNFG 0x20
49#define I2C_SL_NEWL (1<<2)
50#define I2C_SL_NACK (1<<1)
51#define I2C_SL_RESP (1<<0)
52#define I2C_SL_IRQ (1<<3)
53#define END_TRANS (1<<4)
54#define RCVD (1<<2)
55#define RNW (1<<1)
56
57#define I2C_SL_RCVD 0x24
58#define I2C_SL_STATUS 0x28
59#define I2C_SL_ADDR1 0x2c
60#define I2C_SL_ADDR2 0x30
61#define I2C_SL_DELAY_COUNT 0x3c
62
Julian Andres Klodebb0590e2011-09-27 19:00:59 +020063/**
64 * enum nvec_msg_category - Message categories for nvec_msg_alloc()
65 * @NVEC_MSG_RX: The message is an incoming message (from EC)
66 * @NVEC_MSG_TX: The message is an outgoing message (to EC)
67 */
68enum nvec_msg_category {
69 NVEC_MSG_RX,
70 NVEC_MSG_TX,
71};
72
Marc Dietrich162c7d82011-09-27 19:00:40 +020073static const unsigned char EC_DISABLE_EVENT_REPORTING[3] = "\x04\x00\x00";
74static const unsigned char EC_ENABLE_EVENT_REPORTING[3] = "\x04\x00\x01";
75static const unsigned char EC_GET_FIRMWARE_VERSION[2] = "\x07\x15";
Marc Dietrich32890b92011-05-19 16:34:42 +020076
77static struct nvec_chip *nvec_power_handle;
78
Marc Dietrichf686e9a2011-08-24 20:23:07 +020079static struct mfd_cell nvec_devices[] = {
80 {
Marc Dietrich162c7d82011-09-27 19:00:40 +020081 .name = "nvec-kbd",
82 .id = 1,
Marc Dietrichf686e9a2011-08-24 20:23:07 +020083 },
84 {
Marc Dietrich162c7d82011-09-27 19:00:40 +020085 .name = "nvec-mouse",
86 .id = 1,
Marc Dietrichf686e9a2011-08-24 20:23:07 +020087 },
88 {
Marc Dietrich162c7d82011-09-27 19:00:40 +020089 .name = "nvec-power",
90 .id = 1,
Marc Dietrichf686e9a2011-08-24 20:23:07 +020091 },
92 {
Marc Dietrich162c7d82011-09-27 19:00:40 +020093 .name = "nvec-power",
94 .id = 2,
Marc Dietrichf686e9a2011-08-24 20:23:07 +020095 },
Ilya Petrov97cc2652011-09-27 19:00:44 +020096 {
97 .name = "nvec-leds",
98 .id = 1,
99 },
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200100};
101
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200102/**
103 * nvec_register_notifier - Register a notifier with nvec
104 * @nvec: A &struct nvec_chip
105 * @nb: The notifier block to register
106 *
107 * Registers a notifier with @nvec. The notifier will be added to an atomic
108 * notifier chain that is called for all received messages except those that
109 * correspond to a request initiated by nvec_write_sync().
110 */
Marc Dietrich32890b92011-05-19 16:34:42 +0200111int nvec_register_notifier(struct nvec_chip *nvec, struct notifier_block *nb,
Marc Dietrich162c7d82011-09-27 19:00:40 +0200112 unsigned int events)
Marc Dietrich32890b92011-05-19 16:34:42 +0200113{
114 return atomic_notifier_chain_register(&nvec->notifier_list, nb);
115}
116EXPORT_SYMBOL_GPL(nvec_register_notifier);
117
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200118/**
119 * nvec_status_notifier - The final notifier
120 *
121 * Prints a message about control events not handled in the notifier
122 * chain.
123 */
Marc Dietrich162c7d82011-09-27 19:00:40 +0200124static int nvec_status_notifier(struct notifier_block *nb,
125 unsigned long event_type, void *data)
Marc Dietrich32890b92011-05-19 16:34:42 +0200126{
127 unsigned char *msg = (unsigned char *)data;
Marc Dietrich32890b92011-05-19 16:34:42 +0200128
Marc Dietrich162c7d82011-09-27 19:00:40 +0200129 if (event_type != NVEC_CNTL)
Marc Dietrich32890b92011-05-19 16:34:42 +0200130 return NOTIFY_DONE;
131
Marc Dietricha3a9aa12011-09-27 19:00:41 +0200132 printk(KERN_WARNING "unhandled msg type %ld\n", event_type);
133 print_hex_dump(KERN_WARNING, "payload: ", DUMP_PREFIX_NONE, 16, 1,
134 msg, msg[1] + 2, true);
Marc Dietrich32890b92011-05-19 16:34:42 +0200135
136 return NOTIFY_OK;
137}
138
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200139/**
140 * nvec_msg_alloc:
141 * @nvec: A &struct nvec_chip
Julian Andres Klodebb0590e2011-09-27 19:00:59 +0200142 * @category: Pool category, see &enum nvec_msg_category
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200143 *
144 * Allocate a single &struct nvec_msg object from the message pool of
145 * @nvec. The result shall be passed to nvec_msg_free() if no longer
146 * used.
Julian Andres Klodebb0590e2011-09-27 19:00:59 +0200147 *
148 * Outgoing messages are placed in the upper 75% of the pool, keeping the
149 * lower 25% available for RX buffers only. The reason is to prevent a
150 * situation where all buffers are full and a message is thus endlessly
151 * retried because the response could never be processed.
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200152 */
Julian Andres Klodebb0590e2011-09-27 19:00:59 +0200153static struct nvec_msg *nvec_msg_alloc(struct nvec_chip *nvec,
154 enum nvec_msg_category category)
Julian Andres Klode0b1076c2011-09-27 19:00:48 +0200155{
Julian Andres Klodebb0590e2011-09-27 19:00:59 +0200156 int i = (category == NVEC_MSG_TX) ? (NVEC_POOL_SIZE / 4) : 0;
Julian Andres Klode0b1076c2011-09-27 19:00:48 +0200157
Julian Andres Klodebb0590e2011-09-27 19:00:59 +0200158 for (; i < NVEC_POOL_SIZE; i++) {
Julian Andres Klode0b1076c2011-09-27 19:00:48 +0200159 if (atomic_xchg(&nvec->msg_pool[i].used, 1) == 0) {
160 dev_vdbg(nvec->dev, "INFO: Allocate %i\n", i);
161 return &nvec->msg_pool[i];
162 }
163 }
164
Julian Andres Klodebb0590e2011-09-27 19:00:59 +0200165 dev_err(nvec->dev, "could not allocate %s buffer\n",
166 (category == NVEC_MSG_TX) ? "TX" : "RX");
Julian Andres Klode0b1076c2011-09-27 19:00:48 +0200167
168 return NULL;
169}
170
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200171/**
172 * nvec_msg_free:
173 * @nvec: A &struct nvec_chip
174 * @msg: A message (must be allocated by nvec_msg_alloc() and belong to @nvec)
175 *
176 * Free the given message
177 */
Julian Andres Klode198dd262011-09-27 19:00:58 +0200178inline void nvec_msg_free(struct nvec_chip *nvec, struct nvec_msg *msg)
Julian Andres Klode0b1076c2011-09-27 19:00:48 +0200179{
Julian Andres Klode7b770652011-09-27 19:00:52 +0200180 if (msg != &nvec->tx_scratch)
181 dev_vdbg(nvec->dev, "INFO: Free %ti\n", msg - nvec->msg_pool);
Julian Andres Klode0b1076c2011-09-27 19:00:48 +0200182 atomic_set(&msg->used, 0);
183}
Julian Andres Klode198dd262011-09-27 19:00:58 +0200184EXPORT_SYMBOL_GPL(nvec_msg_free);
Julian Andres Klode0b1076c2011-09-27 19:00:48 +0200185
Julian Andres Klode8517e872011-09-27 19:00:50 +0200186/**
187 * nvec_msg_is_event - Return %true if @msg is an event
188 * @msg: A message
189 */
190static bool nvec_msg_is_event(struct nvec_msg *msg)
191{
192 return msg->data[0] >> 7;
193}
194
195/**
196 * nvec_msg_size - Get the size of a message
197 * @msg: The message to get the size for
198 *
199 * This only works for received messages, not for outgoing messages.
200 */
201static size_t nvec_msg_size(struct nvec_msg *msg)
202{
203 bool is_event = nvec_msg_is_event(msg);
204 int event_length = (msg->data[0] & 0x60) >> 5;
205
206 /* for variable size, payload size in byte 1 + count (1) + cmd (1) */
207 if (!is_event || event_length == NVEC_VAR_SIZE)
208 return (msg->pos || msg->size) ? (msg->data[1] + 2) : 0;
209 else if (event_length == NVEC_2BYTES)
210 return 2;
211 else if (event_length == NVEC_3BYTES)
212 return 3;
213 else
214 return 0;
215}
216
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200217/**
218 * nvec_gpio_set_value - Set the GPIO value
219 * @nvec: A &struct nvec_chip
220 * @value: The value to write (0 or 1)
221 *
222 * Like gpio_set_value(), but generating debugging information
223 */
Julian Andres Klodee7c40852011-09-27 19:00:49 +0200224static void nvec_gpio_set_value(struct nvec_chip *nvec, int value)
225{
226 dev_dbg(nvec->dev, "GPIO changed from %u to %u\n",
227 gpio_get_value(nvec->gpio), value);
228 gpio_set_value(nvec->gpio, value);
229}
230
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200231/**
232 * nvec_write_async - Asynchronously write a message to NVEC
233 * @nvec: An nvec_chip instance
234 * @data: The message data, starting with the request type
235 * @size: The size of @data
236 *
237 * Queue a single message to be transferred to the embedded controller
238 * and return immediately.
239 *
240 * Returns: 0 on success, a negative error code on failure. If a failure
241 * occured, the nvec driver may print an error.
242 */
Julian Andres Klode1b9bf622011-09-27 19:00:55 +0200243int nvec_write_async(struct nvec_chip *nvec, const unsigned char *data,
Marc Dietrich162c7d82011-09-27 19:00:40 +0200244 short size)
Marc Dietrich32890b92011-05-19 16:34:42 +0200245{
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200246 struct nvec_msg *msg;
247 unsigned long flags;
Marc Dietrich32890b92011-05-19 16:34:42 +0200248
Julian Andres Klodebb0590e2011-09-27 19:00:59 +0200249 msg = nvec_msg_alloc(nvec, NVEC_MSG_TX);
250
Julian Andres Klode1b9bf622011-09-27 19:00:55 +0200251 if (msg == NULL)
252 return -ENOMEM;
253
Marc Dietrich32890b92011-05-19 16:34:42 +0200254 msg->data[0] = size;
255 memcpy(msg->data + 1, data, size);
256 msg->size = size + 1;
Marc Dietrich32890b92011-05-19 16:34:42 +0200257
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200258 spin_lock_irqsave(&nvec->tx_lock, flags);
Marc Dietrich32890b92011-05-19 16:34:42 +0200259 list_add_tail(&msg->node, &nvec->tx_data);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200260 spin_unlock_irqrestore(&nvec->tx_lock, flags);
Marc Dietrich32890b92011-05-19 16:34:42 +0200261
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200262 queue_work(nvec->wq, &nvec->tx_work);
Julian Andres Klode1b9bf622011-09-27 19:00:55 +0200263
264 return 0;
Marc Dietrich32890b92011-05-19 16:34:42 +0200265}
266EXPORT_SYMBOL(nvec_write_async);
267
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200268/**
269 * nvec_write_sync - Write a message to nvec and read the response
270 * @nvec: An &struct nvec_chip
271 * @data: The data to write
272 * @size: The size of @data
273 *
274 * This is similar to nvec_write_async(), but waits for the
275 * request to be answered before returning. This function
276 * uses a mutex and can thus not be called from e.g.
277 * interrupt handlers.
278 *
279 * Returns: A pointer to the response message on success,
Julian Andres Klode198dd262011-09-27 19:00:58 +0200280 * %NULL on failure. Free with nvec_msg_free() once no longer
281 * used.
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200282 */
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200283struct nvec_msg *nvec_write_sync(struct nvec_chip *nvec,
284 const unsigned char *data, short size)
285{
286 struct nvec_msg *msg;
287
288 mutex_lock(&nvec->sync_write_mutex);
289
290 nvec->sync_write_pending = (data[1] << 8) + data[0];
Julian Andres Klode1b9bf622011-09-27 19:00:55 +0200291
292 if (nvec_write_async(nvec, data, size) < 0)
293 return NULL;
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200294
295 dev_dbg(nvec->dev, "nvec_sync_write: 0x%04x\n",
296 nvec->sync_write_pending);
297 if (!(wait_for_completion_timeout(&nvec->sync_write,
298 msecs_to_jiffies(2000)))) {
299 dev_warn(nvec->dev, "timeout waiting for sync write to complete\n");
300 mutex_unlock(&nvec->sync_write_mutex);
301 return NULL;
302 }
303
304 dev_dbg(nvec->dev, "nvec_sync_write: pong!\n");
305
306 msg = nvec->last_sync_msg;
307
308 mutex_unlock(&nvec->sync_write_mutex);
309
310 return msg;
311}
312EXPORT_SYMBOL(nvec_write_sync);
313
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200314/**
315 * nvec_request_master - Process outgoing messages
316 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
317 *
318 * Processes all outgoing requests by sending the request and awaiting the
319 * response, then continuing with the next request. Once a request has a
320 * matching response, it will be freed and removed from the list.
321 */
Marc Dietrich32890b92011-05-19 16:34:42 +0200322static void nvec_request_master(struct work_struct *work)
323{
324 struct nvec_chip *nvec = container_of(work, struct nvec_chip, tx_work);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200325 unsigned long flags;
326 long err;
327 struct nvec_msg *msg;
Marc Dietrich32890b92011-05-19 16:34:42 +0200328
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200329 spin_lock_irqsave(&nvec->tx_lock, flags);
330 while (!list_empty(&nvec->tx_data)) {
331 msg = list_first_entry(&nvec->tx_data, struct nvec_msg, node);
332 spin_unlock_irqrestore(&nvec->tx_lock, flags);
333 nvec_gpio_set_value(nvec, 0);
334 err = wait_for_completion_interruptible_timeout(
335 &nvec->ec_transfer, msecs_to_jiffies(5000));
336
337 if (err == 0) {
338 dev_warn(nvec->dev, "timeout waiting for ec transfer\n");
339 nvec_gpio_set_value(nvec, 1);
340 msg->pos = 0;
341 }
342
343 spin_lock_irqsave(&nvec->tx_lock, flags);
344
345 if (err > 0) {
346 list_del_init(&msg->node);
347 nvec_msg_free(nvec, msg);
348 }
349 }
350 spin_unlock_irqrestore(&nvec->tx_lock, flags);
Marc Dietrich32890b92011-05-19 16:34:42 +0200351}
352
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200353/**
354 * parse_msg - Print some information and call the notifiers on an RX message
355 * @nvec: A &struct nvec_chip
356 * @msg: A message received by @nvec
357 *
358 * Paarse some pieces of the message and then call the chain of notifiers
359 * registered via nvec_register_notifier.
360 */
Marc Dietrich32890b92011-05-19 16:34:42 +0200361static int parse_msg(struct nvec_chip *nvec, struct nvec_msg *msg)
362{
Marc Dietrich162c7d82011-09-27 19:00:40 +0200363 if ((msg->data[0] & 1 << 7) == 0 && msg->data[3]) {
364 dev_err(nvec->dev, "ec responded %02x %02x %02x %02x\n",
365 msg->data[0], msg->data[1], msg->data[2], msg->data[3]);
Marc Dietrich32890b92011-05-19 16:34:42 +0200366 return -EINVAL;
367 }
368
Marc Dietricha3a9aa12011-09-27 19:00:41 +0200369 if ((msg->data[0] >> 7) == 1 && (msg->data[0] & 0x0f) == 5)
370 print_hex_dump(KERN_WARNING, "ec system event ",
371 DUMP_PREFIX_NONE, 16, 1, msg->data,
372 msg->data[1] + 2, true);
Marc Dietrich32890b92011-05-19 16:34:42 +0200373
Marc Dietrich162c7d82011-09-27 19:00:40 +0200374 atomic_notifier_call_chain(&nvec->notifier_list, msg->data[0] & 0x8f,
375 msg->data);
Marc Dietrich32890b92011-05-19 16:34:42 +0200376
377 return 0;
378}
379
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200380/**
381 * nvec_dispatch - Process messages received from the EC
382 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
383 *
384 * Process messages previously received from the EC and put into the RX
385 * queue of the &struct nvec_chip instance associated with @work.
386 */
Marc Dietrich32890b92011-05-19 16:34:42 +0200387static void nvec_dispatch(struct work_struct *work)
388{
389 struct nvec_chip *nvec = container_of(work, struct nvec_chip, rx_work);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200390 unsigned long flags;
Marc Dietrich32890b92011-05-19 16:34:42 +0200391 struct nvec_msg *msg;
392
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200393 spin_lock_irqsave(&nvec->rx_lock, flags);
Marc Dietrich162c7d82011-09-27 19:00:40 +0200394 while (!list_empty(&nvec->rx_data)) {
Marc Dietrich32890b92011-05-19 16:34:42 +0200395 msg = list_first_entry(&nvec->rx_data, struct nvec_msg, node);
396 list_del_init(&msg->node);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200397 spin_unlock_irqrestore(&nvec->rx_lock, flags);
Marc Dietrich32890b92011-05-19 16:34:42 +0200398
Marc Dietrich162c7d82011-09-27 19:00:40 +0200399 if (nvec->sync_write_pending ==
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200400 (msg->data[2] << 8) + msg->data[0]) {
Marc Dietrich32890b92011-05-19 16:34:42 +0200401 dev_dbg(nvec->dev, "sync write completed!\n");
402 nvec->sync_write_pending = 0;
403 nvec->last_sync_msg = msg;
404 complete(&nvec->sync_write);
405 } else {
406 parse_msg(nvec, msg);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200407 nvec_msg_free(nvec, msg);
Marc Dietrich32890b92011-05-19 16:34:42 +0200408 }
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200409 spin_lock_irqsave(&nvec->rx_lock, flags);
410 }
411 spin_unlock_irqrestore(&nvec->rx_lock, flags);
412}
413
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200414/**
415 * nvec_tx_completed - Complete the current transfer
416 * @nvec: A &struct nvec_chip
417 *
418 * This is called when we have received an END_TRANS on a TX transfer.
419 */
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200420static void nvec_tx_completed(struct nvec_chip *nvec)
421{
422 /* We got an END_TRANS, let's skip this, maybe there's an event */
423 if (nvec->tx->pos != nvec->tx->size) {
424 dev_err(nvec->dev, "premature END_TRANS, resending\n");
425 nvec->tx->pos = 0;
426 nvec_gpio_set_value(nvec, 0);
427 } else {
428 nvec->state = 0;
Marc Dietrich32890b92011-05-19 16:34:42 +0200429 }
430}
431
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200432/**
433 * nvec_rx_completed - Complete the current transfer
434 * @nvec: A &struct nvec_chip
435 *
436 * This is called when we have received an END_TRANS on a RX transfer.
437 */
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200438static void nvec_rx_completed(struct nvec_chip *nvec)
439{
Julian Andres Klode210ceb42011-09-27 19:01:01 +0200440 if (nvec->rx->pos != nvec_msg_size(nvec->rx)) {
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200441 dev_err(nvec->dev, "RX incomplete: Expected %u bytes, got %u\n",
442 (uint) nvec_msg_size(nvec->rx),
443 (uint) nvec->rx->pos);
444
Julian Andres Klode210ceb42011-09-27 19:01:01 +0200445 nvec_msg_free(nvec, nvec->rx);
446 nvec->state = 0;
Julian Andres Kloded6bdcf22011-09-27 19:01:04 +0200447
448 /* Battery quirk - Often incomplete, and likes to crash */
449 if (nvec->rx->data[0] == NVEC_BAT)
450 complete(&nvec->ec_transfer);
451
Julian Andres Klode210ceb42011-09-27 19:01:01 +0200452 return;
453 }
454
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200455 spin_lock(&nvec->rx_lock);
456
457 /* add the received data to the work list
458 and move the ring buffer pointer to the next entry */
459 list_add_tail(&nvec->rx->node, &nvec->rx_data);
460
461 spin_unlock(&nvec->rx_lock);
462
463 nvec->state = 0;
464
465 if (!nvec_msg_is_event(nvec->rx))
466 complete(&nvec->ec_transfer);
467
468 queue_work(nvec->wq, &nvec->rx_work);
469}
470
471/**
472 * nvec_invalid_flags - Send an error message about invalid flags and jump
473 * @nvec: The nvec device
474 * @status: The status flags
475 * @reset: Whether we shall jump to state 0.
476 */
477static void nvec_invalid_flags(struct nvec_chip *nvec, unsigned int status,
478 bool reset)
479{
480 dev_err(nvec->dev, "unexpected status flags 0x%02x during state %i\n",
481 status, nvec->state);
482 if (reset)
483 nvec->state = 0;
484}
485
486/**
487 * nvec_tx_set - Set the message to transfer (nvec->tx)
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200488 * @nvec: A &struct nvec_chip
489 *
490 * Gets the first entry from the tx_data list of @nvec and sets the
491 * tx member to it. If the tx_data list is empty, this uses the
492 * tx_scratch message to send a no operation message.
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200493 */
494static void nvec_tx_set(struct nvec_chip *nvec)
495{
496 spin_lock(&nvec->tx_lock);
497 if (list_empty(&nvec->tx_data)) {
498 dev_err(nvec->dev, "empty tx - sending no-op\n");
499 memcpy(nvec->tx_scratch.data, "\x02\x07\x02", 3);
500 nvec->tx_scratch.size = 3;
501 nvec->tx_scratch.pos = 0;
502 nvec->tx = &nvec->tx_scratch;
503 list_add_tail(&nvec->tx->node, &nvec->tx_data);
504 } else {
505 nvec->tx = list_first_entry(&nvec->tx_data, struct nvec_msg,
506 node);
507 nvec->tx->pos = 0;
508 }
509 spin_unlock(&nvec->tx_lock);
510
511 dev_dbg(nvec->dev, "Sending message of length %u, command 0x%x\n",
512 (uint)nvec->tx->size, nvec->tx->data[1]);
513}
514
515/**
516 * nvec_interrupt - Interrupt handler
517 * @irq: The IRQ
518 * @dev: The nvec device
Julian Andres Klodebdf034d2011-09-27 19:00:56 +0200519 *
520 * Interrupt handler that fills our RX buffers and empties our TX
521 * buffers. This uses a finite state machine with ridiculous amounts
522 * of error checking, in order to be fairly reliable.
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200523 */
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200524static irqreturn_t nvec_interrupt(int irq, void *dev)
Marc Dietrich32890b92011-05-19 16:34:42 +0200525{
526 unsigned long status;
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200527 unsigned int received = 0;
528 unsigned char to_send = 0xff;
529 const unsigned long irq_mask = I2C_SL_IRQ | END_TRANS | RCVD | RNW;
530 struct nvec_chip *nvec = dev;
531 unsigned int state = nvec->state;
Marc Dietrich32890b92011-05-19 16:34:42 +0200532
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200533 status = readl(nvec->base + I2C_SL_STATUS);
Marc Dietrich32890b92011-05-19 16:34:42 +0200534
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200535 /* Filter out some errors */
536 if ((status & irq_mask) == 0 && (status & ~irq_mask) != 0) {
537 dev_err(nvec->dev, "unexpected irq mask %lx\n", status);
Marc Dietrich32890b92011-05-19 16:34:42 +0200538 return IRQ_HANDLED;
Marc Dietrich32890b92011-05-19 16:34:42 +0200539 }
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200540 if ((status & I2C_SL_IRQ) == 0) {
541 dev_err(nvec->dev, "Spurious IRQ\n");
542 return IRQ_HANDLED;
543 }
544
545 /* The EC did not request a read, so it send us something, read it */
546 if ((status & RNW) == 0) {
547 received = readl(nvec->base + I2C_SL_RCVD);
548 if (status & RCVD)
549 writel(0, nvec->base + I2C_SL_RCVD);
550 }
551
552 if (status == (I2C_SL_IRQ | RCVD))
553 nvec->state = 0;
554
555 switch (nvec->state) {
556 case 0: /* Verify that its a transfer start, the rest later */
557 if (status != (I2C_SL_IRQ | RCVD))
558 nvec_invalid_flags(nvec, status, false);
559 break;
560 case 1: /* command byte */
561 if (status != I2C_SL_IRQ) {
562 nvec_invalid_flags(nvec, status, true);
563 } else {
Julian Andres Klodebb0590e2011-09-27 19:00:59 +0200564 nvec->rx = nvec_msg_alloc(nvec, NVEC_MSG_RX);
Julian Andres Klode8da79862011-09-27 19:01:00 +0200565 /* Should not happen in a normal world */
566 if (unlikely(nvec->rx == NULL)) {
567 nvec->state = 0;
568 break;
569 }
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200570 nvec->rx->data[0] = received;
571 nvec->rx->pos = 1;
572 nvec->state = 2;
573 }
574 break;
575 case 2: /* first byte after command */
576 if (status == (I2C_SL_IRQ | RNW | RCVD)) {
577 udelay(33);
578 if (nvec->rx->data[0] != 0x01) {
579 dev_err(nvec->dev,
580 "Read without prior read command\n");
581 nvec->state = 0;
582 break;
583 }
584 nvec_msg_free(nvec, nvec->rx);
585 nvec->state = 3;
586 nvec_tx_set(nvec);
587 BUG_ON(nvec->tx->size < 1);
588 to_send = nvec->tx->data[0];
589 nvec->tx->pos = 1;
590 } else if (status == (I2C_SL_IRQ)) {
591 BUG_ON(nvec->rx == NULL);
592 nvec->rx->data[1] = received;
593 nvec->rx->pos = 2;
594 nvec->state = 4;
595 } else {
596 nvec_invalid_flags(nvec, status, true);
597 }
598 break;
599 case 3: /* EC does a block read, we transmit data */
600 if (status & END_TRANS) {
601 nvec_tx_completed(nvec);
602 } else if ((status & RNW) == 0 || (status & RCVD)) {
603 nvec_invalid_flags(nvec, status, true);
604 } else if (nvec->tx && nvec->tx->pos < nvec->tx->size) {
605 to_send = nvec->tx->data[nvec->tx->pos++];
606 } else {
607 dev_err(nvec->dev, "tx buffer underflow on %p (%u > %u)\n",
608 nvec->tx,
609 (uint) (nvec->tx ? nvec->tx->pos : 0),
610 (uint) (nvec->tx ? nvec->tx->size : 0));
611 nvec->state = 0;
612 }
613 break;
614 case 4: /* EC does some write, we read the data */
615 if ((status & (END_TRANS | RNW)) == END_TRANS)
616 nvec_rx_completed(nvec);
617 else if (status & (RNW | RCVD))
618 nvec_invalid_flags(nvec, status, true);
619 else if (nvec->rx && nvec->rx->pos < NVEC_MSG_SIZE)
620 nvec->rx->data[nvec->rx->pos++] = received;
621 else
622 dev_err(nvec->dev,
623 "RX buffer overflow on %p: "
624 "Trying to write byte %u of %u\n",
625 nvec->rx, nvec->rx->pos, NVEC_MSG_SIZE);
626 break;
627 default:
628 nvec->state = 0;
629 }
630
631 /* If we are told that a new transfer starts, verify it */
632 if ((status & (RCVD | RNW)) == RCVD) {
633 if (received != nvec->i2c_addr)
634 dev_err(nvec->dev,
635 "received address 0x%02x, expected 0x%02x\n",
636 received, nvec->i2c_addr);
637 nvec->state = 1;
638 }
639
640 /* Send data if requested, but not on end of transmission */
641 if ((status & (RNW | END_TRANS)) == RNW)
642 writel(to_send, nvec->base + I2C_SL_RCVD);
643
644 /* If we have send the first byte */
645 if (status == (I2C_SL_IRQ | RNW | RCVD))
646 nvec_gpio_set_value(nvec, 1);
647
648 dev_dbg(nvec->dev,
649 "Handled: %s 0x%02x, %s 0x%02x in state %u [%s%s%s]\n",
650 (status & RNW) == 0 ? "received" : "R=",
651 received,
652 (status & (RNW | END_TRANS)) ? "sent" : "S=",
653 to_send,
654 state,
655 status & END_TRANS ? " END_TRANS" : "",
656 status & RCVD ? " RCVD" : "",
657 status & RNW ? " RNW" : "");
658
Julian Andres Klodede839b82011-09-27 19:01:07 +0200659
660 /*
661 * TODO: A correct fix needs to be found for this.
662 *
663 * We experience less incomplete messages with this delay than without
664 * it, but we don't know why. Help is appreciated.
665 */
666 udelay(100);
667
Marc Dietrich32890b92011-05-19 16:34:42 +0200668 return IRQ_HANDLED;
669}
670
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200671static void tegra_init_i2c_slave(struct nvec_chip *nvec)
Marc Dietrich32890b92011-05-19 16:34:42 +0200672{
673 u32 val;
674
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200675 clk_enable(nvec->i2c_clk);
676
677 tegra_periph_reset_assert(nvec->i2c_clk);
Marc Dietrich32890b92011-05-19 16:34:42 +0200678 udelay(2);
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200679 tegra_periph_reset_deassert(nvec->i2c_clk);
Marc Dietrich32890b92011-05-19 16:34:42 +0200680
Marc Dietrichac810752011-09-27 19:00:42 +0200681 val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN |
682 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT);
683 writel(val, nvec->base + I2C_CNFG);
684
685 clk_set_rate(nvec->i2c_clk, 8 * 80000);
686
687 writel(I2C_SL_NEWL, nvec->base + I2C_SL_CNFG);
688 writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT);
689
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200690 writel(nvec->i2c_addr>>1, nvec->base + I2C_SL_ADDR1);
691 writel(0, nvec->base + I2C_SL_ADDR2);
Marc Dietrich32890b92011-05-19 16:34:42 +0200692
Marc Dietrichac810752011-09-27 19:00:42 +0200693 enable_irq(nvec->irq);
Marc Dietrich32890b92011-05-19 16:34:42 +0200694
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200695 clk_disable(nvec->i2c_clk);
Marc Dietrich32890b92011-05-19 16:34:42 +0200696}
697
Marc Dietrichac810752011-09-27 19:00:42 +0200698static void nvec_disable_i2c_slave(struct nvec_chip *nvec)
699{
700 disable_irq(nvec->irq);
701 writel(I2C_SL_NEWL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG);
702 clk_disable(nvec->i2c_clk);
703}
704
Marc Dietrich32890b92011-05-19 16:34:42 +0200705static void nvec_power_off(void)
706{
707 nvec_write_async(nvec_power_handle, EC_DISABLE_EVENT_REPORTING, 3);
708 nvec_write_async(nvec_power_handle, "\x04\x01", 2);
709}
710
711static int __devinit tegra_nvec_probe(struct platform_device *pdev)
712{
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200713 int err, ret;
Marc Dietrich32890b92011-05-19 16:34:42 +0200714 struct clk *i2c_clk;
715 struct nvec_platform_data *pdata = pdev->dev.platform_data;
716 struct nvec_chip *nvec;
717 struct nvec_msg *msg;
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200718 struct resource *res;
719 struct resource *iomem;
720 void __iomem *base;
Marc Dietrich32890b92011-05-19 16:34:42 +0200721
722 nvec = kzalloc(sizeof(struct nvec_chip), GFP_KERNEL);
Marc Dietrich162c7d82011-09-27 19:00:40 +0200723 if (nvec == NULL) {
Marc Dietrich32890b92011-05-19 16:34:42 +0200724 dev_err(&pdev->dev, "failed to reserve memory\n");
725 return -ENOMEM;
726 }
727 platform_set_drvdata(pdev, nvec);
728 nvec->dev = &pdev->dev;
729 nvec->gpio = pdata->gpio;
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200730 nvec->i2c_addr = pdata->i2c_addr;
Marc Dietrich32890b92011-05-19 16:34:42 +0200731
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200732 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
733 if (!res) {
734 dev_err(&pdev->dev, "no mem resource?\n");
735 return -ENODEV;
Marc Dietrich32890b92011-05-19 16:34:42 +0200736 }
737
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200738 iomem = request_mem_region(res->start, resource_size(res), pdev->name);
739 if (!iomem) {
740 dev_err(&pdev->dev, "I2C region already claimed\n");
741 return -EBUSY;
Marc Dietrich32890b92011-05-19 16:34:42 +0200742 }
743
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200744 base = ioremap(iomem->start, resource_size(iomem));
745 if (!base) {
746 dev_err(&pdev->dev, "Can't ioremap I2C region\n");
747 return -ENOMEM;
748 }
Marc Dietrich32890b92011-05-19 16:34:42 +0200749
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200750 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
751 if (!res) {
752 dev_err(&pdev->dev, "no irq resource?\n");
753 ret = -ENODEV;
754 goto err_iounmap;
755 }
756
757 i2c_clk = clk_get_sys("tegra-i2c.2", NULL);
758 if (IS_ERR(i2c_clk)) {
759 dev_err(nvec->dev, "failed to get controller clock\n");
760 goto err_iounmap;
Marc Dietrich32890b92011-05-19 16:34:42 +0200761 }
762
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200763 nvec->base = base;
764 nvec->irq = res->start;
765 nvec->i2c_clk = i2c_clk;
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200766 nvec->rx = &nvec->msg_pool[0];
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200767
Marc Dietrich32890b92011-05-19 16:34:42 +0200768 /* Set the gpio to low when we've got something to say */
769 err = gpio_request(nvec->gpio, "nvec gpio");
Marc Dietrich162c7d82011-09-27 19:00:40 +0200770 if (err < 0)
Marc Dietrich32890b92011-05-19 16:34:42 +0200771 dev_err(nvec->dev, "couldn't request gpio\n");
772
Marc Dietrich32890b92011-05-19 16:34:42 +0200773 ATOMIC_INIT_NOTIFIER_HEAD(&nvec->notifier_list);
774
775 init_completion(&nvec->sync_write);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200776 init_completion(&nvec->ec_transfer);
777 mutex_init(&nvec->sync_write_mutex);
778 spin_lock_init(&nvec->tx_lock);
779 spin_lock_init(&nvec->rx_lock);
Marc Dietrich32890b92011-05-19 16:34:42 +0200780 INIT_LIST_HEAD(&nvec->rx_data);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200781 INIT_LIST_HEAD(&nvec->tx_data);
Marc Dietrich32890b92011-05-19 16:34:42 +0200782 INIT_WORK(&nvec->rx_work, nvec_dispatch);
783 INIT_WORK(&nvec->tx_work, nvec_request_master);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200784 nvec->wq = alloc_workqueue("nvec", WQ_NON_REENTRANT, 2);
Marc Dietrich32890b92011-05-19 16:34:42 +0200785
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200786 err = request_irq(nvec->irq, nvec_interrupt, 0, "nvec", nvec);
787 if (err) {
788 dev_err(nvec->dev, "couldn't request irq\n");
789 goto failed;
790 }
Marc Dietrichac810752011-09-27 19:00:42 +0200791 disable_irq(nvec->irq);
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200792
793 tegra_init_i2c_slave(nvec);
794
Marc Dietrichac810752011-09-27 19:00:42 +0200795 clk_enable(i2c_clk);
796
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200797 gpio_direction_output(nvec->gpio, 1);
798 gpio_set_value(nvec->gpio, 1);
799
Marc Dietrich32890b92011-05-19 16:34:42 +0200800 /* enable event reporting */
801 nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING,
Marc Dietrich162c7d82011-09-27 19:00:40 +0200802 sizeof(EC_ENABLE_EVENT_REPORTING));
Marc Dietrich32890b92011-05-19 16:34:42 +0200803
Marc Dietrich32890b92011-05-19 16:34:42 +0200804 nvec->nvec_status_notifier.notifier_call = nvec_status_notifier;
805 nvec_register_notifier(nvec, &nvec->nvec_status_notifier, 0);
806
807 nvec_power_handle = nvec;
808 pm_power_off = nvec_power_off;
809
810 /* Get Firmware Version */
811 msg = nvec_write_sync(nvec, EC_GET_FIRMWARE_VERSION,
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200812 sizeof(EC_GET_FIRMWARE_VERSION));
Marc Dietrich32890b92011-05-19 16:34:42 +0200813
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200814 if (msg) {
815 dev_warn(nvec->dev, "ec firmware version %02x.%02x.%02x / %02x\n",
816 msg->data[4], msg->data[5], msg->data[6], msg->data[7]);
Marc Dietrich32890b92011-05-19 16:34:42 +0200817
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200818 nvec_msg_free(nvec, msg);
819 }
Marc Dietrich32890b92011-05-19 16:34:42 +0200820
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200821 ret = mfd_add_devices(nvec->dev, -1, nvec_devices,
Marc Dietrich162c7d82011-09-27 19:00:40 +0200822 ARRAY_SIZE(nvec_devices), base, 0);
823 if (ret)
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200824 dev_err(nvec->dev, "error adding subdevices\n");
825
Marc Dietrich32890b92011-05-19 16:34:42 +0200826 /* unmute speakers? */
Marc Dietrich6dca320c2011-09-27 19:00:43 +0200827 nvec_write_async(nvec, "\x0d\x10\x59\x95", 4);
Marc Dietrich32890b92011-05-19 16:34:42 +0200828
829 /* enable lid switch event */
830 nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x02\x00", 7);
831
832 /* enable power button event */
833 nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x80\x00", 7);
834
835 return 0;
836
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200837err_iounmap:
838 iounmap(base);
Marc Dietrich32890b92011-05-19 16:34:42 +0200839failed:
840 kfree(nvec);
841 return -ENOMEM;
842}
843
844static int __devexit tegra_nvec_remove(struct platform_device *pdev)
845{
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200846 struct nvec_chip *nvec = platform_get_drvdata(pdev);
847
848 nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3);
849 mfd_remove_devices(nvec->dev);
850 free_irq(nvec->irq, &nvec_interrupt);
851 iounmap(nvec->base);
852 gpio_free(nvec->gpio);
Julian Andres Klode0cab4cb2011-09-27 19:00:51 +0200853 destroy_workqueue(nvec->wq);
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200854 kfree(nvec);
855
Marc Dietrich32890b92011-05-19 16:34:42 +0200856 return 0;
857}
858
859#ifdef CONFIG_PM
860
861static int tegra_nvec_suspend(struct platform_device *pdev, pm_message_t state)
862{
863 struct nvec_chip *nvec = platform_get_drvdata(pdev);
Marc Dietrich9feeb012011-09-27 19:01:08 +0200864 struct nvec_msg *msg;
Marc Dietrich32890b92011-05-19 16:34:42 +0200865
866 dev_dbg(nvec->dev, "suspending\n");
Marc Dietrich9feeb012011-09-27 19:01:08 +0200867
868 /* keep these sync or you'll break suspend */
869 msg = nvec_write_sync(nvec, EC_DISABLE_EVENT_REPORTING, 3);
870 nvec_msg_free(nvec, msg);
871 msg = nvec_write_sync(nvec, "\x04\x02", 2);
872 nvec_msg_free(nvec, msg);
873
Marc Dietrichac810752011-09-27 19:00:42 +0200874 nvec_disable_i2c_slave(nvec);
Marc Dietrich32890b92011-05-19 16:34:42 +0200875
876 return 0;
877}
878
Marc Dietrich162c7d82011-09-27 19:00:40 +0200879static int tegra_nvec_resume(struct platform_device *pdev)
880{
Marc Dietrich32890b92011-05-19 16:34:42 +0200881 struct nvec_chip *nvec = platform_get_drvdata(pdev);
882
883 dev_dbg(nvec->dev, "resuming\n");
Marc Dietrichf686e9a2011-08-24 20:23:07 +0200884 tegra_init_i2c_slave(nvec);
Marc Dietrich32890b92011-05-19 16:34:42 +0200885 nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 3);
886
887 return 0;
888}
889
890#else
891#define tegra_nvec_suspend NULL
892#define tegra_nvec_resume NULL
893#endif
894
Marc Dietrich162c7d82011-09-27 19:00:40 +0200895static struct platform_driver nvec_device_driver = {
896 .probe = tegra_nvec_probe,
897 .remove = __devexit_p(tegra_nvec_remove),
Marc Dietrich32890b92011-05-19 16:34:42 +0200898 .suspend = tegra_nvec_suspend,
Marc Dietrich162c7d82011-09-27 19:00:40 +0200899 .resume = tegra_nvec_resume,
900 .driver = {
Marc Dietrich32890b92011-05-19 16:34:42 +0200901 .name = "nvec",
902 .owner = THIS_MODULE,
903 }
904};
905
906static int __init tegra_nvec_init(void)
907{
908 return platform_driver_register(&nvec_device_driver);
909}
910
911module_init(tegra_nvec_init);
Marc Dietrich162c7d82011-09-27 19:00:40 +0200912
Marc Dietrich32890b92011-05-19 16:34:42 +0200913MODULE_ALIAS("platform:nvec");
Marc Dietrich162c7d82011-09-27 19:00:40 +0200914MODULE_DESCRIPTION("NVIDIA compliant embedded controller interface");
915MODULE_AUTHOR("Marc Dietrich <marvin24@gmx.de>");
916MODULE_LICENSE("GPL");