Sergio Paracuellos | 9e2ddbd | 2019-01-04 08:08:24 +0100 | [diff] [blame] | 1 | Mediatek Mt7621 PCIe PHY |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: must be "mediatek,mt7621-pci-phy" |
| 5 | - reg: base address and length of the PCIe PHY block |
Sergio Paracuellos | 200ff80 | 2019-03-29 06:52:42 +0100 | [diff] [blame] | 6 | - #phy-cells: must be <1> for pcie0_phy and for pcie1_phy. |
Sergio Paracuellos | 9e2ddbd | 2019-01-04 08:08:24 +0100 | [diff] [blame] | 7 | |
| 8 | Example: |
Sergio Paracuellos | 200ff80 | 2019-03-29 06:52:42 +0100 | [diff] [blame] | 9 | pcie0_phy: pcie-phy@1e149000 { |
Sergio Paracuellos | 9e2ddbd | 2019-01-04 08:08:24 +0100 | [diff] [blame] | 10 | compatible = "mediatek,mt7621-pci-phy"; |
Sergio Paracuellos | 200ff80 | 2019-03-29 06:52:42 +0100 | [diff] [blame] | 11 | reg = <0x1e149000 0x0700>; |
| 12 | #phy-cells = <1>; |
Sergio Paracuellos | 9e2ddbd | 2019-01-04 08:08:24 +0100 | [diff] [blame] | 13 | }; |
| 14 | |
Sergio Paracuellos | 200ff80 | 2019-03-29 06:52:42 +0100 | [diff] [blame] | 15 | pcie1_phy: pcie-phy@1e14a000 { |
Sergio Paracuellos | 9e2ddbd | 2019-01-04 08:08:24 +0100 | [diff] [blame] | 16 | compatible = "mediatek,mt7621-pci-phy"; |
Sergio Paracuellos | 200ff80 | 2019-03-29 06:52:42 +0100 | [diff] [blame] | 17 | reg = <0x1e14a000 0x0700>; |
| 18 | #phy-cells = <1>; |
Sergio Paracuellos | 9e2ddbd | 2019-01-04 08:08:24 +0100 | [diff] [blame] | 19 | }; |
| 20 | |
| 21 | /* users of the PCIe phy */ |
| 22 | |
| 23 | pcie: pcie@1e140000 { |
| 24 | ... |
| 25 | ... |
Sergio Paracuellos | 200ff80 | 2019-03-29 06:52:42 +0100 | [diff] [blame] | 26 | phys = <&pcie0_phy 0>, <&pcie0_phy 1>, <&pcie1_phy 0>; |
Sergio Paracuellos | 9e2ddbd | 2019-01-04 08:08:24 +0100 | [diff] [blame] | 27 | phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2"; |
Sergio Paracuellos | 200ff80 | 2019-03-29 06:52:42 +0100 | [diff] [blame] | 28 | }; |