Dinh Nguyen | cfda590 | 2012-07-11 15:13:16 -0500 | [diff] [blame] | 1 | * Designware APB timer |
| 2 | |
| 3 | Required properties: |
Dinh Nguyen | 620f5e1 | 2013-08-21 15:28:49 -0500 | [diff] [blame] | 4 | - compatible: One of: |
| 5 | "snps,dw-apb-timer" |
| 6 | "snps,dw-apb-timer-sp" <DEPRECATED> |
| 7 | "snps,dw-apb-timer-osc" <DEPRECATED> |
Dinh Nguyen | cfda590 | 2012-07-11 15:13:16 -0500 | [diff] [blame] | 8 | - reg: physical base address of the controller and length of memory mapped |
| 9 | region. |
| 10 | - interrupts: IRQ line for the timer. |
Heiko Stuebner | a8b447f | 2013-06-04 11:37:36 +0200 | [diff] [blame] | 11 | - either clocks+clock-names or clock-frequency properties |
| 12 | |
| 13 | Optional properties: |
| 14 | - clocks : list of clock specifiers, corresponding to entries in |
| 15 | the clock-names property; |
| 16 | - clock-names : should contain "timer" and "pclk" entries, matching entries |
| 17 | in the clocks property. |
Dinh Nguyen | cfda590 | 2012-07-11 15:13:16 -0500 | [diff] [blame] | 18 | - clock-frequency: The frequency in HZ of the timer. |
| 19 | - clock-freq: For backwards compatibility with picoxcell |
| 20 | |
Heiko Stuebner | a8b447f | 2013-06-04 11:37:36 +0200 | [diff] [blame] | 21 | If using the clock specifiers, the pclk clock is optional, as not all |
| 22 | systems may use one. |
| 23 | |
| 24 | |
Dinh Nguyen | cfda590 | 2012-07-11 15:13:16 -0500 | [diff] [blame] | 25 | Example: |
Dinh Nguyen | 620f5e1 | 2013-08-21 15:28:49 -0500 | [diff] [blame] | 26 | timer@ffe00000 { |
| 27 | compatible = "snps,dw-apb-timer"; |
| 28 | interrupts = <0 170 4>; |
| 29 | reg = <0xffe00000 0x1000>; |
| 30 | clocks = <&timer_clk>, <&timer_pclk>; |
| 31 | clock-names = "timer", "pclk"; |
| 32 | }; |