blob: 4ac99122b5f1b891c363eec16db76f57e26cc67a [file] [log] [blame]
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -03001================================
Tejun Heo9ac78492007-01-20 16:00:26 +09002Devres - Managed Device Resource
3================================
4
5Tejun Heo <teheo@suse.de>
6
7First draft 10 January 2007
8
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -03009.. contents
Tejun Heo9ac78492007-01-20 16:00:26 +090010
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -030011 1. Intro : Huh? Devres?
12 2. Devres : Devres in a nutshell
13 3. Devres Group : Group devres'es and release them together
14 4. Details : Life time rules, calling context, ...
15 5. Overhead : How much do we have to pay for this?
16 6. List of managed interfaces: Currently implemented managed interfaces
Tejun Heo9ac78492007-01-20 16:00:26 +090017
18
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -0300191. Intro
20--------
Tejun Heo9ac78492007-01-20 16:00:26 +090021
22devres came up while trying to convert libata to use iomap. Each
23iomapped address should be kept and unmapped on driver detach. For
24example, a plain SFF ATA controller (that is, good old PCI IDE) in
25native mode makes use of 5 PCI BARs and all of them should be
26maintained.
27
28As with many other device drivers, libata low level drivers have
29sufficient bugs in ->remove and ->probe failure path. Well, yes,
30that's probably because libata low level driver developers are lazy
31bunch, but aren't all low level driver developers? After spending a
32day fiddling with braindamaged hardware with no document or
33braindamaged document, if it's finally working, well, it's working.
34
35For one reason or another, low level drivers don't receive as much
36attention or testing as core code, and bugs on driver detach or
Matt LaPlante01dd2fb2007-10-20 01:34:40 +020037initialization failure don't happen often enough to be noticeable.
Tejun Heo9ac78492007-01-20 16:00:26 +090038Init failure path is worse because it's much less travelled while
39needs to handle multiple entry points.
40
41So, many low level drivers end up leaking resources on driver detach
42and having half broken failure path implementation in ->probe() which
43would leak resources or even cause oops when failure occurs. iomap
44adds more to this mix. So do msi and msix.
45
46
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -0300472. Devres
48---------
Tejun Heo9ac78492007-01-20 16:00:26 +090049
50devres is basically linked list of arbitrarily sized memory areas
51associated with a struct device. Each devres entry is associated with
52a release function. A devres can be released in several ways. No
53matter what, all devres entries are released on driver detach. On
54release, the associated release function is invoked and then the
55devres entry is freed.
56
57Managed interface is created for resources commonly used by device
58drivers using devres. For example, coherent DMA memory is acquired
59using dma_alloc_coherent(). The managed version is called
60dmam_alloc_coherent(). It is identical to dma_alloc_coherent() except
61for the DMA memory allocated using it is managed and will be
62automatically released on driver detach. Implementation looks like
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -030063the following::
Tejun Heo9ac78492007-01-20 16:00:26 +090064
65 struct dma_devres {
66 size_t size;
67 void *vaddr;
68 dma_addr_t dma_handle;
69 };
70
71 static void dmam_coherent_release(struct device *dev, void *res)
72 {
73 struct dma_devres *this = res;
74
75 dma_free_coherent(dev, this->size, this->vaddr, this->dma_handle);
76 }
77
78 dmam_alloc_coherent(dev, size, dma_handle, gfp)
79 {
80 struct dma_devres *dr;
81 void *vaddr;
82
83 dr = devres_alloc(dmam_coherent_release, sizeof(*dr), gfp);
84 ...
85
86 /* alloc DMA memory as usual */
87 vaddr = dma_alloc_coherent(...);
88 ...
89
90 /* record size, vaddr, dma_handle in dr */
91 dr->vaddr = vaddr;
92 ...
93
94 devres_add(dev, dr);
95
96 return vaddr;
97 }
98
99If a driver uses dmam_alloc_coherent(), the area is guaranteed to be
100freed whether initialization fails half-way or the device gets
101detached. If most resources are acquired using managed interface, a
102driver can have much simpler init and exit code. Init path basically
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -0300103looks like the following::
Tejun Heo9ac78492007-01-20 16:00:26 +0900104
105 my_init_one()
106 {
107 struct mydev *d;
108
109 d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
110 if (!d)
111 return -ENOMEM;
112
113 d->ring = dmam_alloc_coherent(...);
114 if (!d->ring)
115 return -ENOMEM;
116
117 if (check something)
118 return -EINVAL;
119 ...
120
121 return register_to_upper_layer(d);
122 }
123
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -0300124And exit path::
Tejun Heo9ac78492007-01-20 16:00:26 +0900125
126 my_remove_one()
127 {
128 unregister_from_upper_layer(d);
129 shutdown_my_hardware();
130 }
131
132As shown above, low level drivers can be simplified a lot by using
133devres. Complexity is shifted from less maintained low level drivers
134to better maintained higher layer. Also, as init failure path is
135shared with exit path, both can get more testing.
136
Nicholas Mc Guire41c31f62018-12-01 13:44:29 +0100137Note though that when converting current calls or assignments to
138managed devm_* versions it is up to you to check if internal operations
139like allocating memory, have failed. Managed resources pertains to the
140freeing of these resources *only* - all other checks needed are still
141on you. In some cases this may mean introducing checks that were not
142necessary before moving to the managed devm_* calls.
143
Tejun Heo9ac78492007-01-20 16:00:26 +0900144
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -03001453. Devres group
146---------------
Tejun Heo9ac78492007-01-20 16:00:26 +0900147
148Devres entries can be grouped using devres group. When a group is
149released, all contained normal devres entries and properly nested
150groups are released. One usage is to rollback series of acquired
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -0300151resources on failure. For example::
Tejun Heo9ac78492007-01-20 16:00:26 +0900152
153 if (!devres_open_group(dev, NULL, GFP_KERNEL))
154 return -ENOMEM;
155
156 acquire A;
157 if (failed)
158 goto err;
159
160 acquire B;
161 if (failed)
162 goto err;
163 ...
164
165 devres_remove_group(dev, NULL);
166 return 0;
167
168 err:
169 devres_release_group(dev, NULL);
170 return err_code;
171
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200172As resource acquisition failure usually means probe failure, constructs
Tejun Heo9ac78492007-01-20 16:00:26 +0900173like above are usually useful in midlayer driver (e.g. libata core
174layer) where interface function shouldn't have side effect on failure.
175For LLDs, just returning error code suffices in most cases.
176
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -0300177Each group is identified by `void *id`. It can either be explicitly
Tejun Heo9ac78492007-01-20 16:00:26 +0900178specified by @id argument to devres_open_group() or automatically
179created by passing NULL as @id as in the above example. In both
180cases, devres_open_group() returns the group's id. The returned id
181can be passed to other devres functions to select the target group.
182If NULL is given to those functions, the latest open group is
183selected.
184
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -0300185For example, you can do something like the following::
Tejun Heo9ac78492007-01-20 16:00:26 +0900186
187 int my_midlayer_create_something()
188 {
189 if (!devres_open_group(dev, my_midlayer_create_something, GFP_KERNEL))
190 return -ENOMEM;
191
192 ...
193
Rolf Eike Beer3265b542007-05-01 11:00:19 +0200194 devres_close_group(dev, my_midlayer_create_something);
Tejun Heo9ac78492007-01-20 16:00:26 +0900195 return 0;
196 }
197
198 void my_midlayer_destroy_something()
199 {
Matt LaPlante19f59462009-04-27 15:06:31 +0200200 devres_release_group(dev, my_midlayer_create_something);
Tejun Heo9ac78492007-01-20 16:00:26 +0900201 }
202
203
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -03002044. Details
205----------
Tejun Heo9ac78492007-01-20 16:00:26 +0900206
207Lifetime of a devres entry begins on devres allocation and finishes
208when it is released or destroyed (removed and freed) - no reference
209counting.
210
211devres core guarantees atomicity to all basic devres operations and
212has support for single-instance devres types (atomic
213lookup-and-add-if-not-found). Other than that, synchronizing
214concurrent accesses to allocated devres data is caller's
215responsibility. This is usually non-issue because bus ops and
216resource allocations already do the job.
217
218For an example of single-instance devres type, read pcim_iomap_table()
Brandon Philips2c19c492007-07-17 22:09:34 -0700219in lib/devres.c.
Tejun Heo9ac78492007-01-20 16:00:26 +0900220
221All devres interface functions can be called without context if the
222right gfp mask is given.
223
224
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -03002255. Overhead
226-----------
Tejun Heo9ac78492007-01-20 16:00:26 +0900227
228Each devres bookkeeping info is allocated together with requested data
229area. With debug option turned off, bookkeeping info occupies 16
230bytes on 32bit machines and 24 bytes on 64bit (three pointers rounded
231up to ull alignment). If singly linked list is used, it can be
232reduced to two pointers (8 bytes on 32bit, 16 bytes on 64bit).
233
234Each devres group occupies 8 pointers. It can be reduced to 6 if
235singly linked list is used.
236
237Memory space overhead on ahci controller with two ports is between 300
238and 400 bytes on 32bit machine after naive conversion (we can
239certainly invest a bit more effort into libata core layer).
240
241
Mauro Carvalho Chehab4489f1612019-06-18 17:53:27 -03002426. List of managed interfaces
243-----------------------------
Tejun Heo9ac78492007-01-20 16:00:26 +0900244
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200245CLOCK
246 devm_clk_get()
Phil Edworthy60b8f0d2018-12-03 11:13:09 +0000247 devm_clk_get_optional()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200248 devm_clk_put()
Stephen Boyd41438042016-02-05 17:02:52 -0800249 devm_clk_hw_register()
Stephen Boydaa795c42017-09-01 16:16:40 -0700250 devm_of_clk_add_hw_provider()
Matti Vaittinen3eee6c72018-12-07 13:09:39 +0200251 devm_clk_hw_register_clkdev()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200252
253DMA
Huang Shijief39b9482018-07-26 14:45:53 +0800254 dmaenginem_async_device_register()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200255 dmam_alloc_coherent()
Christoph Hellwig63d36c92017-06-12 19:15:04 +0200256 dmam_alloc_attrs()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200257 dmam_free_coherent()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200258 dmam_pool_create()
259 dmam_pool_destroy()
260
Noralf Trønnes9b1f1b62019-02-25 15:42:27 +0100261DRM
262 devm_drm_dev_init()
263
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200264GPIO
265 devm_gpiod_get()
266 devm_gpiod_get_index()
267 devm_gpiod_get_index_optional()
268 devm_gpiod_get_optional()
269 devm_gpiod_put()
Linus Walleij891ddbc2018-12-06 13:43:46 +0100270 devm_gpiod_unhinge()
Laxman Dewangan38115ea2016-02-22 15:00:08 +0530271 devm_gpiochip_add_data()
Laxman Dewangan77ae5822016-02-22 15:04:08 +0530272 devm_gpio_request()
273 devm_gpio_request_one()
274 devm_gpio_free()
Wolfram Sang543f43c2012-01-15 13:31:46 +0100275
Heiner Kallweitb8f5fe32019-05-16 23:13:09 +0200276I2C
277 devm_i2c_new_dummy_device()
278
Oleksandr Kravchenko224b9952013-07-23 09:39:00 +0100279IIO
280 devm_iio_device_alloc()
281 devm_iio_device_free()
Sachin Kamat8caa07c2013-10-29 11:39:00 +0000282 devm_iio_device_register()
283 devm_iio_device_unregister()
Karol Wrona780103f2014-12-19 18:39:25 +0100284 devm_iio_kfifo_allocate()
285 devm_iio_kfifo_free()
Gregor Boirie70e48342016-09-02 20:47:55 +0200286 devm_iio_triggered_buffer_setup()
287 devm_iio_triggered_buffer_cleanup()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200288 devm_iio_trigger_alloc()
289 devm_iio_trigger_free()
Gregor Boirie90833252016-09-02 20:47:54 +0200290 devm_iio_trigger_register()
291 devm_iio_trigger_unregister()
Laxman Dewangane21a2942016-04-06 16:01:08 +0530292 devm_iio_channel_get()
293 devm_iio_channel_release()
294 devm_iio_channel_get_all()
295 devm_iio_channel_release_all()
Oleksandr Kravchenko224b9952013-07-23 09:39:00 +0100296
Alexander Kurz2ea2dc82016-04-21 19:02:04 +0200297INPUT
298 devm_input_allocate_device()
299
Tejun Heo9ac78492007-01-20 16:00:26 +0900300IO region
Tejun Heo9ac78492007-01-20 16:00:26 +0900301 devm_release_mem_region()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200302 devm_release_region()
Thierry Reding8d388212014-08-01 14:15:10 +0200303 devm_release_resource()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200304 devm_request_mem_region()
305 devm_request_region()
Thierry Reding8d388212014-08-01 14:15:10 +0200306 devm_request_resource()
Tejun Heo9ac78492007-01-20 16:00:26 +0900307
308IOMAP
309 devm_ioport_map()
310 devm_ioport_unmap()
311 devm_ioremap()
312 devm_ioremap_nocache()
Abhilash Kesavan34644522015-02-06 19:15:27 +0530313 devm_ioremap_wc()
Thierry Reding75096572013-01-21 11:08:54 +0100314 devm_ioremap_resource() : checks resource, requests memory region, ioremaps
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200315 devm_iounmap()
Tejun Heo9ac78492007-01-20 16:00:26 +0900316 pcim_iomap()
Tejun Heo9ac78492007-01-20 16:00:26 +0900317 pcim_iomap_regions() : do request_region() and iomap() on multiple BARs
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200318 pcim_iomap_table() : array of mapped addresses indexed by BAR
319 pcim_iounmap()
Stephen Boyd070b9072012-01-16 19:39:58 -0800320
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200321IRQ
322 devm_free_irq()
Tobias Klauserea051662014-08-14 10:05:03 +0200323 devm_request_any_context_irq()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200324 devm_request_irq()
Tobias Klauserea051662014-08-14 10:05:03 +0200325 devm_request_threaded_irq()
Bartosz Golaszewski2b5e7732017-02-10 13:23:23 +0100326 devm_irq_alloc_descs()
327 devm_irq_alloc_desc()
328 devm_irq_alloc_desc_at()
329 devm_irq_alloc_desc_from()
330 devm_irq_alloc_descs_from()
Bartosz Golaszewski1c3e3632017-05-31 18:06:59 +0200331 devm_irq_alloc_generic_chip()
Bartosz Golaszewski30fd8fc2017-05-31 18:07:00 +0200332 devm_irq_setup_generic_chip()
Bartosz Golaszewski44e72c72017-08-14 16:53:17 +0200333 devm_irq_sim_init()
Mark Browna8a97db2012-04-05 11:42:09 +0100334
Bjorn Anderssonca1bb4e2015-02-23 16:11:41 -0800335LED
336 devm_led_classdev_register()
337 devm_led_classdev_unregister()
338
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200339MDIO
340 devm_mdiobus_alloc()
341 devm_mdiobus_alloc_size()
342 devm_mdiobus_free()
343
344MEM
345 devm_free_pages()
346 devm_get_free_pages()
Geert Uytterhoevenbef59c52014-08-20 15:26:35 +0200347 devm_kasprintf()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200348 devm_kcalloc()
349 devm_kfree()
350 devm_kmalloc()
351 devm_kmalloc_array()
352 devm_kmemdup()
Geert Uytterhoeven54270352014-08-20 15:26:34 +0200353 devm_kstrdup()
Geert Uytterhoevenbef59c52014-08-20 15:26:35 +0200354 devm_kvasprintf()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200355 devm_kzalloc()
356
Laxman Dewangan36982832016-04-08 00:12:56 +0530357MFD
Peter Rosinb594b102017-05-14 21:51:04 +0200358 devm_mfd_add_devices()
Laxman Dewangan36982832016-04-08 00:12:56 +0530359
Peter Rosina3b02a92017-05-14 21:51:06 +0200360MUX
361 devm_mux_chip_alloc()
362 devm_mux_chip_register()
363 devm_mux_control_get()
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200364
Madalin Bucurff86aae2016-11-15 10:41:01 +0200365PER-CPU MEM
366 devm_alloc_percpu()
367 devm_free_percpu()
368
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200369PCI
Lorenzo Pieralisi5c3f18c2017-06-28 15:13:53 -0500370 devm_pci_alloc_host_bridge() : managed PCI host bridge allocation
Lorenzo Pieralisi490cb6d2017-04-19 17:48:55 +0100371 devm_pci_remap_cfgspace() : ioremap PCI configuration space
372 devm_pci_remap_cfg_resource() : ioremap PCI configuration space resource
373 pcim_enable_device() : after success, all PCI ops become managed
374 pcim_pin_device() : keep PCI device enabled after release
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200375
376PHY
377 devm_usb_get_phy()
378 devm_usb_put_phy()
Linus Torvalds3d1482f2012-05-21 16:58:23 -0700379
Stephen Warren6d4ca1f2012-04-16 10:51:00 -0600380PINCTRL
381 devm_pinctrl_get()
382 devm_pinctrl_put()
Laxman Dewangan1f8dd722016-02-24 14:14:35 +0530383 devm_pinctrl_register()
384 devm_pinctrl_unregister()
Alexandre Courbot63543162012-08-01 19:20:58 +0900385
Bjorn Anderssonc1a96342016-08-03 22:04:05 -0700386POWER
387 devm_reboot_mode_register()
388 devm_reboot_mode_unregister()
389
Alexandre Courbot63543162012-08-01 19:20:58 +0900390PWM
391 devm_pwm_get()
392 devm_pwm_put()
Marko Katic2202d4e2012-12-13 19:14:54 +0100393
Geert Uytterhoevend8e1e012014-07-10 10:10:23 +0200394REGULATOR
395 devm_regulator_bulk_get()
396 devm_regulator_get()
397 devm_regulator_put()
398 devm_regulator_register()
Andy Shevchenko0244d842013-08-21 14:27:05 +0300399
Masahiro Yamada8d5b5d52016-05-01 19:36:57 +0900400RESET
401 devm_reset_control_get()
402 devm_reset_controller_register()
403
Andrey Smirnov2cb67d22017-12-20 22:51:15 -0800404SERDEV
405 devm_serdev_device_open()
406
Andy Shevchenko0244d842013-08-21 14:27:05 +0300407SLAVE DMA ENGINE
408 devm_acpi_dma_controller_register()
Mark Brown666d5b42013-08-31 18:50:52 +0100409
410SPI
411 devm_spi_register_master()
Neil Armstrong83fbae52016-05-27 17:33:54 +0200412
413WATCHDOG
414 devm_watchdog_register_device()