blob: 864ed02ce4b7e1d90d80e42c107677c595ce5fea [file] [log] [blame]
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001/*
2 * Driver for Regulator part of Palmas PMIC Chips
3 *
Graeme Gregory7be859f2013-03-07 13:17:48 +00004 * Copyright 2011-2013 Texas Instruments Inc.
Graeme Gregorye5ce4202012-05-18 16:53:57 +01005 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
Graeme Gregorya7dddf22013-02-23 16:35:40 +00007 * Author: Ian Lartey <ian@slimlogic.co.uk>
Graeme Gregorye5ce4202012-05-18 16:53:57 +01008 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/slab.h>
24#include <linux/regmap.h>
25#include <linux/mfd/palmas.h>
Graeme Gregorya361cd9f2012-08-28 13:47:40 +020026#include <linux/of.h>
27#include <linux/of_platform.h>
28#include <linux/regulator/of_regulator.h>
Graeme Gregorye5ce4202012-05-18 16:53:57 +010029
30struct regs_info {
31 char *name;
Laxman Dewangan504382c2013-03-20 19:26:37 +053032 char *sname;
Graeme Gregorye5ce4202012-05-18 16:53:57 +010033 u8 vsel_addr;
34 u8 ctrl_addr;
35 u8 tstep_addr;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053036 int sleep_id;
Graeme Gregorye5ce4202012-05-18 16:53:57 +010037};
38
Keerthydbabd622014-05-22 14:48:29 +053039static const struct regulator_linear_range smps_low_ranges[] = {
40 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
41 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
42 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
43};
44
45static const struct regulator_linear_range smps_high_ranges[] = {
46 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
47 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
48 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
49};
50
Graeme Gregorye5ce4202012-05-18 16:53:57 +010051static const struct regs_info palmas_regs_info[] = {
52 {
53 .name = "SMPS12",
Laxman Dewangan504382c2013-03-20 19:26:37 +053054 .sname = "smps1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010055 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
56 .ctrl_addr = PALMAS_SMPS12_CTRL,
57 .tstep_addr = PALMAS_SMPS12_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053058 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010059 },
60 {
61 .name = "SMPS123",
Laxman Dewangan504382c2013-03-20 19:26:37 +053062 .sname = "smps1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010063 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
64 .ctrl_addr = PALMAS_SMPS12_CTRL,
65 .tstep_addr = PALMAS_SMPS12_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053066 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010067 },
68 {
69 .name = "SMPS3",
Laxman Dewangan504382c2013-03-20 19:26:37 +053070 .sname = "smps3-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010071 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
72 .ctrl_addr = PALMAS_SMPS3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053073 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010074 },
75 {
76 .name = "SMPS45",
Laxman Dewangan504382c2013-03-20 19:26:37 +053077 .sname = "smps4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010078 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
79 .ctrl_addr = PALMAS_SMPS45_CTRL,
80 .tstep_addr = PALMAS_SMPS45_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053081 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010082 },
83 {
84 .name = "SMPS457",
Laxman Dewangan504382c2013-03-20 19:26:37 +053085 .sname = "smps4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010086 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
87 .ctrl_addr = PALMAS_SMPS45_CTRL,
88 .tstep_addr = PALMAS_SMPS45_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053089 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010090 },
91 {
92 .name = "SMPS6",
Laxman Dewangan504382c2013-03-20 19:26:37 +053093 .sname = "smps6-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010094 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
95 .ctrl_addr = PALMAS_SMPS6_CTRL,
96 .tstep_addr = PALMAS_SMPS6_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053097 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010098 },
99 {
100 .name = "SMPS7",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530101 .sname = "smps7-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100102 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
103 .ctrl_addr = PALMAS_SMPS7_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530104 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100105 },
106 {
107 .name = "SMPS8",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530108 .sname = "smps8-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100109 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
110 .ctrl_addr = PALMAS_SMPS8_CTRL,
111 .tstep_addr = PALMAS_SMPS8_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100113 },
114 {
115 .name = "SMPS9",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530116 .sname = "smps9-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100117 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
118 .ctrl_addr = PALMAS_SMPS9_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530119 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100120 },
121 {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530122 .name = "SMPS10_OUT2",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530123 .sname = "smps10-in",
Axel Line31089c2013-04-19 20:33:45 +0800124 .ctrl_addr = PALMAS_SMPS10_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530125 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100126 },
127 {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530128 .name = "SMPS10_OUT1",
129 .sname = "smps10-out2",
130 .ctrl_addr = PALMAS_SMPS10_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530131 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530132 },
133 {
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100134 .name = "LDO1",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530135 .sname = "ldo1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100136 .vsel_addr = PALMAS_LDO1_VOLTAGE,
137 .ctrl_addr = PALMAS_LDO1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530138 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100139 },
140 {
141 .name = "LDO2",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530142 .sname = "ldo2-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100143 .vsel_addr = PALMAS_LDO2_VOLTAGE,
144 .ctrl_addr = PALMAS_LDO2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530145 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100146 },
147 {
148 .name = "LDO3",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530149 .sname = "ldo3-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100150 .vsel_addr = PALMAS_LDO3_VOLTAGE,
151 .ctrl_addr = PALMAS_LDO3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530152 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100153 },
154 {
155 .name = "LDO4",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530156 .sname = "ldo4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100157 .vsel_addr = PALMAS_LDO4_VOLTAGE,
158 .ctrl_addr = PALMAS_LDO4_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530159 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100160 },
161 {
162 .name = "LDO5",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530163 .sname = "ldo5-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100164 .vsel_addr = PALMAS_LDO5_VOLTAGE,
165 .ctrl_addr = PALMAS_LDO5_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530166 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100167 },
168 {
169 .name = "LDO6",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530170 .sname = "ldo6-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100171 .vsel_addr = PALMAS_LDO6_VOLTAGE,
172 .ctrl_addr = PALMAS_LDO6_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530173 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100174 },
175 {
176 .name = "LDO7",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530177 .sname = "ldo7-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100178 .vsel_addr = PALMAS_LDO7_VOLTAGE,
179 .ctrl_addr = PALMAS_LDO7_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530180 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100181 },
182 {
183 .name = "LDO8",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530184 .sname = "ldo8-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100185 .vsel_addr = PALMAS_LDO8_VOLTAGE,
186 .ctrl_addr = PALMAS_LDO8_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530187 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100188 },
189 {
190 .name = "LDO9",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530191 .sname = "ldo9-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100192 .vsel_addr = PALMAS_LDO9_VOLTAGE,
193 .ctrl_addr = PALMAS_LDO9_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530194 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100195 },
196 {
197 .name = "LDOLN",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530198 .sname = "ldoln-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100199 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
200 .ctrl_addr = PALMAS_LDOLN_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100202 },
203 {
204 .name = "LDOUSB",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530205 .sname = "ldousb-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100206 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
207 .ctrl_addr = PALMAS_LDOUSB_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530208 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100209 },
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530210 {
211 .name = "REGEN1",
212 .ctrl_addr = PALMAS_REGEN1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530213 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530214 },
215 {
216 .name = "REGEN2",
217 .ctrl_addr = PALMAS_REGEN2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530218 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530219 },
220 {
221 .name = "REGEN3",
222 .ctrl_addr = PALMAS_REGEN3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530223 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530224 },
225 {
226 .name = "SYSEN1",
227 .ctrl_addr = PALMAS_SYSEN1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530228 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530229 },
230 {
231 .name = "SYSEN2",
232 .ctrl_addr = PALMAS_SYSEN2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530233 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530234 },
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100235};
236
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530237static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
238
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100239#define SMPS_CTRL_MODE_OFF 0x00
240#define SMPS_CTRL_MODE_ON 0x01
241#define SMPS_CTRL_MODE_ECO 0x02
242#define SMPS_CTRL_MODE_PWM 0x03
243
Laxman Dewangan0f45aa82013-09-04 15:20:06 +0530244#define PALMAS_SMPS_NUM_VOLTAGES 122
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100245#define PALMAS_SMPS10_NUM_VOLTAGES 2
246#define PALMAS_LDO_NUM_VOLTAGES 50
247
248#define SMPS10_VSEL (1<<3)
249#define SMPS10_BOOST_EN (1<<2)
250#define SMPS10_BYPASS_EN (1<<1)
251#define SMPS10_SWITCH_EN (1<<0)
252
253#define REGULATOR_SLAVE 0
254
255static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
256 unsigned int *dest)
257{
258 unsigned int addr;
259
260 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
261
262 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
263}
264
265static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
266 unsigned int value)
267{
268 unsigned int addr;
269
270 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
271
272 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
273}
274
275static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
276 unsigned int *dest)
277{
278 unsigned int addr;
279
280 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
281
282 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
283}
284
285static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
286 unsigned int value)
287{
288 unsigned int addr;
289
290 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
291
292 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
293}
294
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100295static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
296{
297 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
298 int id = rdev_get_id(dev);
299 unsigned int reg;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530300 bool rail_enable = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100301
302 palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
Axel Lin999f0c72012-06-07 17:08:21 +0800303 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100304
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530305 if (reg == SMPS_CTRL_MODE_OFF)
306 rail_enable = false;
307
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100308 switch (mode) {
309 case REGULATOR_MODE_NORMAL:
310 reg |= SMPS_CTRL_MODE_ON;
311 break;
312 case REGULATOR_MODE_IDLE:
313 reg |= SMPS_CTRL_MODE_ECO;
314 break;
315 case REGULATOR_MODE_FAST:
316 reg |= SMPS_CTRL_MODE_PWM;
317 break;
318 default:
319 return -EINVAL;
320 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100321
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530322 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
323 if (rail_enable)
324 palmas_smps_write(pmic->palmas,
325 palmas_regs_info[id].ctrl_addr, reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100326 return 0;
327}
328
329static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
330{
331 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
332 int id = rdev_get_id(dev);
333 unsigned int reg;
334
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530335 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100336
337 switch (reg) {
338 case SMPS_CTRL_MODE_ON:
339 return REGULATOR_MODE_NORMAL;
340 case SMPS_CTRL_MODE_ECO:
341 return REGULATOR_MODE_IDLE;
342 case SMPS_CTRL_MODE_PWM:
343 return REGULATOR_MODE_FAST;
344 }
345
346 return 0;
347}
348
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530349static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
350 int ramp_delay)
351{
352 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
353 int id = rdev_get_id(rdev);
354 unsigned int reg = 0;
355 unsigned int addr = palmas_regs_info[id].tstep_addr;
356 int ret;
357
Axel Linf22c2ba2013-04-19 14:18:48 +0800358 /* SMPS3 and SMPS7 do not have tstep_addr setting */
359 switch (id) {
360 case PALMAS_REG_SMPS3:
361 case PALMAS_REG_SMPS7:
362 return 0;
363 }
364
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530365 if (ramp_delay <= 0)
366 reg = 0;
Axel Lin0ea34b52013-04-22 18:22:49 +0800367 else if (ramp_delay <= 2500)
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530368 reg = 3;
Axel Lin0ea34b52013-04-22 18:22:49 +0800369 else if (ramp_delay <= 5000)
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530370 reg = 2;
371 else
372 reg = 1;
373
374 ret = palmas_smps_write(pmic->palmas, addr, reg);
375 if (ret < 0) {
376 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
377 return ret;
378 }
379
380 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
381 return ret;
382}
383
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100384static struct regulator_ops palmas_ops_smps = {
Keerthydbabd622014-05-22 14:48:29 +0530385 .is_enabled = regulator_is_enabled_regmap,
386 .enable = regulator_enable_regmap,
387 .disable = regulator_disable_regmap,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100388 .set_mode = palmas_set_mode_smps,
389 .get_mode = palmas_get_mode_smps,
Axel Linbdc4baa2012-11-29 10:01:44 +0800390 .get_voltage_sel = regulator_get_voltage_sel_regmap,
391 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Keerthydbabd622014-05-22 14:48:29 +0530392 .list_voltage = regulator_list_voltage_linear_range,
393 .map_voltage = regulator_map_voltage_linear_range,
394 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530395 .set_ramp_delay = palmas_smps_set_ramp_delay,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100396};
397
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530398static struct regulator_ops palmas_ops_ext_control_smps = {
399 .set_mode = palmas_set_mode_smps,
400 .get_mode = palmas_get_mode_smps,
401 .get_voltage_sel = regulator_get_voltage_sel_regmap,
402 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Keerthydbabd622014-05-22 14:48:29 +0530403 .list_voltage = regulator_list_voltage_linear_range,
404 .map_voltage = regulator_map_voltage_linear_range,
405 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530406 .set_ramp_delay = palmas_smps_set_ramp_delay,
407};
408
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100409static struct regulator_ops palmas_ops_smps10 = {
410 .is_enabled = regulator_is_enabled_regmap,
411 .enable = regulator_enable_regmap,
412 .disable = regulator_disable_regmap,
413 .get_voltage_sel = regulator_get_voltage_sel_regmap,
414 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Axel Lin8029a002012-05-22 12:26:42 +0800415 .list_voltage = regulator_list_voltage_linear,
416 .map_voltage = regulator_map_voltage_linear,
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530417 .set_bypass = regulator_set_bypass_regmap,
418 .get_bypass = regulator_get_bypass_regmap,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100419};
420
421static int palmas_is_enabled_ldo(struct regulator_dev *dev)
422{
423 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
424 int id = rdev_get_id(dev);
425 unsigned int reg;
426
427 palmas_ldo_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
428
429 reg &= PALMAS_LDO1_CTRL_STATUS;
430
431 return !!(reg);
432}
433
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100434static struct regulator_ops palmas_ops_ldo = {
435 .is_enabled = palmas_is_enabled_ldo,
436 .enable = regulator_enable_regmap,
437 .disable = regulator_disable_regmap,
Axel Lin4a247a92012-07-18 12:34:08 +0800438 .get_voltage_sel = regulator_get_voltage_sel_regmap,
439 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Axel Lin9119ff62012-11-27 10:27:34 +0800440 .list_voltage = regulator_list_voltage_linear,
441 .map_voltage = regulator_map_voltage_linear,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100442};
443
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530444static struct regulator_ops palmas_ops_ext_control_ldo = {
445 .get_voltage_sel = regulator_get_voltage_sel_regmap,
446 .set_voltage_sel = regulator_set_voltage_sel_regmap,
447 .list_voltage = regulator_list_voltage_linear,
448 .map_voltage = regulator_map_voltage_linear,
449};
450
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530451static struct regulator_ops palmas_ops_extreg = {
452 .is_enabled = regulator_is_enabled_regmap,
453 .enable = regulator_enable_regmap,
454 .disable = regulator_disable_regmap,
455};
456
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530457static struct regulator_ops palmas_ops_ext_control_extreg = {
458};
459
460static int palmas_regulator_config_external(struct palmas *palmas, int id,
461 struct palmas_reg_init *reg_init)
462{
463 int sleep_id = palmas_regs_info[id].sleep_id;
464 int ret;
465
466 ret = palmas_ext_control_req_config(palmas, sleep_id,
467 reg_init->roof_floor, true);
468 if (ret < 0)
469 dev_err(palmas->dev,
470 "Ext control config for regulator %d failed %d\n",
471 id, ret);
472 return ret;
473}
474
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100475/*
476 * setup the hardware based sleep configuration of the SMPS/LDO regulators
477 * from the platform data. This is different to the software based control
478 * supported by the regulator framework as it is controlled by toggling
479 * pins on the PMIC such as PREQ, SYSEN, ...
480 */
481static int palmas_smps_init(struct palmas *palmas, int id,
482 struct palmas_reg_init *reg_init)
483{
484 unsigned int reg;
485 unsigned int addr;
486 int ret;
487
488 addr = palmas_regs_info[id].ctrl_addr;
489
490 ret = palmas_smps_read(palmas, addr, &reg);
491 if (ret)
492 return ret;
493
Axel Linfedd89b2012-06-06 20:01:38 +0800494 switch (id) {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530495 case PALMAS_REG_SMPS10_OUT1:
496 case PALMAS_REG_SMPS10_OUT2:
Laxman Dewangan30590d02013-04-17 15:13:11 +0530497 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
498 if (reg_init->mode_sleep)
Axel Linfedd89b2012-06-06 20:01:38 +0800499 reg |= reg_init->mode_sleep <<
500 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
Axel Linfedd89b2012-06-06 20:01:38 +0800501 break;
502 default:
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100503 if (reg_init->warm_reset)
504 reg |= PALMAS_SMPS12_CTRL_WR_S;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530505 else
506 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100507
508 if (reg_init->roof_floor)
509 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530510 else
511 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100512
Laxman Dewangan30590d02013-04-17 15:13:11 +0530513 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
514 if (reg_init->mode_sleep)
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100515 reg |= reg_init->mode_sleep <<
516 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100517 }
Axel Linfedd89b2012-06-06 20:01:38 +0800518
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100519 ret = palmas_smps_write(palmas, addr, reg);
520 if (ret)
521 return ret;
522
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100523 if (palmas_regs_info[id].vsel_addr && reg_init->vsel) {
524 addr = palmas_regs_info[id].vsel_addr;
525
526 reg = reg_init->vsel;
527
528 ret = palmas_smps_write(palmas, addr, reg);
529 if (ret)
530 return ret;
531 }
532
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530533 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
534 (id != PALMAS_REG_SMPS10_OUT2)) {
535 /* Enable externally controlled regulator */
536 addr = palmas_regs_info[id].ctrl_addr;
537 ret = palmas_smps_read(palmas, addr, &reg);
538 if (ret < 0)
539 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100540
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530541 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
542 reg |= SMPS_CTRL_MODE_ON;
543 ret = palmas_smps_write(palmas, addr, reg);
544 if (ret < 0)
545 return ret;
546 }
547 return palmas_regulator_config_external(palmas, id, reg_init);
548 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100549 return 0;
550}
551
552static int palmas_ldo_init(struct palmas *palmas, int id,
553 struct palmas_reg_init *reg_init)
554{
555 unsigned int reg;
556 unsigned int addr;
557 int ret;
558
559 addr = palmas_regs_info[id].ctrl_addr;
560
Axel Lin2735dae2012-07-18 12:31:59 +0800561 ret = palmas_ldo_read(palmas, addr, &reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100562 if (ret)
563 return ret;
564
565 if (reg_init->warm_reset)
566 reg |= PALMAS_LDO1_CTRL_WR_S;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530567 else
568 reg &= ~PALMAS_LDO1_CTRL_WR_S;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100569
570 if (reg_init->mode_sleep)
571 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530572 else
573 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100574
Axel Lin2735dae2012-07-18 12:31:59 +0800575 ret = palmas_ldo_write(palmas, addr, reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100576 if (ret)
577 return ret;
578
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530579 if (reg_init->roof_floor) {
580 /* Enable externally controlled regulator */
581 addr = palmas_regs_info[id].ctrl_addr;
582 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
583 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
584 PALMAS_LDO1_CTRL_MODE_ACTIVE);
585 if (ret < 0) {
586 dev_err(palmas->dev,
587 "LDO Register 0x%02x update failed %d\n",
588 addr, ret);
589 return ret;
590 }
591 return palmas_regulator_config_external(palmas, id, reg_init);
592 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100593 return 0;
594}
595
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530596static int palmas_extreg_init(struct palmas *palmas, int id,
597 struct palmas_reg_init *reg_init)
598{
599 unsigned int addr;
600 int ret;
601 unsigned int val = 0;
602
603 addr = palmas_regs_info[id].ctrl_addr;
604
605 if (reg_init->mode_sleep)
606 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
607
608 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
609 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
610 if (ret < 0) {
611 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
612 addr, ret);
613 return ret;
614 }
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530615
616 if (reg_init->roof_floor) {
617 /* Enable externally controlled regulator */
618 addr = palmas_regs_info[id].ctrl_addr;
619 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
620 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
621 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
622 if (ret < 0) {
623 dev_err(palmas->dev,
624 "Resource Register 0x%02x update failed %d\n",
625 addr, ret);
626 return ret;
627 }
628 return palmas_regulator_config_external(palmas, id, reg_init);
629 }
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530630 return 0;
631}
632
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530633static void palmas_enable_ldo8_track(struct palmas *palmas)
634{
635 unsigned int reg;
636 unsigned int addr;
637 int ret;
638
639 addr = palmas_regs_info[PALMAS_REG_LDO8].ctrl_addr;
640
641 ret = palmas_ldo_read(palmas, addr, &reg);
642 if (ret) {
643 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
644 return;
645 }
646
647 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
648 ret = palmas_ldo_write(palmas, addr, reg);
649 if (ret < 0) {
650 dev_err(palmas->dev, "Error in enabling tracking mode\n");
651 return;
652 }
653 /*
654 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
655 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
656 * and can be set from 0.45 to 1.65 V.
657 */
658 addr = palmas_regs_info[PALMAS_REG_LDO8].vsel_addr;
659 ret = palmas_ldo_read(palmas, addr, &reg);
660 if (ret) {
661 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
662 return;
663 }
664
665 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
666 ret = palmas_ldo_write(palmas, addr, reg);
667 if (ret < 0)
668 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
669
670 return;
671}
672
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200673static struct of_regulator_match palmas_matches[] = {
674 { .name = "smps12", },
675 { .name = "smps123", },
676 { .name = "smps3", },
677 { .name = "smps45", },
678 { .name = "smps457", },
679 { .name = "smps6", },
680 { .name = "smps7", },
681 { .name = "smps8", },
682 { .name = "smps9", },
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530683 { .name = "smps10_out2", },
684 { .name = "smps10_out1", },
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200685 { .name = "ldo1", },
686 { .name = "ldo2", },
687 { .name = "ldo3", },
688 { .name = "ldo4", },
689 { .name = "ldo5", },
690 { .name = "ldo6", },
691 { .name = "ldo7", },
692 { .name = "ldo8", },
693 { .name = "ldo9", },
694 { .name = "ldoln", },
695 { .name = "ldousb", },
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530696 { .name = "regen1", },
697 { .name = "regen2", },
698 { .name = "regen3", },
699 { .name = "sysen1", },
700 { .name = "sysen2", },
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200701};
702
Bill Pembertona5023572012-11-19 13:22:22 -0500703static void palmas_dt_to_pdata(struct device *dev,
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200704 struct device_node *node,
705 struct palmas_pmic_platform_data *pdata)
706{
707 struct device_node *regulators;
708 u32 prop;
709 int idx, ret;
710
Axel Linc92f5dd2013-01-27 21:16:56 +0800711 node = of_node_get(node);
Laxman Dewanganacc1cca2013-10-03 19:36:37 +0530712 regulators = of_get_child_by_name(node, "regulators");
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200713 if (!regulators) {
714 dev_info(dev, "regulator node not found\n");
715 return;
716 }
717
718 ret = of_regulator_match(dev, regulators, palmas_matches,
719 PALMAS_NUM_REGS);
Axel Linc92f5dd2013-01-27 21:16:56 +0800720 of_node_put(regulators);
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200721 if (ret < 0) {
722 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
723 return;
724 }
725
726 for (idx = 0; idx < PALMAS_NUM_REGS; idx++) {
727 if (!palmas_matches[idx].init_data ||
728 !palmas_matches[idx].of_node)
729 continue;
730
731 pdata->reg_data[idx] = palmas_matches[idx].init_data;
732
733 pdata->reg_init[idx] = devm_kzalloc(dev,
734 sizeof(struct palmas_reg_init), GFP_KERNEL);
735
Graeme Gregory7be859f2013-03-07 13:17:48 +0000736 pdata->reg_init[idx]->warm_reset =
Axel Lin71f21462013-03-12 23:40:19 +0800737 of_property_read_bool(palmas_matches[idx].of_node,
738 "ti,warm-reset");
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200739
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530740 ret = of_property_read_u32(palmas_matches[idx].of_node,
741 "ti,roof-floor", &prop);
742 /* EINVAL: Property not found */
743 if (ret != -EINVAL) {
744 int econtrol;
745
746 /* use default value, when no value is specified */
747 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
748 if (!ret) {
749 switch (prop) {
750 case 1:
751 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
752 break;
753 case 2:
754 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
755 break;
756 case 3:
757 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
758 break;
759 default:
760 WARN_ON(1);
761 dev_warn(dev,
762 "%s: Invalid roof-floor option: %u\n",
763 palmas_matches[idx].name, prop);
764 break;
765 }
766 }
767 pdata->reg_init[idx]->roof_floor = econtrol;
768 }
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200769
770 ret = of_property_read_u32(palmas_matches[idx].of_node,
J Keerthy3c870e32013-02-18 10:44:20 +0530771 "ti,mode-sleep", &prop);
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200772 if (!ret)
773 pdata->reg_init[idx]->mode_sleep = prop;
774
Graeme Gregory7be859f2013-03-07 13:17:48 +0000775 ret = of_property_read_bool(palmas_matches[idx].of_node,
776 "ti,smps-range");
777 if (ret)
778 pdata->reg_init[idx]->vsel =
779 PALMAS_SMPS12_VOLTAGE_RANGE;
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200780
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530781 if (idx == PALMAS_REG_LDO8)
782 pdata->enable_ldo8_tracking = of_property_read_bool(
783 palmas_matches[idx].of_node,
784 "ti,enable-ldo8-tracking");
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200785 }
786
Graeme Gregory7be859f2013-03-07 13:17:48 +0000787 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200788}
789
790
Laxman Dewanganbbcf50b2013-03-18 14:59:49 +0530791static int palmas_regulators_probe(struct platform_device *pdev)
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100792{
793 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
Jingoo Handff91d02013-07-30 17:20:47 +0900794 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200795 struct device_node *node = pdev->dev.of_node;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100796 struct regulator_dev *rdev;
797 struct regulator_config config = { };
798 struct palmas_pmic *pmic;
799 struct palmas_reg_init *reg_init;
800 int id = 0, ret;
801 unsigned int addr, reg;
802
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200803 if (node && !pdata) {
804 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
805
806 if (!pdata)
807 return -ENOMEM;
808
809 palmas_dt_to_pdata(&pdev->dev, node, pdata);
810 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100811
812 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
813 if (!pmic)
814 return -ENOMEM;
815
816 pmic->dev = &pdev->dev;
817 pmic->palmas = palmas;
818 palmas->pmic = pmic;
819 platform_set_drvdata(pdev, pmic);
820
821 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
822 if (ret)
Axel Lin1c9d2d72012-07-18 12:33:20 +0800823 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100824
825 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
826 pmic->smps123 = 1;
827
828 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
829 pmic->smps457 = 1;
830
831 config.regmap = palmas->regmap[REGULATOR_SLAVE];
832 config.dev = &pdev->dev;
833 config.driver_data = pmic;
834
835 for (id = 0; id < PALMAS_REG_LDO1; id++) {
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530836 bool ramp_delay_support = false;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100837
838 /*
839 * Miss out regulators which are not available due
840 * to slaving configurations.
841 */
842 switch (id) {
843 case PALMAS_REG_SMPS12:
844 case PALMAS_REG_SMPS3:
845 if (pmic->smps123)
846 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530847 if (id == PALMAS_REG_SMPS12)
848 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100849 break;
850 case PALMAS_REG_SMPS123:
851 if (!pmic->smps123)
852 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530853 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100854 break;
855 case PALMAS_REG_SMPS45:
856 case PALMAS_REG_SMPS7:
857 if (pmic->smps457)
858 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530859 if (id == PALMAS_REG_SMPS45)
860 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100861 break;
862 case PALMAS_REG_SMPS457:
863 if (!pmic->smps457)
864 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530865 ramp_delay_support = true;
866 break;
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530867 case PALMAS_REG_SMPS10_OUT1:
868 case PALMAS_REG_SMPS10_OUT2:
J Keerthy1ffb0be2013-06-19 11:27:48 +0530869 if (!PALMAS_PMIC_HAS(palmas, SMPS10_BOOST))
870 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530871 }
872
Sachin Kamat3f4d6362013-05-08 16:09:06 +0530873 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530874 ramp_delay_support = true;
875
876 if (ramp_delay_support) {
877 addr = palmas_regs_info[id].tstep_addr;
878 ret = palmas_smps_read(pmic->palmas, addr, &reg);
879 if (ret < 0) {
880 dev_err(&pdev->dev,
881 "reading TSTEP reg failed: %d\n", ret);
Sachin Kamat51c86b32013-09-04 12:01:01 +0530882 return ret;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530883 }
884 pmic->desc[id].ramp_delay =
885 palmas_smps_ramp_delay[reg & 0x3];
886 pmic->ramp_delay[id] = pmic->desc[id].ramp_delay;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100887 }
888
Axel Linbdc4baa2012-11-29 10:01:44 +0800889 /* Initialise sleep/init values from platform data */
890 if (pdata && pdata->reg_init[id]) {
891 reg_init = pdata->reg_init[id];
892 ret = palmas_smps_init(palmas, id, reg_init);
893 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +0530894 return ret;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530895 } else {
896 reg_init = NULL;
Axel Linbdc4baa2012-11-29 10:01:44 +0800897 }
898
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100899 /* Register the regulators */
900 pmic->desc[id].name = palmas_regs_info[id].name;
901 pmic->desc[id].id = id;
902
Axel Linfedd89b2012-06-06 20:01:38 +0800903 switch (id) {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530904 case PALMAS_REG_SMPS10_OUT1:
905 case PALMAS_REG_SMPS10_OUT2:
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100906 pmic->desc[id].n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
907 pmic->desc[id].ops = &palmas_ops_smps10;
Axel Lin12565b12012-07-18 12:31:03 +0800908 pmic->desc[id].vsel_reg =
909 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
910 PALMAS_SMPS10_CTRL);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100911 pmic->desc[id].vsel_mask = SMPS10_VSEL;
Graeme Gregorya68de072012-06-22 13:36:20 +0100912 pmic->desc[id].enable_reg =
913 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
Kishon Vijay Abraham If2321682013-05-30 15:55:09 +0530914 PALMAS_SMPS10_CTRL);
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530915 if (id == PALMAS_REG_SMPS10_OUT1)
916 pmic->desc[id].enable_mask = SMPS10_SWITCH_EN;
917 else
918 pmic->desc[id].enable_mask = SMPS10_BOOST_EN;
919 pmic->desc[id].bypass_reg =
920 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
921 PALMAS_SMPS10_CTRL);
922 pmic->desc[id].bypass_mask = SMPS10_BYPASS_EN;
Axel Lin8029a002012-05-22 12:26:42 +0800923 pmic->desc[id].min_uV = 3750000;
924 pmic->desc[id].uV_step = 1250000;
Axel Linfedd89b2012-06-06 20:01:38 +0800925 break;
926 default:
Axel Linbdc4baa2012-11-29 10:01:44 +0800927 /*
928 * Read and store the RANGE bit for later use
929 * This must be done before regulator is probed,
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530930 * otherwise we error in probe with unsupportable
931 * ranges. Read the current smps mode for later use.
Axel Linbdc4baa2012-11-29 10:01:44 +0800932 */
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100933 addr = palmas_regs_info[id].vsel_addr;
Keerthydbabd622014-05-22 14:48:29 +0530934 pmic->desc[id].n_linear_ranges = 3;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100935
936 ret = palmas_smps_read(pmic->palmas, addr, &reg);
937 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +0530938 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100939 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
940 pmic->range[id] = 1;
Keerthydbabd622014-05-22 14:48:29 +0530941 if (pmic->range[id])
942 pmic->desc[id].linear_ranges = smps_high_ranges;
943 else
944 pmic->desc[id].linear_ranges = smps_low_ranges;
Axel Linbdc4baa2012-11-29 10:01:44 +0800945
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530946 if (reg_init && reg_init->roof_floor)
947 pmic->desc[id].ops =
948 &palmas_ops_ext_control_smps;
949 else
950 pmic->desc[id].ops = &palmas_ops_smps;
Axel Linbdc4baa2012-11-29 10:01:44 +0800951 pmic->desc[id].n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
952 pmic->desc[id].vsel_reg =
953 PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
954 palmas_regs_info[id].vsel_addr);
955 pmic->desc[id].vsel_mask =
956 PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530957
958 /* Read the smps mode for later use. */
959 addr = palmas_regs_info[id].ctrl_addr;
960 ret = palmas_smps_read(pmic->palmas, addr, &reg);
961 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +0530962 return ret;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530963 pmic->current_reg_mode[id] = reg &
964 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100965 }
966
Axel Linbdc4baa2012-11-29 10:01:44 +0800967 pmic->desc[id].type = REGULATOR_VOLTAGE;
968 pmic->desc[id].owner = THIS_MODULE;
969
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200970 if (pdata)
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100971 config.init_data = pdata->reg_data[id];
972 else
973 config.init_data = NULL;
974
Laxman Dewangan504382c2013-03-20 19:26:37 +0530975 pmic->desc[id].supply_name = palmas_regs_info[id].sname;
Graeme Gregorya361cd9f2012-08-28 13:47:40 +0200976 config.of_node = palmas_matches[id].of_node;
977
Sachin Kamat51c86b32013-09-04 12:01:01 +0530978 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id],
979 &config);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100980 if (IS_ERR(rdev)) {
981 dev_err(&pdev->dev,
982 "failed to register %s regulator\n",
983 pdev->name);
Sachin Kamat51c86b32013-09-04 12:01:01 +0530984 return PTR_ERR(rdev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100985 }
986
987 /* Save regulator for cleanup */
988 pmic->rdev[id] = rdev;
989 }
990
991 /* Start this loop from the id left from previous loop */
992 for (; id < PALMAS_NUM_REGS; id++) {
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530993 if (pdata && pdata->reg_init[id])
994 reg_init = pdata->reg_init[id];
995 else
996 reg_init = NULL;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100997
998 /* Miss out regulators which are not available due
999 * to alternate functions.
1000 */
1001
1002 /* Register the regulators */
1003 pmic->desc[id].name = palmas_regs_info[id].name;
1004 pmic->desc[id].id = id;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001005 pmic->desc[id].type = REGULATOR_VOLTAGE;
1006 pmic->desc[id].owner = THIS_MODULE;
Laxman Dewanganaa07f022013-04-17 15:13:12 +05301007
1008 if (id < PALMAS_REG_REGEN1) {
1009 pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301010 if (reg_init && reg_init->roof_floor)
1011 pmic->desc[id].ops =
1012 &palmas_ops_ext_control_ldo;
1013 else
1014 pmic->desc[id].ops = &palmas_ops_ldo;
Laxman Dewanganaa07f022013-04-17 15:13:12 +05301015 pmic->desc[id].min_uV = 900000;
1016 pmic->desc[id].uV_step = 50000;
1017 pmic->desc[id].linear_min_sel = 1;
Laxman Dewangan087d30e2013-09-10 16:48:07 +05301018 pmic->desc[id].enable_time = 500;
Laxman Dewanganaa07f022013-04-17 15:13:12 +05301019 pmic->desc[id].vsel_reg =
1020 PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
Axel Lin4a247a92012-07-18 12:34:08 +08001021 palmas_regs_info[id].vsel_addr);
Laxman Dewanganaa07f022013-04-17 15:13:12 +05301022 pmic->desc[id].vsel_mask =
1023 PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1024 pmic->desc[id].enable_reg =
1025 PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
Graeme Gregorya68de072012-06-22 13:36:20 +01001026 palmas_regs_info[id].ctrl_addr);
Laxman Dewanganaa07f022013-04-17 15:13:12 +05301027 pmic->desc[id].enable_mask =
1028 PALMAS_LDO1_CTRL_MODE_ACTIVE;
Laxman Dewangan17c11a72013-04-17 15:13:13 +05301029
1030 /* Check if LDO8 is in tracking mode or not */
1031 if (pdata && (id == PALMAS_REG_LDO8) &&
1032 pdata->enable_ldo8_tracking) {
1033 palmas_enable_ldo8_track(palmas);
Axel Lin3df4a81c2013-04-19 00:53:52 +08001034 pmic->desc[id].min_uV = 450000;
Laxman Dewangan17c11a72013-04-17 15:13:13 +05301035 pmic->desc[id].uV_step = 25000;
1036 }
Laxman Dewangan087d30e2013-09-10 16:48:07 +05301037
1038 /* LOD6 in vibrator mode will have enable time 2000us */
1039 if (pdata && pdata->ldo6_vibrator &&
1040 (id == PALMAS_REG_LDO6))
1041 pmic->desc[id].enable_time = 2000;
Laxman Dewanganaa07f022013-04-17 15:13:12 +05301042 } else {
1043 pmic->desc[id].n_voltages = 1;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301044 if (reg_init && reg_init->roof_floor)
1045 pmic->desc[id].ops =
1046 &palmas_ops_ext_control_extreg;
1047 else
1048 pmic->desc[id].ops = &palmas_ops_extreg;
Laxman Dewanganaa07f022013-04-17 15:13:12 +05301049 pmic->desc[id].enable_reg =
1050 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
1051 palmas_regs_info[id].ctrl_addr);
1052 pmic->desc[id].enable_mask =
1053 PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1054 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001055
Graeme Gregorya361cd9f2012-08-28 13:47:40 +02001056 if (pdata)
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001057 config.init_data = pdata->reg_data[id];
1058 else
1059 config.init_data = NULL;
1060
Laxman Dewangan504382c2013-03-20 19:26:37 +05301061 pmic->desc[id].supply_name = palmas_regs_info[id].sname;
Graeme Gregorya361cd9f2012-08-28 13:47:40 +02001062 config.of_node = palmas_matches[id].of_node;
1063
Sachin Kamat51c86b32013-09-04 12:01:01 +05301064 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id],
1065 &config);
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001066 if (IS_ERR(rdev)) {
1067 dev_err(&pdev->dev,
1068 "failed to register %s regulator\n",
1069 pdev->name);
Sachin Kamat51c86b32013-09-04 12:01:01 +05301070 return PTR_ERR(rdev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001071 }
1072
1073 /* Save regulator for cleanup */
1074 pmic->rdev[id] = rdev;
1075
1076 /* Initialise sleep/init values from platform data */
Graeme Gregorya361cd9f2012-08-28 13:47:40 +02001077 if (pdata) {
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001078 reg_init = pdata->reg_init[id];
1079 if (reg_init) {
Laxman Dewanganaa07f022013-04-17 15:13:12 +05301080 if (id < PALMAS_REG_REGEN1)
1081 ret = palmas_ldo_init(palmas,
1082 id, reg_init);
1083 else
1084 ret = palmas_extreg_init(palmas,
1085 id, reg_init);
Axel Lincb2e45e32013-09-05 11:31:25 +08001086 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301087 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001088 }
1089 }
1090 }
1091
Laxman Dewangan17c11a72013-04-17 15:13:13 +05301092
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001093 return 0;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001094}
1095
Jingoo Han2449df92014-05-07 17:07:54 +09001096static const struct of_device_id of_palmas_match_tbl[] = {
Graeme Gregorya361cd9f2012-08-28 13:47:40 +02001097 { .compatible = "ti,palmas-pmic", },
Graeme Gregory7be859f2013-03-07 13:17:48 +00001098 { .compatible = "ti,twl6035-pmic", },
1099 { .compatible = "ti,twl6036-pmic", },
1100 { .compatible = "ti,twl6037-pmic", },
1101 { .compatible = "ti,tps65913-pmic", },
1102 { .compatible = "ti,tps65914-pmic", },
1103 { .compatible = "ti,tps80036-pmic", },
J Keerthyb5c46782013-06-20 16:32:15 +05301104 { .compatible = "ti,tps659038-pmic", },
Graeme Gregorya361cd9f2012-08-28 13:47:40 +02001105 { /* end */ }
1106};
1107
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001108static struct platform_driver palmas_driver = {
1109 .driver = {
1110 .name = "palmas-pmic",
Graeme Gregorya361cd9f2012-08-28 13:47:40 +02001111 .of_match_table = of_palmas_match_tbl,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001112 .owner = THIS_MODULE,
1113 },
Laxman Dewanganbbcf50b2013-03-18 14:59:49 +05301114 .probe = palmas_regulators_probe,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001115};
1116
1117static int __init palmas_init(void)
1118{
1119 return platform_driver_register(&palmas_driver);
1120}
1121subsys_initcall(palmas_init);
1122
1123static void __exit palmas_exit(void)
1124{
1125 platform_driver_unregister(&palmas_driver);
1126}
1127module_exit(palmas_exit);
1128
1129MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1130MODULE_DESCRIPTION("Palmas voltage regulator driver");
1131MODULE_LICENSE("GPL");
1132MODULE_ALIAS("platform:palmas-pmic");
Graeme Gregorya361cd9f2012-08-28 13:47:40 +02001133MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);