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Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -07001/*
Grant Likelyca632f52011-06-06 01:16:30 -06002 * Memory-mapped interface driver for DW SPI Core
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -07003 *
4 * Copyright (c) 2010, Octasic semiconductor.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 */
10
11#include <linux/clk.h>
Jamie Iles50c01fc2011-01-11 12:43:52 +000012#include <linux/err.h>
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -070013#include <linux/interrupt.h>
14#include <linux/platform_device.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090015#include <linux/slab.h>
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -070016#include <linux/spi/spi.h>
Grant Likely568a60e2011-02-28 12:47:12 -070017#include <linux/scatterlist.h>
Alexandre Bellonic2c25cc2018-07-27 21:53:56 +020018#include <linux/mfd/syscon.h>
Paul Gortmakerd7614de2011-07-03 15:44:29 -040019#include <linux/module.h>
Steffen Trumtrar22dae172014-06-13 15:36:18 +020020#include <linux/of.h>
Baruch Siachd9c73bb2014-01-31 12:07:47 +020021#include <linux/of_gpio.h>
Steffen Trumtrar22dae172014-06-13 15:36:18 +020022#include <linux/of_platform.h>
Andy Shevchenko98999952015-10-14 23:12:25 +030023#include <linux/property.h>
Alexandre Bellonic2c25cc2018-07-27 21:53:56 +020024#include <linux/regmap.h>
Grant Likely568a60e2011-02-28 12:47:12 -070025
Grant Likelyca632f52011-06-06 01:16:30 -060026#include "spi-dw.h"
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -070027
28#define DRIVER_NAME "dw_spi_mmio"
29
30struct dw_spi_mmio {
Jean-Hugues Deschenes0a4c1d72010-01-21 09:55:42 -070031 struct dw_spi dws;
32 struct clk *clk;
Alexandre Bellonic2c25cc2018-07-27 21:53:56 +020033 void *priv;
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -070034};
35
Alexandre Bellonic2c25cc2018-07-27 21:53:56 +020036#define MSCC_CPU_SYSTEM_CTRL_GENERAL_CTRL 0x24
37#define OCELOT_IF_SI_OWNER_MASK GENMASK(5, 4)
38#define OCELOT_IF_SI_OWNER_OFFSET 4
39#define MSCC_IF_SI_OWNER_SISL 0
40#define MSCC_IF_SI_OWNER_SIBM 1
41#define MSCC_IF_SI_OWNER_SIMC 2
42
43#define MSCC_SPI_MST_SW_MODE 0x14
44#define MSCC_SPI_MST_SW_MODE_SW_PIN_CTRL_MODE BIT(13)
45#define MSCC_SPI_MST_SW_MODE_SW_SPI_CS(x) (x << 5)
46
47struct dw_spi_mscc {
48 struct regmap *syscon;
49 void __iomem *spi_mst;
50};
51
52/*
53 * The Designware SPI controller (referred to as master in the documentation)
54 * automatically deasserts chip select when the tx fifo is empty. The chip
55 * selects then needs to be either driven as GPIOs or, for the first 4 using the
56 * the SPI boot controller registers. the final chip select is an OR gate
57 * between the Designware SPI controller and the SPI boot controller.
58 */
59static void dw_spi_mscc_set_cs(struct spi_device *spi, bool enable)
60{
61 struct dw_spi *dws = spi_master_get_devdata(spi->master);
62 struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws);
63 struct dw_spi_mscc *dwsmscc = dwsmmio->priv;
64 u32 cs = spi->chip_select;
65
66 if (cs < 4) {
67 u32 sw_mode = MSCC_SPI_MST_SW_MODE_SW_PIN_CTRL_MODE;
68
69 if (!enable)
70 sw_mode |= MSCC_SPI_MST_SW_MODE_SW_SPI_CS(BIT(cs));
71
72 writel(sw_mode, dwsmscc->spi_mst + MSCC_SPI_MST_SW_MODE);
73 }
74
75 dw_spi_set_cs(spi, enable);
76}
77
78static int dw_spi_mscc_init(struct platform_device *pdev,
79 struct dw_spi_mmio *dwsmmio)
80{
81 struct dw_spi_mscc *dwsmscc;
82 struct resource *res;
83
84 dwsmscc = devm_kzalloc(&pdev->dev, sizeof(*dwsmscc), GFP_KERNEL);
85 if (!dwsmscc)
86 return -ENOMEM;
87
88 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
89 dwsmscc->spi_mst = devm_ioremap_resource(&pdev->dev, res);
90 if (IS_ERR(dwsmscc->spi_mst)) {
91 dev_err(&pdev->dev, "SPI_MST region map failed\n");
92 return PTR_ERR(dwsmscc->spi_mst);
93 }
94
95 dwsmscc->syscon = syscon_regmap_lookup_by_compatible("mscc,ocelot-cpu-syscon");
96 if (IS_ERR(dwsmscc->syscon))
97 return PTR_ERR(dwsmscc->syscon);
98
99 /* Deassert all CS */
100 writel(0, dwsmscc->spi_mst + MSCC_SPI_MST_SW_MODE);
101
102 /* Select the owner of the SI interface */
103 regmap_update_bits(dwsmscc->syscon, MSCC_CPU_SYSTEM_CTRL_GENERAL_CTRL,
104 OCELOT_IF_SI_OWNER_MASK,
105 MSCC_IF_SI_OWNER_SIMC << OCELOT_IF_SI_OWNER_OFFSET);
106
107 dwsmmio->dws.set_cs = dw_spi_mscc_set_cs;
108 dwsmmio->priv = dwsmscc;
109
110 return 0;
111}
112
Grant Likelyfd4a3192012-12-07 16:57:14 +0000113static int dw_spi_mmio_probe(struct platform_device *pdev)
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700114{
Alexandre Bellonic2c25cc2018-07-27 21:53:56 +0200115 int (*init_func)(struct platform_device *pdev,
116 struct dw_spi_mmio *dwsmmio);
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700117 struct dw_spi_mmio *dwsmmio;
118 struct dw_spi *dws;
Baruch Siach04f421e2013-12-30 20:30:44 +0200119 struct resource *mem;
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700120 int ret;
Steffen Trumtrar22dae172014-06-13 15:36:18 +0200121 int num_cs;
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700122
Baruch Siach04f421e2013-12-30 20:30:44 +0200123 dwsmmio = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_mmio),
124 GFP_KERNEL);
125 if (!dwsmmio)
126 return -ENOMEM;
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700127
128 dws = &dwsmmio->dws;
129
130 /* Get basic io resource and map it */
131 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Baruch Siach04f421e2013-12-30 20:30:44 +0200132 dws->regs = devm_ioremap_resource(&pdev->dev, mem);
133 if (IS_ERR(dws->regs)) {
134 dev_err(&pdev->dev, "SPI region map failed\n");
135 return PTR_ERR(dws->regs);
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700136 }
137
138 dws->irq = platform_get_irq(pdev, 0);
139 if (dws->irq < 0) {
140 dev_err(&pdev->dev, "no irq resource?\n");
Baruch Siach04f421e2013-12-30 20:30:44 +0200141 return dws->irq; /* -ENXIO */
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700142 }
143
Baruch Siach04f421e2013-12-30 20:30:44 +0200144 dwsmmio->clk = devm_clk_get(&pdev->dev, NULL);
145 if (IS_ERR(dwsmmio->clk))
146 return PTR_ERR(dwsmmio->clk);
Baruch Siach020fe3f2013-12-30 20:30:45 +0200147 ret = clk_prepare_enable(dwsmmio->clk);
Baruch Siach04f421e2013-12-30 20:30:44 +0200148 if (ret)
149 return ret;
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700150
Baruch Siach2418991e2014-01-26 10:14:32 +0200151 dws->bus_num = pdev->id;
Steffen Trumtrar22dae172014-06-13 15:36:18 +0200152
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700153 dws->max_freq = clk_get_rate(dwsmmio->clk);
154
Andy Shevchenko98999952015-10-14 23:12:25 +0300155 device_property_read_u32(&pdev->dev, "reg-io-width", &dws->reg_io_width);
Michael van der Westhuizenc4fe57f2015-08-18 22:21:53 +0200156
Steffen Trumtrar22dae172014-06-13 15:36:18 +0200157 num_cs = 4;
158
Andy Shevchenko98999952015-10-14 23:12:25 +0300159 device_property_read_u32(&pdev->dev, "num-cs", &num_cs);
Steffen Trumtrar22dae172014-06-13 15:36:18 +0200160
161 dws->num_cs = num_cs;
162
Baruch Siachd9c73bb2014-01-31 12:07:47 +0200163 if (pdev->dev.of_node) {
164 int i;
165
166 for (i = 0; i < dws->num_cs; i++) {
167 int cs_gpio = of_get_named_gpio(pdev->dev.of_node,
168 "cs-gpios", i);
169
170 if (cs_gpio == -EPROBE_DEFER) {
171 ret = cs_gpio;
172 goto out;
173 }
174
175 if (gpio_is_valid(cs_gpio)) {
176 ret = devm_gpio_request(&pdev->dev, cs_gpio,
177 dev_name(&pdev->dev));
178 if (ret)
179 goto out;
180 }
181 }
182 }
183
Alexandre Bellonic2c25cc2018-07-27 21:53:56 +0200184 init_func = device_get_match_data(&pdev->dev);
185 if (init_func) {
186 ret = init_func(pdev, dwsmmio);
187 if (ret)
188 goto out;
189 }
190
Baruch Siach04f421e2013-12-30 20:30:44 +0200191 ret = dw_spi_add_host(&pdev->dev, dws);
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700192 if (ret)
Baruch Siach04f421e2013-12-30 20:30:44 +0200193 goto out;
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700194
195 platform_set_drvdata(pdev, dwsmmio);
196 return 0;
197
Baruch Siach04f421e2013-12-30 20:30:44 +0200198out:
Baruch Siach020fe3f2013-12-30 20:30:45 +0200199 clk_disable_unprepare(dwsmmio->clk);
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700200 return ret;
201}
202
Grant Likelyfd4a3192012-12-07 16:57:14 +0000203static int dw_spi_mmio_remove(struct platform_device *pdev)
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700204{
205 struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev);
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700206
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700207 dw_spi_remove_host(&dwsmmio->dws);
Marek Vasut400c18e2017-04-18 20:09:06 +0200208 clk_disable_unprepare(dwsmmio->clk);
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700209
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700210 return 0;
211}
212
Steffen Trumtrar22dae172014-06-13 15:36:18 +0200213static const struct of_device_id dw_spi_mmio_of_match[] = {
214 { .compatible = "snps,dw-apb-ssi", },
Alexandre Bellonic2c25cc2018-07-27 21:53:56 +0200215 { .compatible = "mscc,ocelot-spi", .data = dw_spi_mscc_init},
Steffen Trumtrar22dae172014-06-13 15:36:18 +0200216 { /* end of table */}
217};
218MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);
219
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700220static struct platform_driver dw_spi_mmio_driver = {
Grant Likely940ab882011-10-05 11:29:49 -0600221 .probe = dw_spi_mmio_probe,
Grant Likelyfd4a3192012-12-07 16:57:14 +0000222 .remove = dw_spi_mmio_remove,
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700223 .driver = {
224 .name = DRIVER_NAME,
Steffen Trumtrar22dae172014-06-13 15:36:18 +0200225 .of_match_table = dw_spi_mmio_of_match,
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700226 },
227};
Grant Likely940ab882011-10-05 11:29:49 -0600228module_platform_driver(dw_spi_mmio_driver);
Jean-Hugues Deschenesf7b6fd62010-01-21 07:46:42 -0700229
230MODULE_AUTHOR("Jean-Hugues Deschenes <jean-hugues.deschenes@octasic.com>");
231MODULE_DESCRIPTION("Memory-mapped I/O interface driver for DW SPI Core");
232MODULE_LICENSE("GPL v2");