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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02002/*
Mika Westerberg15c67842018-10-01 12:31:22 +03003 * Thunderbolt driver - bus logic (NHI independent)
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02004 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
Mika Westerberg15c67842018-10-01 12:31:22 +03006 * Copyright (C) 2018, Intel Corporation
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02007 */
8
9#ifndef TB_H_
10#define TB_H_
11
Mika Westerberge6b245c2017-06-06 15:25:17 +030012#include <linux/nvmem-provider.h>
Andreas Noevera25c8b22014-06-03 22:04:02 +020013#include <linux/pci.h>
Mika Westerbergd1ff7022017-10-02 13:38:34 +030014#include <linux/thunderbolt.h>
Mika Westerbergbfe778a2017-06-06 15:25:01 +030015#include <linux/uuid.h>
Gil Fineb017a462022-05-26 13:59:20 +030016#include <linux/bitfield.h>
Andreas Noevera25c8b22014-06-03 22:04:02 +020017
18#include "tb_regs.h"
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020019#include "ctl.h"
Mika Westerberg3e136762017-06-06 15:25:14 +030020#include "dma_port.h"
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020021
Sanjay R Mehta7af9da8c2023-02-14 13:13:50 -060022/* Keep link controller awake during update */
23#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
24/* Disable CLx if not supported */
25#define QUIRK_NO_CLX BIT(1)
Mika Westerberga75e0682024-01-26 15:55:55 +020026/* Need to keep power on while USB4 port is in redrive mode */
27#define QUIRK_KEEP_POWER_IN_DP_REDRIVE BIT(2)
Sanjay R Mehta7af9da8c2023-02-14 13:13:50 -060028
Andreas Noeverd6cc51c2014-06-03 22:04:00 +020029/**
Mika Westerberg719a5fe2020-03-05 11:37:15 +020030 * struct tb_nvm - Structure holding NVM information
31 * @dev: Owner of the NVM
Mika Westerberge6b245c2017-06-06 15:25:17 +030032 * @major: Major version number of the active NVM portion
33 * @minor: Minor version number of the active NVM portion
34 * @id: Identifier used with both NVM portions
35 * @active: Active portion NVMem device
Szuying Chenaef9c692022-09-02 17:40:08 +080036 * @active_size: Size in bytes of the active NVM
Mika Westerberge6b245c2017-06-06 15:25:17 +030037 * @non_active: Non-active portion NVMem device
38 * @buf: Buffer where the NVM image is stored before it is written to
39 * the actual NVM flash device
Szuying Chenaef9c692022-09-02 17:40:08 +080040 * @buf_data_start: Where the actual image starts after skipping
41 * possible headers
Mika Westerberge6b245c2017-06-06 15:25:17 +030042 * @buf_data_size: Number of bytes actually consumed by the new NVM
43 * image
Mika Westerberg719a5fe2020-03-05 11:37:15 +020044 * @authenticating: The device is authenticating the new NVM
Mario Limonciello4b794f82020-06-23 11:14:28 -050045 * @flushed: The image has been flushed to the storage area
Szuying Chenaef9c692022-09-02 17:40:08 +080046 * @vops: Router vendor specific NVM operations (optional)
Mika Westerberg719a5fe2020-03-05 11:37:15 +020047 *
48 * The user of this structure needs to handle serialization of possible
49 * concurrent access.
Mika Westerberge6b245c2017-06-06 15:25:17 +030050 */
Mika Westerberg719a5fe2020-03-05 11:37:15 +020051struct tb_nvm {
52 struct device *dev;
Szuying Chen5424e1b2022-09-02 17:40:09 +080053 u32 major;
54 u32 minor;
Mika Westerberge6b245c2017-06-06 15:25:17 +030055 int id;
56 struct nvmem_device *active;
Szuying Chenaef9c692022-09-02 17:40:08 +080057 size_t active_size;
Mika Westerberge6b245c2017-06-06 15:25:17 +030058 struct nvmem_device *non_active;
59 void *buf;
Szuying Chenaef9c692022-09-02 17:40:08 +080060 void *buf_data_start;
Mika Westerberge6b245c2017-06-06 15:25:17 +030061 size_t buf_data_size;
62 bool authenticating;
Mario Limonciello4b794f82020-06-23 11:14:28 -050063 bool flushed;
Szuying Chenaef9c692022-09-02 17:40:08 +080064 const struct tb_nvm_vendor_ops *vops;
Mika Westerberge6b245c2017-06-06 15:25:17 +030065};
66
Rajmohan Maniff3a8302021-04-12 14:01:46 +030067enum tb_nvm_write_ops {
68 WRITE_AND_AUTHENTICATE = 1,
69 WRITE_ONLY = 2,
Mika Westerberg1cbf6802021-04-12 15:25:08 +030070 AUTHENTICATE_ONLY = 3,
Rajmohan Maniff3a8302021-04-12 14:01:46 +030071};
72
Mika Westerbergf67cf492017-06-06 15:25:16 +030073#define TB_SWITCH_KEY_SIZE 32
Mika Westerbergf0342e72018-12-30 12:14:46 +020074#define TB_SWITCH_MAX_DEPTH 6
Mika Westerbergb0407982019-12-17 15:33:40 +030075#define USB4_SWITCH_MAX_DEPTH 5
Mika Westerbergf67cf492017-06-06 15:25:16 +030076
77/**
Mika Westerbergd49b4f02022-10-11 12:11:09 +030078 * enum tb_switch_tmu_mode - TMU mode
79 * @TB_SWITCH_TMU_MODE_OFF: TMU is off
80 * @TB_SWITCH_TMU_MODE_LOWRES: Uni-directional, normal mode
81 * @TB_SWITCH_TMU_MODE_HIFI_UNI: Uni-directional, HiFi mode
82 * @TB_SWITCH_TMU_MODE_HIFI_BI: Bi-directional, HiFi mode
83 * @TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI: Enhanced Uni-directional, MedRes mode
84 *
85 * Ordering is based on TMU accuracy level (highest last).
Rajmohan Manicf29b9af2019-12-17 15:33:43 +030086 */
Mika Westerbergd49b4f02022-10-11 12:11:09 +030087enum tb_switch_tmu_mode {
88 TB_SWITCH_TMU_MODE_OFF,
89 TB_SWITCH_TMU_MODE_LOWRES,
90 TB_SWITCH_TMU_MODE_HIFI_UNI,
91 TB_SWITCH_TMU_MODE_HIFI_BI,
92 TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI,
Rajmohan Manicf29b9af2019-12-17 15:33:43 +030093};
94
95/**
Mika Westerbergd49b4f02022-10-11 12:11:09 +030096 * struct tb_switch_tmu - Structure holding router TMU configuration
Rajmohan Manicf29b9af2019-12-17 15:33:43 +030097 * @cap: Offset to the TMU capability (%0 if not found)
98 * @has_ucap: Does the switch support uni-directional mode
Mika Westerbergd49b4f02022-10-11 12:11:09 +030099 * @mode: TMU mode related to the upstream router. Reflects the HW
100 * setting. Don't care for host router.
101 * @mode_request: TMU mode requested to set. Related to upstream router.
102 * Don't care for host router.
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300103 */
104struct tb_switch_tmu {
105 int cap;
106 bool has_ucap;
Mika Westerbergd49b4f02022-10-11 12:11:09 +0300107 enum tb_switch_tmu_mode mode;
108 enum tb_switch_tmu_mode mode_request;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300109};
110
111/**
Andreas Noevera25c8b22014-06-03 22:04:02 +0200112 * struct tb_switch - a thunderbolt switch
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300113 * @dev: Device for the switch
114 * @config: Switch configuration
115 * @ports: Ports in this switch
Mika Westerberg3e136762017-06-06 15:25:14 +0300116 * @dma_port: If the switch has port supporting DMA configuration based
117 * mailbox this will hold the pointer to that (%NULL
Mika Westerberge6b245c2017-06-06 15:25:17 +0300118 * otherwise). If set it also means the switch has
119 * upgradeable NVM.
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300120 * @tmu: The switch TMU configuration
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300121 * @tb: Pointer to the domain the switch belongs to
122 * @uid: Unique ID of the switch
123 * @uuid: UUID of the switch (or %NULL if not supported)
124 * @vendor: Vendor ID of the switch
125 * @device: Device ID of the switch
Mika Westerberg72ee3392017-06-06 15:25:05 +0300126 * @vendor_name: Name of the vendor (or %NULL if not known)
127 * @device_name: Name of the device (or %NULL if not known)
Mika Westerberg91c0c122019-03-21 19:03:00 +0200128 * @link_speed: Speed of the link in Gb/s
Gil Finee111fb92022-09-29 13:00:09 +0300129 * @link_width: Width of the upstream facing link
Gil Fineba2a2a82023-12-04 15:14:58 +0200130 * @preferred_link_width: Router preferred link width (only set for Gen 4 links)
Mika Westerbergbbcf40b2020-03-04 17:09:14 +0200131 * @link_usb4: Upstream link is USB4
Mika Westerberg2c3c4192017-06-06 15:25:13 +0300132 * @generation: Switch Thunderbolt generation
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300133 * @cap_plug_events: Offset to the plug events capability (%0 if not found)
Gil Fine23ccd212021-12-17 03:16:41 +0200134 * @cap_vsec_tmu: Offset to the TMU vendor specific capability (%0 if not found)
Mika Westerberga9be5582019-01-09 16:42:12 +0200135 * @cap_lc: Offset to the link controller capability (%0 if not found)
Gil Fine43f977b2021-12-17 03:16:43 +0200136 * @cap_lp: Offset to the low power (CLx for TBT) capability (%0 if not found)
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300137 * @is_unplugged: The switch is going away
138 * @drom: DROM of the switch (%NULL if not found)
Mika Westerberge6b245c2017-06-06 15:25:17 +0300139 * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
140 * @no_nvm_upgrade: Prevent NVM upgrade of this switch
141 * @safe_mode: The switch is in safe-mode
Yehezkel Bernat14862ee2018-01-22 12:50:09 +0200142 * @boot: Whether the switch was already authorized on boot or not
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300143 * @rpm: The switch supports runtime PM
Mika Westerbergf67cf492017-06-06 15:25:16 +0300144 * @authorized: Whether the switch is authorized by user or policy
Mika Westerbergf67cf492017-06-06 15:25:16 +0300145 * @security_level: Switch supported security level
Gil Fine54e41812020-06-29 20:30:52 +0300146 * @debugfs_dir: Pointer to the debugfs structure
Mika Westerbergf67cf492017-06-06 15:25:16 +0300147 * @key: Contains the key used to challenge the device or %NULL if not
148 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
149 * @connection_id: Connection ID used with ICM messaging
150 * @connection_key: Connection key used with ICM messaging
151 * @link: Root switch link this switch is connected (ICM only)
152 * @depth: Depth in the chain this switch is connected (ICM only)
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300153 * @rpm_complete: Completion used to wait for runtime resume to
154 * complete (ICM only)
Mario Limonciello1cb36292020-06-23 11:14:29 -0500155 * @quirks: Quirks used for this Thunderbolt switch
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200156 * @credit_allocation: Are the below buffer allocation parameters valid
157 * @max_usb3_credits: Router preferred number of buffers for USB 3.x
158 * @min_dp_aux_credits: Router preferred minimum number of buffers for DP AUX
159 * @min_dp_main_credits: Router preferred minimum number of buffers for DP MAIN
160 * @max_pcie_credits: Router preferred number of buffers for PCIe
161 * @max_dma_credits: Router preferred number of buffers for DMA/P2P
Mika Westerberg35627352022-10-10 13:36:56 +0300162 * @clx: CLx states on the upstream link of the router
Mika Westerbergf67cf492017-06-06 15:25:16 +0300163 *
164 * When the switch is being added or removed to the domain (other
Mika Westerberg09f11b62019-03-19 16:48:41 +0200165 * switches) you need to have domain lock held.
Mika Westerbergc3963a52021-02-01 15:03:00 +0300166 *
167 * In USB4 terminology this structure represents a router.
Andreas Noevera25c8b22014-06-03 22:04:02 +0200168 */
169struct tb_switch {
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300170 struct device dev;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200171 struct tb_regs_switch_header config;
172 struct tb_port *ports;
Mika Westerberg3e136762017-06-06 15:25:14 +0300173 struct tb_dma_port *dma_port;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300174 struct tb_switch_tmu tmu;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200175 struct tb *tb;
Andreas Noeverc90553b2014-06-03 22:04:11 +0200176 u64 uid;
Christoph Hellwig7c39ffe2017-07-18 15:30:05 +0200177 uuid_t *uuid;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300178 u16 vendor;
179 u16 device;
Mika Westerberg72ee3392017-06-06 15:25:05 +0300180 const char *vendor_name;
181 const char *device_name;
Mika Westerberg91c0c122019-03-21 19:03:00 +0200182 unsigned int link_speed;
Gil Finee111fb92022-09-29 13:00:09 +0300183 enum tb_link_width link_width;
Gil Fineba2a2a82023-12-04 15:14:58 +0200184 enum tb_link_width preferred_link_width;
Mika Westerbergbbcf40b2020-03-04 17:09:14 +0200185 bool link_usb4;
Mika Westerberg2c3c4192017-06-06 15:25:13 +0300186 unsigned int generation;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300187 int cap_plug_events;
Gil Fine23ccd212021-12-17 03:16:41 +0200188 int cap_vsec_tmu;
Mika Westerberga9be5582019-01-09 16:42:12 +0200189 int cap_lc;
Gil Fine43f977b2021-12-17 03:16:43 +0200190 int cap_lp;
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300191 bool is_unplugged;
Andreas Noevercd22e732014-06-12 23:11:46 +0200192 u8 *drom;
Mika Westerberg719a5fe2020-03-05 11:37:15 +0200193 struct tb_nvm *nvm;
Mika Westerberge6b245c2017-06-06 15:25:17 +0300194 bool no_nvm_upgrade;
195 bool safe_mode;
Yehezkel Bernat14862ee2018-01-22 12:50:09 +0200196 bool boot;
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300197 bool rpm;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300198 unsigned int authorized;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300199 enum tb_security_level security_level;
Gil Fine54e41812020-06-29 20:30:52 +0300200 struct dentry *debugfs_dir;
Mika Westerbergf67cf492017-06-06 15:25:16 +0300201 u8 *key;
202 u8 connection_id;
203 u8 connection_key;
204 u8 link;
205 u8 depth;
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300206 struct completion rpm_complete;
Mario Limonciello1cb36292020-06-23 11:14:29 -0500207 unsigned long quirks;
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200208 bool credit_allocation;
209 unsigned int max_usb3_credits;
210 unsigned int min_dp_aux_credits;
211 unsigned int min_dp_main_credits;
212 unsigned int max_pcie_credits;
213 unsigned int max_dma_credits;
Mika Westerberg35627352022-10-10 13:36:56 +0300214 unsigned int clx;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200215};
216
217/**
Mika Westerberg6ce35632022-03-23 16:45:39 +0200218 * struct tb_bandwidth_group - Bandwidth management group
219 * @tb: Pointer to the domain the group belongs to
220 * @index: Index of the group (aka Group_ID). Valid values %1-%7
221 * @ports: DP IN adapters belonging to this group are linked here
Mika Westerberg52a44902024-01-09 17:57:10 +0200222 * @reserved: Bandwidth released by one tunnel in the group, available
223 * to others. This is reported as part of estimated_bw for
224 * the group.
225 * @release_work: Worker to release the @reserved if it is not used by
226 * any of the tunnels.
Mika Westerberg6ce35632022-03-23 16:45:39 +0200227 *
228 * Any tunnel that requires isochronous bandwidth (that's DP for now) is
229 * attached to a bandwidth group. All tunnels going through the same
230 * USB4 links share the same group and can dynamically distribute the
231 * bandwidth within the group.
232 */
233struct tb_bandwidth_group {
234 struct tb *tb;
235 int index;
236 struct list_head ports;
Mika Westerberg52a44902024-01-09 17:57:10 +0200237 int reserved;
238 struct delayed_work release_work;
Mika Westerberg6ce35632022-03-23 16:45:39 +0200239};
240
241/**
Andreas Noevera25c8b22014-06-03 22:04:02 +0200242 * struct tb_port - a thunderbolt port, part of a tb_switch
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300243 * @config: Cached port configuration read from registers
244 * @sw: Switch the port belongs to
245 * @remote: Remote port (%NULL if not connected)
246 * @xdomain: Remote host (%NULL if not connected)
247 * @cap_phy: Offset, zero if not found
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300248 * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
Mika Westerberg56183c82017-02-19 10:39:34 +0200249 * @cap_adap: Offset of the adapter specific capability (%0 if not present)
Mika Westerbergb0407982019-12-17 15:33:40 +0300250 * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
Mika Westerbergcae5f512021-04-01 17:34:20 +0300251 * @usb4: Pointer to the USB4 port structure (only if @cap_usb4 is != %0)
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300252 * @port: Port number on switch
Nikunj A. Dadhania8824d192020-07-21 17:05:23 +0530253 * @disabled: Disabled by eeprom or enabled but not implemented
Mika Westerberg91c0c122019-03-21 19:03:00 +0200254 * @bonded: true if the port is bonded (two lanes combined as one)
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300255 * @dual_link_port: If the switch is connected using two ports, points
256 * to the other port.
257 * @link_nr: Is this primary or secondary port on the dual_link.
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200258 * @in_hopids: Currently allocated input HopIDs
259 * @out_hopids: Currently allocated output HopIDs
Mika Westerberg8afe9092019-03-26 15:52:30 +0300260 * @list: Used to link ports to DP resources list
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200261 * @total_credits: Total number of buffers available for this port
262 * @ctl_credits: Buffers reserved for control path
Mika Westerberg6ed541c2021-03-22 18:09:35 +0200263 * @dma_credits: Number of credits allocated for DMA tunneling for all
264 * DMA paths through this port.
Mika Westerberg6ce35632022-03-23 16:45:39 +0200265 * @group: Bandwidth allocation group the adapter is assigned to. Only
266 * used for DP IN adapters for now.
267 * @group_list: The adapter is linked to the group's list of ports through this
Gil Finef0a57dd2023-01-31 13:04:52 +0200268 * @max_bw: Maximum possible bandwidth through this adapter if set to
269 * non-zero.
Mika Westerberga75e0682024-01-26 15:55:55 +0200270 * @redrive: For DP IN, if true the adapter is in redrive mode.
Mika Westerbergc3963a52021-02-01 15:03:00 +0300271 *
272 * In USB4 terminology this structure represents an adapter (protocol or
273 * lane adapter).
Andreas Noevera25c8b22014-06-03 22:04:02 +0200274 */
275struct tb_port {
276 struct tb_regs_port_header config;
277 struct tb_switch *sw;
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300278 struct tb_port *remote;
279 struct tb_xdomain *xdomain;
280 int cap_phy;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +0300281 int cap_tmu;
Mika Westerberg56183c82017-02-19 10:39:34 +0200282 int cap_adap;
Mika Westerbergb0407982019-12-17 15:33:40 +0300283 int cap_usb4;
Mika Westerbergcae5f512021-04-01 17:34:20 +0300284 struct usb4_port *usb4;
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300285 u8 port;
286 bool disabled;
Mika Westerberg91c0c122019-03-21 19:03:00 +0200287 bool bonded;
Andreas Noevercd22e732014-06-12 23:11:46 +0200288 struct tb_port *dual_link_port;
289 u8 link_nr:1;
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200290 struct ida in_hopids;
291 struct ida out_hopids;
Mika Westerberg8afe9092019-03-26 15:52:30 +0300292 struct list_head list;
Mika Westerberg56ad3ae2021-03-10 13:34:12 +0200293 unsigned int total_credits;
294 unsigned int ctl_credits;
Mika Westerberg6ed541c2021-03-22 18:09:35 +0200295 unsigned int dma_credits;
Mika Westerberg6ce35632022-03-23 16:45:39 +0200296 struct tb_bandwidth_group *group;
297 struct list_head group_list;
Gil Finef0a57dd2023-01-31 13:04:52 +0200298 unsigned int max_bw;
Mika Westerberga75e0682024-01-26 15:55:55 +0200299 bool redrive;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200300};
301
302/**
Mika Westerbergcae5f512021-04-01 17:34:20 +0300303 * struct usb4_port - USB4 port device
304 * @dev: Device for the port
305 * @port: Pointer to the lane 0 adapter
Rajmohan Maniccc5cb82021-04-01 18:20:17 +0300306 * @can_offline: Does the port have necessary platform support to moved
307 * it into offline mode and back
Rajmohan Mani3fb10ea2021-04-01 18:42:38 +0300308 * @offline: The port is currently in offline mode
Mika Westerbergd0f1e0c2022-02-22 19:31:47 +0200309 * @margining: Pointer to margining structure if enabled
Mika Westerbergcae5f512021-04-01 17:34:20 +0300310 */
311struct usb4_port {
312 struct device dev;
313 struct tb_port *port;
Rajmohan Maniccc5cb82021-04-01 18:20:17 +0300314 bool can_offline;
Rajmohan Mani3fb10ea2021-04-01 18:42:38 +0300315 bool offline;
Mika Westerbergd0f1e0c2022-02-22 19:31:47 +0200316#ifdef CONFIG_USB4_DEBUGFS_MARGINING
317 struct tb_margining *margining;
318#endif
Mika Westerbergcae5f512021-04-01 17:34:20 +0300319};
320
321/**
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200322 * tb_retimer: Thunderbolt retimer
323 * @dev: Device for the retimer
324 * @tb: Pointer to the domain the retimer belongs to
325 * @index: Retimer index facing the router USB4 port
326 * @vendor: Vendor ID of the retimer
327 * @device: Device ID of the retimer
328 * @port: Pointer to the lane 0 adapter
329 * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise)
Szuying Chenaef9c692022-09-02 17:40:08 +0800330 * @no_nvm_upgrade: Prevent NVM upgrade of this retimer
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200331 * @auth_status: Status of last NVM authentication
Mika Westerbergff6ab052023-03-21 11:40:49 +0200332 * @margining: Pointer to margining structure if enabled
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200333 */
334struct tb_retimer {
335 struct device dev;
336 struct tb *tb;
337 u8 index;
338 u32 vendor;
339 u32 device;
340 struct tb_port *port;
341 struct tb_nvm *nvm;
Szuying Chenaef9c692022-09-02 17:40:08 +0800342 bool no_nvm_upgrade;
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200343 u32 auth_status;
Mika Westerbergff6ab052023-03-21 11:40:49 +0200344#ifdef CONFIG_USB4_DEBUGFS_MARGINING
345 struct tb_margining *margining;
346#endif
Kranthi Kuntaladacb1282020-03-05 16:39:58 +0200347};
348
349/**
Andreas Noever520b6702014-06-03 22:04:07 +0200350 * struct tb_path_hop - routing information for a tb_path
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200351 * @in_port: Ingress port of a switch
352 * @out_port: Egress port of a switch where the packet is routed out
353 * (must be on the same switch than @in_port)
354 * @in_hop_index: HopID where the path configuration entry is placed in
355 * the path config space of @in_port.
356 * @in_counter_index: Used counter index (not used in the driver
357 * currently, %-1 to disable)
358 * @next_hop_index: HopID of the packet when it is routed out from @out_port
Mika Westerberg0414bec2017-02-19 23:43:26 +0200359 * @initial_credits: Number of initial flow control credits allocated for
360 * the path
Mika Westerberg02c5e7c2020-12-10 16:07:59 +0200361 * @nfc_credits: Number of non-flow controlled buffers allocated for the
362 * @in_port.
Mika Westerbergce91d792023-09-08 12:07:47 +0300363 * @pm_support: Set path PM packet support bit to 1 (for USB4 v2 routers)
Andreas Noever520b6702014-06-03 22:04:07 +0200364 *
365 * Hop configuration is always done on the IN port of a switch.
366 * in_port and out_port have to be on the same switch. Packets arriving on
367 * in_port with "hop" = in_hop_index will get routed to through out_port. The
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200368 * next hop to take (on out_port->remote) is determined by
369 * next_hop_index. When routing packet to another switch (out->remote is
370 * set) the @next_hop_index must match the @in_hop_index of that next
371 * hop to make routing possible.
Andreas Noever520b6702014-06-03 22:04:07 +0200372 *
373 * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
374 * port.
375 */
376struct tb_path_hop {
377 struct tb_port *in_port;
378 struct tb_port *out_port;
379 int in_hop_index;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200380 int in_counter_index;
Andreas Noever520b6702014-06-03 22:04:07 +0200381 int next_hop_index;
Mika Westerberg0414bec2017-02-19 23:43:26 +0200382 unsigned int initial_credits;
Mika Westerberg02c5e7c2020-12-10 16:07:59 +0200383 unsigned int nfc_credits;
Mika Westerbergce91d792023-09-08 12:07:47 +0300384 bool pm_support;
Andreas Noever520b6702014-06-03 22:04:07 +0200385};
386
387/**
388 * enum tb_path_port - path options mask
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200389 * @TB_PATH_NONE: Do not activate on any hop on path
390 * @TB_PATH_SOURCE: Activate on the first hop (out of src)
391 * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
392 * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
393 * @TB_PATH_ALL: Activate on all hops on the path
Andreas Noever520b6702014-06-03 22:04:07 +0200394 */
395enum tb_path_port {
396 TB_PATH_NONE = 0,
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200397 TB_PATH_SOURCE = 1,
398 TB_PATH_INTERNAL = 2,
399 TB_PATH_DESTINATION = 4,
Andreas Noever520b6702014-06-03 22:04:07 +0200400 TB_PATH_ALL = 7,
401};
402
403/**
404 * struct tb_path - a unidirectional path between two ports
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200405 * @tb: Pointer to the domain structure
406 * @name: Name of the path (used for debugging)
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200407 * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
408 * @egress_shared_buffer: Shared buffering used for egress ports on the path
409 * @ingress_fc_enable: Flow control for ingress ports on the path
410 * @egress_fc_enable: Flow control for egress ports on the path
411 * @priority: Priority group if the path
412 * @weight: Weight of the path inside the priority group
413 * @drop_packages: Drop packages from queue tail or head
414 * @activated: Is the path active
Mika Westerberg44242d62018-09-28 16:35:32 +0300415 * @clear_fc: Clear all flow control from the path config space entries
416 * when deactivating this path
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200417 * @hops: Path hops
418 * @path_length: How many hops the path uses
Mika Westerberg43bddb22021-11-14 17:20:59 +0200419 * @alloc_hopid: Does this path consume port HopID
Andreas Noever520b6702014-06-03 22:04:07 +0200420 *
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200421 * A path consists of a number of hops (see &struct tb_path_hop). To
422 * establish a PCIe tunnel two paths have to be created between the two
423 * PCIe ports.
Andreas Noever520b6702014-06-03 22:04:07 +0200424 */
425struct tb_path {
426 struct tb *tb;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200427 const char *name;
Andreas Noever520b6702014-06-03 22:04:07 +0200428 enum tb_path_port ingress_shared_buffer;
429 enum tb_path_port egress_shared_buffer;
430 enum tb_path_port ingress_fc_enable;
431 enum tb_path_port egress_fc_enable;
432
Nathan Chancellor37209782019-04-24 11:34:13 -0700433 unsigned int priority:3;
Andreas Noever520b6702014-06-03 22:04:07 +0200434 int weight:4;
435 bool drop_packages;
436 bool activated;
Mika Westerberg44242d62018-09-28 16:35:32 +0300437 bool clear_fc;
Andreas Noever520b6702014-06-03 22:04:07 +0200438 struct tb_path_hop *hops;
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +0200439 int path_length;
Mika Westerberg43bddb22021-11-14 17:20:59 +0200440 bool alloc_hopid;
Andreas Noever520b6702014-06-03 22:04:07 +0200441};
442
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200443/* HopIDs 0-7 are reserved by the Thunderbolt protocol */
444#define TB_PATH_MIN_HOPID 8
Mika Westerbergc738a792020-05-08 11:47:00 +0300445/*
446 * Support paths from the farthest (depth 6) router to the host and back
447 * to the same level (not necessarily to the same router).
448 */
449#define TB_PATH_MAX_HOPS (7 * 2)
Mika Westerberg0b2863a2017-02-19 16:57:27 +0200450
Mika Westerbergb2911a52019-12-06 18:36:07 +0200451/* Possible wake types */
452#define TB_WAKE_ON_CONNECT BIT(0)
453#define TB_WAKE_ON_DISCONNECT BIT(1)
454#define TB_WAKE_ON_USB4 BIT(2)
455#define TB_WAKE_ON_USB3 BIT(3)
456#define TB_WAKE_ON_PCIE BIT(4)
Mika Westerberg6026b702021-01-14 16:44:17 +0200457#define TB_WAKE_ON_DP BIT(5)
Mika Westerbergb2911a52019-12-06 18:36:07 +0200458
Mika Westerberg35627352022-10-10 13:36:56 +0300459/* CL states */
460#define TB_CL0S BIT(0)
461#define TB_CL1 BIT(1)
462#define TB_CL2 BIT(2)
463
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300464/**
465 * struct tb_cm_ops - Connection manager specific operations vector
Mika Westerbergf67cf492017-06-06 15:25:16 +0300466 * @driver_ready: Called right after control channel is started. Used by
467 * ICM to send driver ready message to the firmware.
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300468 * @start: Starts the domain
469 * @stop: Stops the domain
Mika Westerberg52a44902024-01-09 17:57:10 +0200470 * @deinit: Perform any cleanup after the domain is stopped but before
471 * it is unregistered. Called without @tb->lock taken. Optional.
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300472 * @suspend_noirq: Connection manager specific suspend_noirq
473 * @resume_noirq: Connection manager specific resume_noirq
Mika Westerbergf67cf492017-06-06 15:25:16 +0300474 * @suspend: Connection manager specific suspend
Mika Westerberg884e4d52020-08-31 13:05:14 +0300475 * @freeze_noirq: Connection manager specific freeze_noirq
476 * @thaw_noirq: Connection manager specific thaw_noirq
Mika Westerbergf67cf492017-06-06 15:25:16 +0300477 * @complete: Connection manager specific complete
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300478 * @runtime_suspend: Connection manager specific runtime_suspend
479 * @runtime_resume: Connection manager specific runtime_resume
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300480 * @runtime_suspend_switch: Runtime suspend a switch
481 * @runtime_resume_switch: Runtime resume a switch
Mika Westerberg81a54b52017-06-06 15:25:09 +0300482 * @handle_event: Handle thunderbolt event
Mika Westerberg9aaa3b82018-01-21 12:08:04 +0200483 * @get_boot_acl: Get boot ACL list
484 * @set_boot_acl: Set boot ACL list
Mika Westerberg3da88be2020-11-10 11:47:14 +0300485 * @disapprove_switch: Disapprove switch (disconnect PCIe tunnel)
Mika Westerbergf67cf492017-06-06 15:25:16 +0300486 * @approve_switch: Approve switch
487 * @add_switch_key: Add key to switch
488 * @challenge_switch_key: Challenge switch using key
Mika Westerberge6b245c2017-06-06 15:25:17 +0300489 * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300490 * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
491 * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
Mika Westerberg9490f712020-11-03 13:58:00 +0200492 * @usb4_switch_op: Optional proxy for USB4 router operations. If set
493 * this will be called whenever USB4 router operation is
494 * performed. If this returns %-EOPNOTSUPP then the
495 * native USB4 router operation is called.
496 * @usb4_switch_nvm_authenticate_status: Optional callback that the CM
497 * implementation can be used to
498 * return status of USB4 NVM_AUTH
499 * router operation.
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300500 */
501struct tb_cm_ops {
Mika Westerbergf67cf492017-06-06 15:25:16 +0300502 int (*driver_ready)(struct tb *tb);
Sanath S59a54c52024-01-13 11:52:48 +0200503 int (*start)(struct tb *tb, bool reset);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300504 void (*stop)(struct tb *tb);
Mika Westerberg52a44902024-01-09 17:57:10 +0200505 void (*deinit)(struct tb *tb);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300506 int (*suspend_noirq)(struct tb *tb);
507 int (*resume_noirq)(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300508 int (*suspend)(struct tb *tb);
Mika Westerberg884e4d52020-08-31 13:05:14 +0300509 int (*freeze_noirq)(struct tb *tb);
510 int (*thaw_noirq)(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300511 void (*complete)(struct tb *tb);
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300512 int (*runtime_suspend)(struct tb *tb);
513 int (*runtime_resume)(struct tb *tb);
Mika Westerberg4f7c2e02019-05-28 18:56:20 +0300514 int (*runtime_suspend_switch)(struct tb_switch *sw);
515 int (*runtime_resume_switch)(struct tb_switch *sw);
Mika Westerberg81a54b52017-06-06 15:25:09 +0300516 void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
517 const void *buf, size_t size);
Mika Westerberg9aaa3b82018-01-21 12:08:04 +0200518 int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
519 int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
Mika Westerberg3da88be2020-11-10 11:47:14 +0300520 int (*disapprove_switch)(struct tb *tb, struct tb_switch *sw);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300521 int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
522 int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
523 int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
524 const u8 *challenge, u8 *response);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300525 int (*disconnect_pcie_paths)(struct tb *tb);
Mika Westerberg180b0682021-01-08 16:25:39 +0200526 int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
527 int transmit_path, int transmit_ring,
528 int receive_path, int receive_ring);
529 int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
530 int transmit_path, int transmit_ring,
531 int receive_path, int receive_ring);
Mika Westerberg9490f712020-11-03 13:58:00 +0200532 int (*usb4_switch_op)(struct tb_switch *sw, u16 opcode, u32 *metadata,
533 u8 *status, const void *tx_data, size_t tx_data_len,
534 void *rx_data, size_t rx_data_len);
535 int (*usb4_switch_nvm_authenticate_status)(struct tb_switch *sw,
536 u32 *status);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300537};
Andreas Noever520b6702014-06-03 22:04:07 +0200538
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300539static inline void *tb_priv(struct tb *tb)
540{
541 return (void *)tb->privdata;
542}
543
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300544#define TB_AUTOSUSPEND_DELAY 15000 /* ms */
545
Andreas Noevera25c8b22014-06-03 22:04:02 +0200546/* helper functions & macros */
547
548/**
549 * tb_upstream_port() - return the upstream port of a switch
550 *
551 * Every switch has an upstream port (for the root switch it is the NHI).
552 *
553 * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
554 * non root switches (on the NHI port remote is always NULL).
555 *
556 * Return: Returns the upstream port of the switch.
557 */
558static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
559{
560 return &sw->ports[sw->config.upstream_port_number];
561}
562
Mika Westerbergdfe40ca2019-03-07 15:26:45 +0200563/**
564 * tb_is_upstream_port() - Is the port upstream facing
565 * @port: Port to check
566 *
567 * Returns true if @port is upstream facing port. In case of dual link
568 * ports both return true.
569 */
570static inline bool tb_is_upstream_port(const struct tb_port *port)
571{
572 const struct tb_port *upstream_port = tb_upstream_port(port->sw);
573 return port == upstream_port || port->dual_link_port == upstream_port;
574}
575
Mika Westerbergb323a982019-03-06 19:23:38 +0200576static inline u64 tb_route(const struct tb_switch *sw)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200577{
578 return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
579}
580
Mika Westerbergf67cf492017-06-06 15:25:16 +0300581static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
582{
583 u8 port;
584
585 port = route >> (sw->config.depth * 8);
586 if (WARN_ON(port > sw->config.max_port_number))
587 return NULL;
588 return &sw->ports[port];
589}
590
Gil Fine30c67592023-11-05 17:52:19 +0200591static inline const char *tb_width_name(enum tb_link_width width)
592{
593 switch (width) {
594 case TB_LINK_WIDTH_SINGLE:
595 return "symmetric, single lane";
596 case TB_LINK_WIDTH_DUAL:
597 return "symmetric, dual lanes";
598 case TB_LINK_WIDTH_ASYM_TX:
599 return "asymmetric, 3 transmitters, 1 receiver";
600 case TB_LINK_WIDTH_ASYM_RX:
601 return "asymmetric, 3 receivers, 1 transmitter";
602 default:
603 return "unknown";
604 }
605}
606
Mika Westerbergdfe40ca2019-03-07 15:26:45 +0200607/**
608 * tb_port_has_remote() - Does the port have switch connected downstream
609 * @port: Port to check
610 *
611 * Returns true only when the port is primary port and has remote set.
612 */
613static inline bool tb_port_has_remote(const struct tb_port *port)
614{
615 if (tb_is_upstream_port(port))
616 return false;
617 if (!port->remote)
618 return false;
619 if (port->dual_link_port && port->link_nr)
620 return false;
621
622 return true;
623}
624
Mika Westerberg344e0642017-10-11 17:19:54 +0300625static inline bool tb_port_is_null(const struct tb_port *port)
626{
627 return port && port->port && port->config.type == TB_TYPE_PORT;
628}
629
Mika Westerberga3cfebd2020-07-25 10:32:46 +0300630static inline bool tb_port_is_nhi(const struct tb_port *port)
631{
632 return port && port->config.type == TB_TYPE_NHI;
633}
634
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200635static inline bool tb_port_is_pcie_down(const struct tb_port *port)
636{
637 return port && port->config.type == TB_TYPE_PCIE_DOWN;
638}
639
Mika Westerberg0414bec2017-02-19 23:43:26 +0200640static inline bool tb_port_is_pcie_up(const struct tb_port *port)
641{
642 return port && port->config.type == TB_TYPE_PCIE_UP;
643}
644
Mika Westerberg4f807e42018-09-17 16:30:49 +0300645static inline bool tb_port_is_dpin(const struct tb_port *port)
646{
647 return port && port->config.type == TB_TYPE_DP_HDMI_IN;
648}
649
650static inline bool tb_port_is_dpout(const struct tb_port *port)
651{
652 return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
653}
654
Rajmohan Manie6f81852019-12-17 15:33:44 +0300655static inline bool tb_port_is_usb3_down(const struct tb_port *port)
656{
657 return port && port->config.type == TB_TYPE_USB3_DOWN;
658}
659
660static inline bool tb_port_is_usb3_up(const struct tb_port *port)
661{
662 return port && port->config.type == TB_TYPE_USB3_UP;
663}
664
Andreas Noevera25c8b22014-06-03 22:04:02 +0200665static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
666 enum tb_cfg_space space, u32 offset, u32 length)
667{
Mika Westerberg47083842019-03-19 17:07:37 +0200668 if (sw->is_unplugged)
669 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200670 return tb_cfg_read(sw->tb->ctl,
671 buffer,
672 tb_route(sw),
673 0,
674 space,
675 offset,
676 length);
677}
678
Mika Westerberg826c6a12019-07-01 18:41:51 +0300679static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
Andreas Noevera25c8b22014-06-03 22:04:02 +0200680 enum tb_cfg_space space, u32 offset, u32 length)
681{
Mika Westerberg47083842019-03-19 17:07:37 +0200682 if (sw->is_unplugged)
683 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200684 return tb_cfg_write(sw->tb->ctl,
685 buffer,
686 tb_route(sw),
687 0,
688 space,
689 offset,
690 length);
691}
692
693static inline int tb_port_read(struct tb_port *port, void *buffer,
694 enum tb_cfg_space space, u32 offset, u32 length)
695{
Mika Westerberg47083842019-03-19 17:07:37 +0200696 if (port->sw->is_unplugged)
697 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200698 return tb_cfg_read(port->sw->tb->ctl,
699 buffer,
700 tb_route(port->sw),
701 port->port,
702 space,
703 offset,
704 length);
705}
706
Mika Westerberg16a12582017-06-06 15:24:53 +0300707static inline int tb_port_write(struct tb_port *port, const void *buffer,
Andreas Noevera25c8b22014-06-03 22:04:02 +0200708 enum tb_cfg_space space, u32 offset, u32 length)
709{
Mika Westerberg47083842019-03-19 17:07:37 +0200710 if (port->sw->is_unplugged)
711 return -ENODEV;
Andreas Noevera25c8b22014-06-03 22:04:02 +0200712 return tb_cfg_write(port->sw->tb->ctl,
713 buffer,
714 tb_route(port->sw),
715 port->port,
716 space,
717 offset,
718 length);
719}
720
721#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
722#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
723#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
724#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300725#define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200726
727#define __TB_SW_PRINT(level, sw, fmt, arg...) \
728 do { \
Mika Westerbergb323a982019-03-06 19:23:38 +0200729 const struct tb_switch *__sw = (sw); \
Andreas Noevera25c8b22014-06-03 22:04:02 +0200730 level(__sw->tb, "%llx: " fmt, \
731 tb_route(__sw), ## arg); \
732 } while (0)
733#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
734#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
735#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300736#define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200737
738#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
739 do { \
Mika Westerbergb323a982019-03-06 19:23:38 +0200740 const struct tb_port *__port = (_port); \
Mika Westerbergebe99c02022-04-01 13:36:47 +0300741 level(__port->sw->tb, "%llx:%u: " fmt, \
Andreas Noevera25c8b22014-06-03 22:04:02 +0200742 tb_route(__port->sw), __port->port, ## arg); \
743 } while (0)
744#define tb_port_WARN(port, fmt, arg...) \
745 __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
746#define tb_port_warn(port, fmt, arg...) \
747 __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
748#define tb_port_info(port, fmt, arg...) \
749 __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
Mika Westerbergdaa51402018-10-01 12:31:19 +0300750#define tb_port_dbg(port, fmt, arg...) \
751 __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
Andreas Noevera25c8b22014-06-03 22:04:02 +0200752
Mika Westerbergf67cf492017-06-06 15:25:16 +0300753struct tb *icm_probe(struct tb_nhi *nhi);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300754struct tb *tb_probe(struct tb_nhi *nhi);
Andreas Noevera25c8b22014-06-03 22:04:02 +0200755
Ricardo B. Marliereb8a73082024-02-19 09:45:50 -0300756extern const struct device_type tb_domain_type;
757extern const struct device_type tb_retimer_type;
758extern const struct device_type tb_switch_type;
759extern const struct device_type usb4_port_device_type;
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300760
761int tb_domain_init(void);
762void tb_domain_exit(void);
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300763int tb_xdomain_init(void);
764void tb_xdomain_exit(void);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300765
Mika Westerberg7f0a34d2020-12-29 13:44:57 +0200766struct tb *tb_domain_alloc(struct tb_nhi *nhi, int timeout_msec, size_t privsize);
Sanath S59a54c52024-01-13 11:52:48 +0200767int tb_domain_add(struct tb *tb, bool reset);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300768void tb_domain_remove(struct tb *tb);
769int tb_domain_suspend_noirq(struct tb *tb);
770int tb_domain_resume_noirq(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300771int tb_domain_suspend(struct tb *tb);
Mika Westerberg884e4d52020-08-31 13:05:14 +0300772int tb_domain_freeze_noirq(struct tb *tb);
773int tb_domain_thaw_noirq(struct tb *tb);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300774void tb_domain_complete(struct tb *tb);
Mika Westerberg2d8ff0b2018-07-25 11:48:39 +0300775int tb_domain_runtime_suspend(struct tb *tb);
776int tb_domain_runtime_resume(struct tb *tb);
Mika Westerberg3da88be2020-11-10 11:47:14 +0300777int tb_domain_disapprove_switch(struct tb *tb, struct tb_switch *sw);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300778int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
779int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
780int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300781int tb_domain_disconnect_pcie_paths(struct tb *tb);
Mika Westerberg180b0682021-01-08 16:25:39 +0200782int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
783 int transmit_path, int transmit_ring,
784 int receive_path, int receive_ring);
785int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
786 int transmit_path, int transmit_ring,
787 int receive_path, int receive_ring);
Mika Westerbergd1ff7022017-10-02 13:38:34 +0300788int tb_domain_disconnect_all_paths(struct tb *tb);
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300789
Mika Westerberg559c1e12018-10-22 14:47:01 +0300790static inline struct tb *tb_domain_get(struct tb *tb)
791{
792 if (tb)
793 get_device(&tb->dev);
794 return tb;
795}
796
Mika Westerberg9d3cce02017-06-06 15:25:00 +0300797static inline void tb_domain_put(struct tb *tb)
798{
799 put_device(&tb->dev);
800}
Andreas Noeverd6cc51c2014-06-03 22:04:00 +0200801
Mika Westerberg719a5fe2020-03-05 11:37:15 +0200802struct tb_nvm *tb_nvm_alloc(struct device *dev);
Szuying Chenaef9c692022-09-02 17:40:08 +0800803int tb_nvm_read_version(struct tb_nvm *nvm);
804int tb_nvm_validate(struct tb_nvm *nvm);
805int tb_nvm_write_headers(struct tb_nvm *nvm);
806int tb_nvm_add_active(struct tb_nvm *nvm, nvmem_reg_read_t reg_read);
Mika Westerberg719a5fe2020-03-05 11:37:15 +0200807int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
808 size_t bytes);
Szuying Chenaef9c692022-09-02 17:40:08 +0800809int tb_nvm_add_non_active(struct tb_nvm *nvm, nvmem_reg_write_t reg_write);
Mika Westerberg719a5fe2020-03-05 11:37:15 +0200810void tb_nvm_free(struct tb_nvm *nvm);
811void tb_nvm_exit(void);
812
Mika Westerberg9b383032021-04-01 16:54:15 +0300813typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
814typedef int (*write_block_fn)(void *, unsigned int, const void *, size_t);
815
816int tb_nvm_read_data(unsigned int address, void *buf, size_t size,
817 unsigned int retries, read_block_fn read_block,
818 void *read_block_data);
819int tb_nvm_write_data(unsigned int address, const void *buf, size_t size,
820 unsigned int retries, write_block_fn write_next_block,
821 void *write_block_data);
822
Szuying Chen7bfafaa2022-09-03 10:39:18 +0300823int tb_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
824 size_t size);
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300825struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
826 u64 route);
Mika Westerberge6b245c2017-06-06 15:25:17 +0300827struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
828 struct device *parent, u64 route);
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300829int tb_switch_configure(struct tb_switch *sw);
Mika Westerbergd49b4f02022-10-11 12:11:09 +0300830int tb_switch_configuration_valid(struct tb_switch *sw);
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300831int tb_switch_add(struct tb_switch *sw);
832void tb_switch_remove(struct tb_switch *sw);
Mika Westerberg6ac6fae2020-06-05 14:25:02 +0300833void tb_switch_suspend(struct tb_switch *sw, bool runtime);
Gil Finedcd12ac2024-03-01 15:11:18 +0200834int tb_switch_resume(struct tb_switch *sw, bool runtime);
Mika Westerberg356b6c42019-09-19 15:25:30 +0300835int tb_switch_reset(struct tb_switch *sw);
Gil Fine16396642021-12-17 03:16:40 +0200836int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
837 u32 value, int timeout_msec);
Lukas Wunneraae20bb2016-03-20 13:57:20 +0100838void tb_sw_set_unplugged(struct tb_switch *sw);
Mika Westerberg386e5e22019-12-17 15:33:37 +0300839struct tb_port *tb_switch_find_port(struct tb_switch *sw,
840 enum tb_port_type type);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300841struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
842 u8 depth);
Christoph Hellwig7c39ffe2017-07-18 15:30:05 +0200843struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
Radion Mirchevsky8e9267b2017-10-04 15:24:14 +0300844struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
Mika Westerbergf67cf492017-06-06 15:25:16 +0300845
Mika Westerbergb433d012019-09-30 14:07:22 +0300846/**
847 * tb_switch_for_each_port() - Iterate over each switch port
848 * @sw: Switch whose ports to iterate
849 * @p: Port used as iterator
850 *
851 * Iterates over each switch port skipping the control port (port %0).
852 */
853#define tb_switch_for_each_port(sw, p) \
854 for ((p) = &(sw)->ports[1]; \
855 (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
856
Mika Westerbergb6b0ea72017-10-04 15:19:20 +0300857static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
858{
859 if (sw)
860 get_device(&sw->dev);
861 return sw;
862}
863
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300864static inline void tb_switch_put(struct tb_switch *sw)
865{
866 put_device(&sw->dev);
867}
868
869static inline bool tb_is_switch(const struct device *dev)
870{
871 return dev->type == &tb_switch_type;
872}
873
Greg Kroah-Hartman162736b2023-01-11 12:30:07 +0100874static inline struct tb_switch *tb_to_switch(const struct device *dev)
Mika Westerbergbfe778a2017-06-06 15:25:01 +0300875{
876 if (tb_is_switch(dev))
877 return container_of(dev, struct tb_switch, dev);
878 return NULL;
879}
880
Mika Westerberg0414bec2017-02-19 23:43:26 +0200881static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
882{
883 return tb_to_switch(sw->dev.parent);
884}
885
Gil Fine7ce54222022-09-23 01:30:38 +0300886/**
887 * tb_switch_downstream_port() - Return downstream facing port of parent router
888 * @sw: Device router pointer
889 *
890 * Only call for device routers. Returns the downstream facing port of
891 * the parent router.
892 */
893static inline struct tb_port *tb_switch_downstream_port(struct tb_switch *sw)
894{
895 if (WARN_ON(!tb_route(sw)))
896 return NULL;
897 return tb_port_at(tb_route(sw), tb_switch_parent(sw));
898}
899
Mika Westerbergc4ff1442023-09-04 09:09:34 +0300900/**
901 * tb_switch_depth() - Returns depth of the connected router
902 * @sw: Router
903 */
904static inline int tb_switch_depth(const struct tb_switch *sw)
905{
906 return sw->config.depth;
907}
908
Mika Westerberg17a8f812019-10-08 16:42:47 +0300909static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200910{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300911 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
912 sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200913}
914
Mika Westerberg17a8f812019-10-08 16:42:47 +0300915static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200916{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300917 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
918 sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
Mika Westerberg8b0110d2019-01-08 18:55:09 +0200919}
920
Mika Westerberg17a8f812019-10-08 16:42:47 +0300921static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200922{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300923 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
924 switch (sw->config.device_id) {
925 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
926 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
927 return true;
928 }
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200929 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300930 return false;
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200931}
932
Mika Westerberg17a8f812019-10-08 16:42:47 +0300933static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200934{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300935 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
936 switch (sw->config.device_id) {
937 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
938 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
939 return true;
940 }
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200941 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300942 return false;
Mika Westerberg99cabbb2018-12-30 21:34:08 +0200943}
944
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200945static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
946{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300947 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
948 switch (sw->config.device_id) {
949 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
Mika Westerbergf1d5ec32022-01-07 12:59:01 +0200950 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE:
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300951 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
952 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
953 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
954 return true;
955 }
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200956 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300957 return false;
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200958}
959
960static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
961{
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300962 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
963 switch (sw->config.device_id) {
964 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
965 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
966 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
967 return true;
968 }
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200969 }
Mika Westerberg35ee69e2020-07-25 10:40:47 +0300970 return false;
Mika Westerberg7bffd97e2019-03-22 15:16:53 +0200971}
972
Gil Fine8a90e4f2021-12-17 03:16:39 +0200973static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw)
974{
975 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
976 switch (sw->config.device_id) {
977 case PCI_DEVICE_ID_INTEL_TGL_NHI0:
978 case PCI_DEVICE_ID_INTEL_TGL_NHI1:
979 case PCI_DEVICE_ID_INTEL_TGL_H_NHI0:
980 case PCI_DEVICE_ID_INTEL_TGL_H_NHI1:
981 return true;
982 }
983 }
984 return false;
985}
986
Mika Westerbergf07a3602019-06-25 15:10:01 +0300987/**
988 * tb_switch_is_icm() - Is the switch handled by ICM firmware
989 * @sw: Switch to check
990 *
991 * In case there is a need to differentiate whether ICM firmware or SW CM
992 * is handling @sw this function can be called. It is valid to call this
993 * after tb_switch_alloc() and tb_switch_configure() has been called
994 * (latter only for SW CM case).
995 */
996static inline bool tb_switch_is_icm(const struct tb_switch *sw)
997{
998 return !sw->config.enabled;
999}
1000
Gil Fine81af2952023-08-10 22:37:15 +03001001int tb_switch_set_link_width(struct tb_switch *sw, enum tb_link_width width);
Mika Westerbergde462032020-04-02 14:50:52 +03001002int tb_switch_configure_link(struct tb_switch *sw);
1003void tb_switch_unconfigure_link(struct tb_switch *sw);
Mika Westerberg91c0c122019-03-21 19:03:00 +02001004
Mika Westerberg8afe9092019-03-26 15:52:30 +03001005bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1006int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1007void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1008
Rajmohan Manicf29b9af2019-12-17 15:33:43 +03001009int tb_switch_tmu_init(struct tb_switch *sw);
1010int tb_switch_tmu_post_time(struct tb_switch *sw);
1011int tb_switch_tmu_disable(struct tb_switch *sw);
1012int tb_switch_tmu_enable(struct tb_switch *sw);
Mika Westerbergd49b4f02022-10-11 12:11:09 +03001013int tb_switch_tmu_configure(struct tb_switch *sw, enum tb_switch_tmu_mode mode);
1014
1015/**
1016 * tb_switch_tmu_is_configured() - Is given TMU mode configured
1017 * @sw: Router whose mode to check
1018 * @mode: Mode to check
1019 *
1020 * Checks if given router TMU mode is configured to @mode. Note the
1021 * router TMU might not be enabled to this mode.
1022 */
1023static inline bool tb_switch_tmu_is_configured(const struct tb_switch *sw,
1024 enum tb_switch_tmu_mode mode)
1025{
1026 return sw->tmu.mode_request == mode;
1027}
1028
Gil Finea28ec0e2021-12-17 03:16:38 +02001029/**
Gil Fineb017a462022-05-26 13:59:20 +03001030 * tb_switch_tmu_is_enabled() - Checks if the specified TMU mode is enabled
Gil Finea28ec0e2021-12-17 03:16:38 +02001031 * @sw: Router whose TMU mode to check
Gil Finea28ec0e2021-12-17 03:16:38 +02001032 *
Mika Westerberg826f55d2022-10-07 13:19:09 +03001033 * Return true if hardware TMU configuration matches the requested
Mika Westerbergd49b4f02022-10-11 12:11:09 +03001034 * configuration (and is not %TB_SWITCH_TMU_MODE_OFF).
Gil Finea28ec0e2021-12-17 03:16:38 +02001035 */
Mika Westerberg826f55d2022-10-07 13:19:09 +03001036static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw)
Rajmohan Manicf29b9af2019-12-17 15:33:43 +03001037{
Mika Westerbergd49b4f02022-10-11 12:11:09 +03001038 return sw->tmu.mode != TB_SWITCH_TMU_MODE_OFF &&
1039 sw->tmu.mode == sw->tmu.mode_request;
Rajmohan Manicf29b9af2019-12-17 15:33:43 +03001040}
1041
Mika Westerberg35627352022-10-10 13:36:56 +03001042bool tb_port_clx_is_enabled(struct tb_port *port, unsigned int clx);
Mika Westerberg12a14f22022-10-07 18:12:02 +03001043
Mika Westerberg768e6fe2023-05-24 13:33:57 +03001044int tb_switch_clx_init(struct tb_switch *sw);
Mika Westerberg35627352022-10-10 13:36:56 +03001045int tb_switch_clx_enable(struct tb_switch *sw, unsigned int clx);
1046int tb_switch_clx_disable(struct tb_switch *sw);
Gil Fine8a90e4f2021-12-17 03:16:39 +02001047
1048/**
Mika Westerberg12a14f22022-10-07 18:12:02 +03001049 * tb_switch_clx_is_enabled() - Checks if the CLx is enabled
Gil Fineb017a462022-05-26 13:59:20 +03001050 * @sw: Router to check for the CLx
Mika Westerberg35627352022-10-10 13:36:56 +03001051 * @clx: The CLx states to check for
Gil Fine8a90e4f2021-12-17 03:16:39 +02001052 *
Gil Fineb017a462022-05-26 13:59:20 +03001053 * Checks if the specified CLx is enabled on the router upstream link.
Mika Westerberg35627352022-10-10 13:36:56 +03001054 * Returns true if any of the given states is enabled.
1055 *
Gil Fine8a90e4f2021-12-17 03:16:39 +02001056 * Not applicable for a host router.
1057 */
Mika Westerberg12a14f22022-10-07 18:12:02 +03001058static inline bool tb_switch_clx_is_enabled(const struct tb_switch *sw,
Mika Westerberg35627352022-10-10 13:36:56 +03001059 unsigned int clx)
Gil Fine8a90e4f2021-12-17 03:16:39 +02001060{
Mika Westerberg35627352022-10-10 13:36:56 +03001061 return sw->clx & clx;
Gil Fine43f977b2021-12-17 03:16:43 +02001062}
1063
Gil Fine43f977b2021-12-17 03:16:43 +02001064int tb_switch_pcie_l1_enable(struct tb_switch *sw);
1065
Mika Westerberg30a4eca2022-01-07 13:00:47 +02001066int tb_switch_xhci_connect(struct tb_switch *sw);
1067void tb_switch_xhci_disconnect(struct tb_switch *sw);
1068
Mika Westerberg94581b22022-02-13 11:45:39 +02001069int tb_port_state(struct tb_port *port);
Andreas Noever9da672a2014-06-03 22:04:05 +02001070int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
Andreas Noever520b6702014-06-03 22:04:07 +02001071int tb_port_add_nfc_credits(struct tb_port *port, int credits);
1072int tb_port_clear_counter(struct tb_port *port, int counter);
Mika Westerbergb0407982019-12-17 15:33:40 +03001073int tb_port_unlock(struct tb_port *port);
Mika Westerberg341d4512020-02-21 12:11:54 +02001074int tb_port_enable(struct tb_port *port);
1075int tb_port_disable(struct tb_port *port);
Mika Westerberg0b2863a2017-02-19 16:57:27 +02001076int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
1077void tb_port_release_in_hopid(struct tb_port *port, int hopid);
1078int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
1079void tb_port_release_out_hopid(struct tb_port *port, int hopid);
Mika Westerbergfb19fac2017-02-19 21:51:30 +02001080struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
1081 struct tb_port *prev);
Andreas Noever9da672a2014-06-03 22:04:05 +02001082
Gil Fine2bfeca72023-08-10 22:37:14 +03001083/**
1084 * tb_port_path_direction_downstream() - Checks if path directed downstream
1085 * @src: Source adapter
1086 * @dst: Destination adapter
1087 *
1088 * Returns %true only if the specified path from source adapter (@src)
1089 * to destination adapter (@dst) is directed downstream.
1090 */
1091static inline bool
1092tb_port_path_direction_downstream(const struct tb_port *src,
1093 const struct tb_port *dst)
1094{
1095 return src->sw->config.depth < dst->sw->config.depth;
1096}
1097
Mika Westerberg56ad3ae2021-03-10 13:34:12 +02001098static inline bool tb_port_use_credit_allocation(const struct tb_port *port)
1099{
1100 return tb_port_is_null(port) && port->sw->credit_allocation;
1101}
1102
Mika Westerbergc64c3f32020-04-29 17:07:59 +03001103/**
1104 * tb_for_each_port_on_path() - Iterate over each port on path
1105 * @src: Source port
1106 * @dst: Destination port
1107 * @p: Port used as iterator
1108 *
1109 * Walks over each port on path from @src to @dst.
1110 */
1111#define tb_for_each_port_on_path(src, dst, p) \
1112 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1113 (p) = tb_next_port_on_path((src), (dst), (p)))
1114
Mika Westerberg956c3ab2023-09-03 08:25:39 +03001115/**
1116 * tb_for_each_upstream_port_on_path() - Iterate over each upstreamm port on path
1117 * @src: Source port
1118 * @dst: Destination port
1119 * @p: Port used as iterator
1120 *
1121 * Walks over each upstream lane adapter on path from @src to @dst.
1122 */
1123#define tb_for_each_upstream_port_on_path(src, dst, p) \
1124 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1125 (p) = tb_next_port_on_path((src), (dst), (p))) \
1126 if (!tb_port_is_null((p)) || !tb_is_upstream_port((p))) {\
1127 continue; \
1128 } else
1129
Mika Westerberg5b7b8c02020-05-08 12:41:34 +03001130int tb_port_get_link_speed(struct tb_port *port);
Gil Fineaa673d62023-07-31 05:25:39 +03001131int tb_port_get_link_generation(struct tb_port *port);
Isaac Hazan4210d502020-09-24 11:43:58 +03001132int tb_port_get_link_width(struct tb_port *port);
Gil Fine81af2952023-08-10 22:37:15 +03001133bool tb_port_width_supported(struct tb_port *port, unsigned int width);
Gil Finee111fb92022-09-29 13:00:09 +03001134int tb_port_set_link_width(struct tb_port *port, enum tb_link_width width);
Isaac Hazan5cc0df92020-09-24 11:44:01 +03001135int tb_port_lane_bonding_enable(struct tb_port *port);
1136void tb_port_lane_bonding_disable(struct tb_port *port);
Gil Fine81af2952023-08-10 22:37:15 +03001137int tb_port_wait_for_link_width(struct tb_port *port, unsigned int width,
Mika Westerberge7051be2021-03-22 16:54:54 +02001138 int timeout_msec);
Mika Westerberg69fea372021-03-22 17:01:59 +02001139int tb_port_update_credits(struct tb_port *port);
Mika Westerberg5b7b8c02020-05-08 12:41:34 +03001140
Mika Westerbergda2da042017-06-06 15:24:58 +03001141int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
Rajmohan Maniaa43a9d2019-12-17 15:33:42 +03001142int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
Mika Westerberg6de057e2020-06-29 20:21:07 +03001143int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
Mika Westerbergda2da042017-06-06 15:24:58 +03001144int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
Mika Westerberg3c8b2282020-06-29 20:15:17 +03001145int tb_port_next_cap(struct tb_port *port, unsigned int offset);
Mika Westerberge78db6f2017-10-12 16:45:50 +03001146bool tb_port_is_enabled(struct tb_port *port);
Andreas Noevere2b87852014-06-03 22:04:03 +02001147
Rajmohan Manie6f81852019-12-17 15:33:44 +03001148bool tb_usb3_port_is_enabled(struct tb_port *port);
1149int tb_usb3_port_enable(struct tb_port *port, bool enable);
1150
Mika Westerberg0414bec2017-02-19 23:43:26 +02001151bool tb_pci_port_is_enabled(struct tb_port *port);
Mika Westerberg93f36ad2017-02-19 13:48:29 +02001152int tb_pci_port_enable(struct tb_port *port, bool enable);
1153
Mika Westerberg4f807e42018-09-17 16:30:49 +03001154int tb_dp_port_hpd_is_active(struct tb_port *port);
1155int tb_dp_port_hpd_clear(struct tb_port *port);
1156int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
1157 unsigned int aux_tx, unsigned int aux_rx);
1158bool tb_dp_port_is_enabled(struct tb_port *port);
1159int tb_dp_port_enable(struct tb_port *port, bool enable);
1160
Mika Westerberg0414bec2017-02-19 23:43:26 +02001161struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
1162 struct tb_port *dst, int dst_hopid,
Mika Westerberg43bddb22021-11-14 17:20:59 +02001163 struct tb_port **last, const char *name,
1164 bool alloc_hopid);
Mika Westerberg8c7acaaf2017-02-19 22:11:41 +02001165struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
1166 struct tb_port *dst, int dst_hopid, int link_nr,
1167 const char *name);
Andreas Noever520b6702014-06-03 22:04:07 +02001168void tb_path_free(struct tb_path *path);
1169int tb_path_activate(struct tb_path *path);
1170void tb_path_deactivate(struct tb_path *path);
Sanath Sb35c1d72024-01-13 11:42:23 +02001171int tb_path_deactivate_hop(struct tb_port *port, int hop_index);
Andreas Noever520b6702014-06-03 22:04:07 +02001172bool tb_path_is_invalid(struct tb_path *path);
Mika Westerberg0bd680c2020-03-24 14:44:13 +02001173bool tb_path_port_on_path(const struct tb_path *path,
1174 const struct tb_port *port);
Andreas Noever520b6702014-06-03 22:04:07 +02001175
Mika Westerberg6ed541c2021-03-22 18:09:35 +02001176/**
1177 * tb_path_for_each_hop() - Iterate over each hop on path
1178 * @path: Path whose hops to iterate
1179 * @hop: Hop used as iterator
1180 *
1181 * Iterates over each hop on path.
1182 */
1183#define tb_path_for_each_hop(path, hop) \
1184 for ((hop) = &(path)->hops[0]; \
1185 (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++)
1186
Andreas Noevercd22e732014-06-12 23:11:46 +02001187int tb_drom_read(struct tb_switch *sw);
1188int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
Andreas Noeverc90553b2014-06-03 22:04:11 +02001189
Mika Westerberga9be5582019-01-09 16:42:12 +02001190int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
Sanath S01da6b92024-01-13 11:39:57 +02001191int tb_lc_reset_port(struct tb_port *port);
Mika Westerberge28178b2020-04-02 12:42:44 +03001192int tb_lc_configure_port(struct tb_port *port);
1193void tb_lc_unconfigure_port(struct tb_port *port);
Mika Westerberg284652a2020-04-09 14:23:32 +03001194int tb_lc_configure_xdomain(struct tb_port *port);
1195void tb_lc_unconfigure_xdomain(struct tb_port *port);
Mika Westerbergfdb08872020-11-26 12:52:43 +03001196int tb_lc_start_lane_initialization(struct tb_port *port);
Gil Fine43f977b2021-12-17 03:16:43 +02001197bool tb_lc_is_clx_supported(struct tb_port *port);
Mika Westerberg30a4eca2022-01-07 13:00:47 +02001198bool tb_lc_is_usb_plugged(struct tb_port *port);
1199bool tb_lc_is_xhci_connected(struct tb_port *port);
1200int tb_lc_xhci_connect(struct tb_port *port);
1201void tb_lc_xhci_disconnect(struct tb_port *port);
Mika Westerbergb2911a52019-12-06 18:36:07 +02001202int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
Mika Westerberg5480dfc2019-01-09 17:25:43 +02001203int tb_lc_set_sleep(struct tb_switch *sw);
Mika Westerberg91c0c122019-03-21 19:03:00 +02001204bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
Mika Westerberg8afe9092019-03-26 15:52:30 +03001205bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
1206int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
1207int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
Mario Limonciello1cb36292020-06-23 11:14:29 -05001208int tb_lc_force_power(struct tb_switch *sw);
Andreas Noevera25c8b22014-06-03 22:04:02 +02001209
1210static inline int tb_route_length(u64 route)
1211{
1212 return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
1213}
1214
Andreas Noever9da672a2014-06-03 22:04:05 +02001215/**
1216 * tb_downstream_route() - get route to downstream switch
1217 *
1218 * Port must not be the upstream port (otherwise a loop is created).
1219 *
1220 * Return: Returns a route to the switch behind @port.
1221 */
1222static inline u64 tb_downstream_route(struct tb_port *port)
1223{
1224 return tb_route(port->sw)
1225 | ((u64) port->port << (port->sw->config.depth * 8));
1226}
1227
Mika Westerberg5ca67682020-10-22 13:22:06 +03001228bool tb_is_xdomain_enabled(void);
Mika Westerbergd1ff7022017-10-02 13:38:34 +03001229bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
1230 const void *buf, size_t size);
1231struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
1232 u64 route, const uuid_t *local_uuid,
1233 const uuid_t *remote_uuid);
1234void tb_xdomain_add(struct tb_xdomain *xd);
1235void tb_xdomain_remove(struct tb_xdomain *xd);
1236struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
1237 u8 depth);
1238
Mika Westerberg7f333ac2022-02-22 19:29:43 +02001239static inline struct tb_switch *tb_xdomain_parent(struct tb_xdomain *xd)
1240{
1241 return tb_to_switch(xd->dev.parent);
1242}
1243
Mika Westerberg17fb1a32022-09-30 11:12:42 +03001244/**
1245 * tb_xdomain_downstream_port() - Return downstream facing port of parent router
1246 * @xd: Xdomain pointer
1247 *
1248 * Returns the downstream port the XDomain is connected to.
1249 */
1250static inline struct tb_port *tb_xdomain_downstream_port(struct tb_xdomain *xd)
1251{
1252 return tb_port_at(xd->route, tb_xdomain_parent(xd));
1253}
1254
Mika Westerberg8b02b2d2022-09-03 10:43:25 +03001255int tb_retimer_nvm_read(struct tb_retimer *rt, unsigned int address, void *buf,
1256 size_t size);
Rajmohan Mani3fb10ea2021-04-01 18:42:38 +03001257int tb_retimer_scan(struct tb_port *port, bool add);
Kranthi Kuntaladacb1282020-03-05 16:39:58 +02001258void tb_retimer_remove_all(struct tb_port *port);
1259
1260static inline bool tb_is_retimer(const struct device *dev)
1261{
1262 return dev->type == &tb_retimer_type;
1263}
1264
1265static inline struct tb_retimer *tb_to_retimer(struct device *dev)
1266{
1267 if (tb_is_retimer(dev))
1268 return container_of(dev, struct tb_retimer, dev);
1269 return NULL;
1270}
1271
Gil Fine6e210072022-09-23 01:30:43 +03001272/**
1273 * usb4_switch_version() - Returns USB4 version of the router
1274 * @sw: Router to check
1275 *
1276 * Returns major version of USB4 router (%1 for v1, %2 for v2 and so
1277 * on). Can be called to pre-USB4 router too and in that case returns %0.
1278 */
1279static inline unsigned int usb4_switch_version(const struct tb_switch *sw)
1280{
1281 return FIELD_GET(USB4_VERSION_MAJOR_MASK, sw->config.thunderbolt_version);
1282}
1283
1284/**
1285 * tb_switch_is_usb4() - Is the switch USB4 compliant
1286 * @sw: Switch to check
1287 *
1288 * Returns true if the @sw is USB4 compliant router, false otherwise.
1289 */
1290static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
1291{
1292 return usb4_switch_version(sw) > 0;
1293}
1294
Gil Finedcd12ac2024-03-01 15:11:18 +02001295void usb4_switch_check_wakes(struct tb_switch *sw);
Mika Westerbergb0407982019-12-17 15:33:40 +03001296int usb4_switch_setup(struct tb_switch *sw);
Mika Westerbergd49b4f02022-10-11 12:11:09 +03001297int usb4_switch_configuration_valid(struct tb_switch *sw);
Mika Westerbergb0407982019-12-17 15:33:40 +03001298int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
1299int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
1300 size_t size);
Mika Westerbergb0407982019-12-17 15:33:40 +03001301bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
Mika Westerbergb2911a52019-12-06 18:36:07 +02001302int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
Mika Westerbergb0407982019-12-17 15:33:40 +03001303int usb4_switch_set_sleep(struct tb_switch *sw);
1304int usb4_switch_nvm_sector_size(struct tb_switch *sw);
1305int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
1306 size_t size);
Mika Westerberg1cbf6802021-04-12 15:25:08 +03001307int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address);
Mika Westerbergb0407982019-12-17 15:33:40 +03001308int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
1309 const void *buf, size_t size);
1310int usb4_switch_nvm_authenticate(struct tb_switch *sw);
Mika Westerberg661b1942020-11-10 11:34:07 +03001311int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status);
Mika Westerberg56ad3ae2021-03-10 13:34:12 +02001312int usb4_switch_credits_init(struct tb_switch *sw);
Mika Westerbergb0407982019-12-17 15:33:40 +03001313bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1314int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1315int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1316struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
1317 const struct tb_port *port);
Rajmohan Manie6f81852019-12-17 15:33:44 +03001318struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
1319 const struct tb_port *port);
Mika Westerbergcae5f512021-04-01 17:34:20 +03001320int usb4_switch_add_ports(struct tb_switch *sw);
1321void usb4_switch_remove_ports(struct tb_switch *sw);
Mika Westerbergb0407982019-12-17 15:33:40 +03001322
1323int usb4_port_unlock(struct tb_port *port);
Mario Limonciello5d2569c2022-09-26 09:33:50 -05001324int usb4_port_hotplug_enable(struct tb_port *port);
Sanath S01da6b92024-01-13 11:39:57 +02001325int usb4_port_reset(struct tb_port *port);
Mika Westerberge28178b2020-04-02 12:42:44 +03001326int usb4_port_configure(struct tb_port *port);
1327void usb4_port_unconfigure(struct tb_port *port);
Mika Westerbergf9cad072022-08-30 18:32:47 +03001328int usb4_port_configure_xdomain(struct tb_port *port, struct tb_xdomain *xd);
Mika Westerberg284652a2020-04-09 14:23:32 +03001329void usb4_port_unconfigure_xdomain(struct tb_port *port);
Rajmohan Mani3406de72021-04-01 18:38:05 +03001330int usb4_port_router_offline(struct tb_port *port);
1331int usb4_port_router_online(struct tb_port *port);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001332int usb4_port_enumerate_retimers(struct tb_port *port);
Gil Fine8a90e4f2021-12-17 03:16:39 +02001333bool usb4_port_clx_supported(struct tb_port *port);
Gil Fine81af2952023-08-10 22:37:15 +03001334
1335bool usb4_port_asym_supported(struct tb_port *port);
1336int usb4_port_asym_set_link_width(struct tb_port *port, enum tb_link_width width);
1337int usb4_port_asym_start(struct tb_port *port);
1338
Mika Westerberge8241f62024-04-16 09:41:14 +03001339/**
1340 * enum tb_sb_target - Sideband transaction target
1341 * @USB4_SB_TARGET_ROUTER: Target is the router itself
1342 * @USB4_SB_TARGET_PARTNER: Target is partner
1343 * @USB4_SB_TARGET_RETIMER: Target is retimer
1344 */
1345enum usb4_sb_target {
1346 USB4_SB_TARGET_ROUTER,
1347 USB4_SB_TARGET_PARTNER,
1348 USB4_SB_TARGET_RETIMER,
1349};
1350
1351int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target, u8 index,
1352 u8 reg, void *buf, u8 size);
1353int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1354 u8 index, u8 reg, const void *buf, u8 size);
1355
Mika Westerberg0890fc32023-03-21 10:02:55 +02001356int usb4_port_margining_caps(struct tb_port *port, enum usb4_sb_target target,
1357 u8 index, u32 *caps);
1358int usb4_port_hw_margin(struct tb_port *port, enum usb4_sb_target target,
1359 u8 index, unsigned int lanes, unsigned int ber_level,
1360 bool timing, bool right_high, u32 *results);
1361int usb4_port_sw_margin(struct tb_port *port, enum usb4_sb_target target,
1362 u8 index, unsigned int lanes, bool timing,
Mika Westerbergd0f1e0c2022-02-22 19:31:47 +02001363 bool right_high, u32 counter);
Mika Westerberg0890fc32023-03-21 10:02:55 +02001364int usb4_port_sw_margin_errors(struct tb_port *port, enum usb4_sb_target target,
1365 u8 index, u32 *errors);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001366
Rajmohan Mani3406de72021-04-01 18:38:05 +03001367int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index);
Gil Finecd0c1e52023-03-03 00:17:24 +02001368int usb4_port_retimer_unset_inbound_sbtx(struct tb_port *port, u8 index);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001369int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
Mika Westerbergff6ab052023-03-21 11:40:49 +02001370int usb4_port_retimer_is_cable(struct tb_port *port, u8 index);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001371int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
Rajmohan Manifaa1c612021-04-12 15:29:16 +03001372int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1373 unsigned int address);
Rajmohan Mani02d12852020-03-05 16:33:46 +02001374int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
1375 unsigned int address, const void *buf,
1376 size_t size);
1377int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
1378int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1379 u32 *status);
1380int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1381 unsigned int address, void *buf, size_t size);
Mika Westerberg3b1d8d52020-02-21 23:14:41 +02001382
1383int usb4_usb3_port_max_link_rate(struct tb_port *port);
Mika Westerberg3b1d8d52020-02-21 23:14:41 +02001384int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1385 int *downstream_bw);
1386int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1387 int *downstream_bw);
1388int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1389 int *downstream_bw);
Mario Limonciello1cb36292020-06-23 11:14:29 -05001390
Mika Westerberge3273802022-03-23 16:18:28 +02001391int usb4_dp_port_set_cm_id(struct tb_port *port, int cm_id);
Mika Westerberg8d73f6b2023-02-01 13:21:37 +02001392bool usb4_dp_port_bandwidth_mode_supported(struct tb_port *port);
1393bool usb4_dp_port_bandwidth_mode_enabled(struct tb_port *port);
1394int usb4_dp_port_set_cm_bandwidth_mode_supported(struct tb_port *port,
1395 bool supported);
Mika Westerberge3273802022-03-23 16:18:28 +02001396int usb4_dp_port_group_id(struct tb_port *port);
1397int usb4_dp_port_set_group_id(struct tb_port *port, int group_id);
1398int usb4_dp_port_nrd(struct tb_port *port, int *rate, int *lanes);
1399int usb4_dp_port_set_nrd(struct tb_port *port, int rate, int lanes);
1400int usb4_dp_port_granularity(struct tb_port *port);
1401int usb4_dp_port_set_granularity(struct tb_port *port, int granularity);
Mika Westerberg8d73f6b2023-02-01 13:21:37 +02001402int usb4_dp_port_set_estimated_bandwidth(struct tb_port *port, int bw);
1403int usb4_dp_port_allocated_bandwidth(struct tb_port *port);
1404int usb4_dp_port_allocate_bandwidth(struct tb_port *port, int bw);
1405int usb4_dp_port_requested_bandwidth(struct tb_port *port);
Mika Westerberge3273802022-03-23 16:18:28 +02001406
Gil Fine6e19d482022-09-29 12:49:48 +03001407int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable);
1408
Mika Westerbergcae5f512021-04-01 17:34:20 +03001409static inline bool tb_is_usb4_port_device(const struct device *dev)
1410{
1411 return dev->type == &usb4_port_device_type;
1412}
1413
1414static inline struct usb4_port *tb_to_usb4_port_device(struct device *dev)
1415{
1416 if (tb_is_usb4_port_device(dev))
1417 return container_of(dev, struct usb4_port, dev);
1418 return NULL;
1419}
1420
1421struct usb4_port *usb4_port_device_add(struct tb_port *port);
1422void usb4_port_device_remove(struct usb4_port *usb4);
Rajmohan Mani3fb10ea2021-04-01 18:42:38 +03001423int usb4_port_device_resume(struct usb4_port *usb4);
Mika Westerbergcae5f512021-04-01 17:34:20 +03001424
Mika Westerberg872003712023-05-26 14:55:20 +03001425static inline bool usb4_port_device_is_offline(const struct usb4_port *usb4)
1426{
1427 return usb4->offline;
1428}
1429
Mario Limonciello1cb36292020-06-23 11:14:29 -05001430void tb_check_quirks(struct tb_switch *sw);
1431
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001432#ifdef CONFIG_ACPI
Mika Westerberg408e1d92022-12-27 09:17:48 +02001433bool tb_acpi_add_links(struct tb_nhi *nhi);
Mika Westerbergc6da62a2020-02-18 16:14:42 +02001434
1435bool tb_acpi_is_native(void);
1436bool tb_acpi_may_tunnel_usb3(void);
1437bool tb_acpi_may_tunnel_dp(void);
1438bool tb_acpi_may_tunnel_pcie(void);
1439bool tb_acpi_is_xdomain_allowed(void);
Rajmohan Maniccc5cb82021-04-01 18:20:17 +03001440
1441int tb_acpi_init(void);
1442void tb_acpi_exit(void);
1443int tb_acpi_power_on_retimers(struct tb_port *port);
1444int tb_acpi_power_off_retimers(struct tb_port *port);
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001445#else
Mika Westerberg408e1d92022-12-27 09:17:48 +02001446static inline bool tb_acpi_add_links(struct tb_nhi *nhi) { return false; }
Mika Westerbergc6da62a2020-02-18 16:14:42 +02001447
1448static inline bool tb_acpi_is_native(void) { return true; }
1449static inline bool tb_acpi_may_tunnel_usb3(void) { return true; }
1450static inline bool tb_acpi_may_tunnel_dp(void) { return true; }
1451static inline bool tb_acpi_may_tunnel_pcie(void) { return true; }
1452static inline bool tb_acpi_is_xdomain_allowed(void) { return true; }
Rajmohan Maniccc5cb82021-04-01 18:20:17 +03001453
1454static inline int tb_acpi_init(void) { return 0; }
1455static inline void tb_acpi_exit(void) { }
1456static inline int tb_acpi_power_on_retimers(struct tb_port *port) { return 0; }
1457static inline int tb_acpi_power_off_retimers(struct tb_port *port) { return 0; }
Mika Westerbergb2be2b02019-04-02 15:26:00 +03001458#endif
1459
Gil Fine54e41812020-06-29 20:30:52 +03001460#ifdef CONFIG_DEBUG_FS
1461void tb_debugfs_init(void);
1462void tb_debugfs_exit(void);
1463void tb_switch_debugfs_init(struct tb_switch *sw);
1464void tb_switch_debugfs_remove(struct tb_switch *sw);
Mika Westerbergd0f1e0c2022-02-22 19:31:47 +02001465void tb_xdomain_debugfs_init(struct tb_xdomain *xd);
1466void tb_xdomain_debugfs_remove(struct tb_xdomain *xd);
Mika Westerberg407ac932020-10-07 17:53:44 +03001467void tb_service_debugfs_init(struct tb_service *svc);
1468void tb_service_debugfs_remove(struct tb_service *svc);
Mika Westerberg6d241fa2023-03-20 13:50:44 +02001469void tb_retimer_debugfs_init(struct tb_retimer *rt);
1470void tb_retimer_debugfs_remove(struct tb_retimer *rt);
Gil Fine54e41812020-06-29 20:30:52 +03001471#else
1472static inline void tb_debugfs_init(void) { }
1473static inline void tb_debugfs_exit(void) { }
1474static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
1475static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
Mika Westerbergd0f1e0c2022-02-22 19:31:47 +02001476static inline void tb_xdomain_debugfs_init(struct tb_xdomain *xd) { }
1477static inline void tb_xdomain_debugfs_remove(struct tb_xdomain *xd) { }
Mika Westerberg407ac932020-10-07 17:53:44 +03001478static inline void tb_service_debugfs_init(struct tb_service *svc) { }
1479static inline void tb_service_debugfs_remove(struct tb_service *svc) { }
Mika Westerberg6d241fa2023-03-20 13:50:44 +02001480static inline void tb_retimer_debugfs_init(struct tb_retimer *rt) { }
1481static inline void tb_retimer_debugfs_remove(struct tb_retimer *rt) { }
Gil Fine54e41812020-06-29 20:30:52 +03001482#endif
1483
Andreas Noeverd6cc51c2014-06-03 22:04:00 +02001484#endif