Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Andreas Noever | d6cc51c | 2014-06-03 22:04:00 +0200 | [diff] [blame] | 2 | /* |
Mika Westerberg | 15c6784 | 2018-10-01 12:31:22 +0300 | [diff] [blame] | 3 | * Thunderbolt driver - bus logic (NHI independent) |
Andreas Noever | d6cc51c | 2014-06-03 22:04:00 +0200 | [diff] [blame] | 4 | * |
| 5 | * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> |
Mika Westerberg | 15c6784 | 2018-10-01 12:31:22 +0300 | [diff] [blame] | 6 | * Copyright (C) 2018, Intel Corporation |
Andreas Noever | d6cc51c | 2014-06-03 22:04:00 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef TB_H_ |
| 10 | #define TB_H_ |
| 11 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 12 | #include <linux/nvmem-provider.h> |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 13 | #include <linux/pci.h> |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 14 | #include <linux/thunderbolt.h> |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 15 | #include <linux/uuid.h> |
Gil Fine | b017a46 | 2022-05-26 13:59:20 +0300 | [diff] [blame] | 16 | #include <linux/bitfield.h> |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 17 | |
| 18 | #include "tb_regs.h" |
Andreas Noever | d6cc51c | 2014-06-03 22:04:00 +0200 | [diff] [blame] | 19 | #include "ctl.h" |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 20 | #include "dma_port.h" |
Andreas Noever | d6cc51c | 2014-06-03 22:04:00 +0200 | [diff] [blame] | 21 | |
Sanjay R Mehta | 7af9da8c | 2023-02-14 13:13:50 -0600 | [diff] [blame] | 22 | /* Keep link controller awake during update */ |
| 23 | #define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0) |
| 24 | /* Disable CLx if not supported */ |
| 25 | #define QUIRK_NO_CLX BIT(1) |
Mika Westerberg | a75e068 | 2024-01-26 15:55:55 +0200 | [diff] [blame] | 26 | /* Need to keep power on while USB4 port is in redrive mode */ |
| 27 | #define QUIRK_KEEP_POWER_IN_DP_REDRIVE BIT(2) |
Sanjay R Mehta | 7af9da8c | 2023-02-14 13:13:50 -0600 | [diff] [blame] | 28 | |
Andreas Noever | d6cc51c | 2014-06-03 22:04:00 +0200 | [diff] [blame] | 29 | /** |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 30 | * struct tb_nvm - Structure holding NVM information |
| 31 | * @dev: Owner of the NVM |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 32 | * @major: Major version number of the active NVM portion |
| 33 | * @minor: Minor version number of the active NVM portion |
| 34 | * @id: Identifier used with both NVM portions |
| 35 | * @active: Active portion NVMem device |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 36 | * @active_size: Size in bytes of the active NVM |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 37 | * @non_active: Non-active portion NVMem device |
| 38 | * @buf: Buffer where the NVM image is stored before it is written to |
| 39 | * the actual NVM flash device |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 40 | * @buf_data_start: Where the actual image starts after skipping |
| 41 | * possible headers |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 42 | * @buf_data_size: Number of bytes actually consumed by the new NVM |
| 43 | * image |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 44 | * @authenticating: The device is authenticating the new NVM |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 45 | * @flushed: The image has been flushed to the storage area |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 46 | * @vops: Router vendor specific NVM operations (optional) |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 47 | * |
| 48 | * The user of this structure needs to handle serialization of possible |
| 49 | * concurrent access. |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 50 | */ |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 51 | struct tb_nvm { |
| 52 | struct device *dev; |
Szuying Chen | 5424e1b | 2022-09-02 17:40:09 +0800 | [diff] [blame] | 53 | u32 major; |
| 54 | u32 minor; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 55 | int id; |
| 56 | struct nvmem_device *active; |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 57 | size_t active_size; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 58 | struct nvmem_device *non_active; |
| 59 | void *buf; |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 60 | void *buf_data_start; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 61 | size_t buf_data_size; |
| 62 | bool authenticating; |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 63 | bool flushed; |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 64 | const struct tb_nvm_vendor_ops *vops; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 65 | }; |
| 66 | |
Rajmohan Mani | ff3a830 | 2021-04-12 14:01:46 +0300 | [diff] [blame] | 67 | enum tb_nvm_write_ops { |
| 68 | WRITE_AND_AUTHENTICATE = 1, |
| 69 | WRITE_ONLY = 2, |
Mika Westerberg | 1cbf680 | 2021-04-12 15:25:08 +0300 | [diff] [blame] | 70 | AUTHENTICATE_ONLY = 3, |
Rajmohan Mani | ff3a830 | 2021-04-12 14:01:46 +0300 | [diff] [blame] | 71 | }; |
| 72 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 73 | #define TB_SWITCH_KEY_SIZE 32 |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 74 | #define TB_SWITCH_MAX_DEPTH 6 |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 75 | #define USB4_SWITCH_MAX_DEPTH 5 |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 76 | |
| 77 | /** |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 78 | * enum tb_switch_tmu_mode - TMU mode |
| 79 | * @TB_SWITCH_TMU_MODE_OFF: TMU is off |
| 80 | * @TB_SWITCH_TMU_MODE_LOWRES: Uni-directional, normal mode |
| 81 | * @TB_SWITCH_TMU_MODE_HIFI_UNI: Uni-directional, HiFi mode |
| 82 | * @TB_SWITCH_TMU_MODE_HIFI_BI: Bi-directional, HiFi mode |
| 83 | * @TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI: Enhanced Uni-directional, MedRes mode |
| 84 | * |
| 85 | * Ordering is based on TMU accuracy level (highest last). |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 86 | */ |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 87 | enum tb_switch_tmu_mode { |
| 88 | TB_SWITCH_TMU_MODE_OFF, |
| 89 | TB_SWITCH_TMU_MODE_LOWRES, |
| 90 | TB_SWITCH_TMU_MODE_HIFI_UNI, |
| 91 | TB_SWITCH_TMU_MODE_HIFI_BI, |
| 92 | TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI, |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | /** |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 96 | * struct tb_switch_tmu - Structure holding router TMU configuration |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 97 | * @cap: Offset to the TMU capability (%0 if not found) |
| 98 | * @has_ucap: Does the switch support uni-directional mode |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 99 | * @mode: TMU mode related to the upstream router. Reflects the HW |
| 100 | * setting. Don't care for host router. |
| 101 | * @mode_request: TMU mode requested to set. Related to upstream router. |
| 102 | * Don't care for host router. |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 103 | */ |
| 104 | struct tb_switch_tmu { |
| 105 | int cap; |
| 106 | bool has_ucap; |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 107 | enum tb_switch_tmu_mode mode; |
| 108 | enum tb_switch_tmu_mode mode_request; |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 109 | }; |
| 110 | |
| 111 | /** |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 112 | * struct tb_switch - a thunderbolt switch |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 113 | * @dev: Device for the switch |
| 114 | * @config: Switch configuration |
| 115 | * @ports: Ports in this switch |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 116 | * @dma_port: If the switch has port supporting DMA configuration based |
| 117 | * mailbox this will hold the pointer to that (%NULL |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 118 | * otherwise). If set it also means the switch has |
| 119 | * upgradeable NVM. |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 120 | * @tmu: The switch TMU configuration |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 121 | * @tb: Pointer to the domain the switch belongs to |
| 122 | * @uid: Unique ID of the switch |
| 123 | * @uuid: UUID of the switch (or %NULL if not supported) |
| 124 | * @vendor: Vendor ID of the switch |
| 125 | * @device: Device ID of the switch |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 126 | * @vendor_name: Name of the vendor (or %NULL if not known) |
| 127 | * @device_name: Name of the device (or %NULL if not known) |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 128 | * @link_speed: Speed of the link in Gb/s |
Gil Fine | e111fb9 | 2022-09-29 13:00:09 +0300 | [diff] [blame] | 129 | * @link_width: Width of the upstream facing link |
Gil Fine | ba2a2a8 | 2023-12-04 15:14:58 +0200 | [diff] [blame] | 130 | * @preferred_link_width: Router preferred link width (only set for Gen 4 links) |
Mika Westerberg | bbcf40b | 2020-03-04 17:09:14 +0200 | [diff] [blame] | 131 | * @link_usb4: Upstream link is USB4 |
Mika Westerberg | 2c3c419 | 2017-06-06 15:25:13 +0300 | [diff] [blame] | 132 | * @generation: Switch Thunderbolt generation |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 133 | * @cap_plug_events: Offset to the plug events capability (%0 if not found) |
Gil Fine | 23ccd21 | 2021-12-17 03:16:41 +0200 | [diff] [blame] | 134 | * @cap_vsec_tmu: Offset to the TMU vendor specific capability (%0 if not found) |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 135 | * @cap_lc: Offset to the link controller capability (%0 if not found) |
Gil Fine | 43f977b | 2021-12-17 03:16:43 +0200 | [diff] [blame] | 136 | * @cap_lp: Offset to the low power (CLx for TBT) capability (%0 if not found) |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 137 | * @is_unplugged: The switch is going away |
| 138 | * @drom: DROM of the switch (%NULL if not found) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 139 | * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise) |
| 140 | * @no_nvm_upgrade: Prevent NVM upgrade of this switch |
| 141 | * @safe_mode: The switch is in safe-mode |
Yehezkel Bernat | 14862ee | 2018-01-22 12:50:09 +0200 | [diff] [blame] | 142 | * @boot: Whether the switch was already authorized on boot or not |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 143 | * @rpm: The switch supports runtime PM |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 144 | * @authorized: Whether the switch is authorized by user or policy |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 145 | * @security_level: Switch supported security level |
Gil Fine | 54e4181 | 2020-06-29 20:30:52 +0300 | [diff] [blame] | 146 | * @debugfs_dir: Pointer to the debugfs structure |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 147 | * @key: Contains the key used to challenge the device or %NULL if not |
| 148 | * supported. Size of the key is %TB_SWITCH_KEY_SIZE. |
| 149 | * @connection_id: Connection ID used with ICM messaging |
| 150 | * @connection_key: Connection key used with ICM messaging |
| 151 | * @link: Root switch link this switch is connected (ICM only) |
| 152 | * @depth: Depth in the chain this switch is connected (ICM only) |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 153 | * @rpm_complete: Completion used to wait for runtime resume to |
| 154 | * complete (ICM only) |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 155 | * @quirks: Quirks used for this Thunderbolt switch |
Mika Westerberg | 56ad3ae | 2021-03-10 13:34:12 +0200 | [diff] [blame] | 156 | * @credit_allocation: Are the below buffer allocation parameters valid |
| 157 | * @max_usb3_credits: Router preferred number of buffers for USB 3.x |
| 158 | * @min_dp_aux_credits: Router preferred minimum number of buffers for DP AUX |
| 159 | * @min_dp_main_credits: Router preferred minimum number of buffers for DP MAIN |
| 160 | * @max_pcie_credits: Router preferred number of buffers for PCIe |
| 161 | * @max_dma_credits: Router preferred number of buffers for DMA/P2P |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 162 | * @clx: CLx states on the upstream link of the router |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 163 | * |
| 164 | * When the switch is being added or removed to the domain (other |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 165 | * switches) you need to have domain lock held. |
Mika Westerberg | c3963a5 | 2021-02-01 15:03:00 +0300 | [diff] [blame] | 166 | * |
| 167 | * In USB4 terminology this structure represents a router. |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 168 | */ |
| 169 | struct tb_switch { |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 170 | struct device dev; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 171 | struct tb_regs_switch_header config; |
| 172 | struct tb_port *ports; |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 173 | struct tb_dma_port *dma_port; |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 174 | struct tb_switch_tmu tmu; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 175 | struct tb *tb; |
Andreas Noever | c90553b | 2014-06-03 22:04:11 +0200 | [diff] [blame] | 176 | u64 uid; |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 177 | uuid_t *uuid; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 178 | u16 vendor; |
| 179 | u16 device; |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 180 | const char *vendor_name; |
| 181 | const char *device_name; |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 182 | unsigned int link_speed; |
Gil Fine | e111fb9 | 2022-09-29 13:00:09 +0300 | [diff] [blame] | 183 | enum tb_link_width link_width; |
Gil Fine | ba2a2a8 | 2023-12-04 15:14:58 +0200 | [diff] [blame] | 184 | enum tb_link_width preferred_link_width; |
Mika Westerberg | bbcf40b | 2020-03-04 17:09:14 +0200 | [diff] [blame] | 185 | bool link_usb4; |
Mika Westerberg | 2c3c419 | 2017-06-06 15:25:13 +0300 | [diff] [blame] | 186 | unsigned int generation; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 187 | int cap_plug_events; |
Gil Fine | 23ccd21 | 2021-12-17 03:16:41 +0200 | [diff] [blame] | 188 | int cap_vsec_tmu; |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 189 | int cap_lc; |
Gil Fine | 43f977b | 2021-12-17 03:16:43 +0200 | [diff] [blame] | 190 | int cap_lp; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 191 | bool is_unplugged; |
Andreas Noever | cd22e73 | 2014-06-12 23:11:46 +0200 | [diff] [blame] | 192 | u8 *drom; |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 193 | struct tb_nvm *nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 194 | bool no_nvm_upgrade; |
| 195 | bool safe_mode; |
Yehezkel Bernat | 14862ee | 2018-01-22 12:50:09 +0200 | [diff] [blame] | 196 | bool boot; |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 197 | bool rpm; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 198 | unsigned int authorized; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 199 | enum tb_security_level security_level; |
Gil Fine | 54e4181 | 2020-06-29 20:30:52 +0300 | [diff] [blame] | 200 | struct dentry *debugfs_dir; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 201 | u8 *key; |
| 202 | u8 connection_id; |
| 203 | u8 connection_key; |
| 204 | u8 link; |
| 205 | u8 depth; |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 206 | struct completion rpm_complete; |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 207 | unsigned long quirks; |
Mika Westerberg | 56ad3ae | 2021-03-10 13:34:12 +0200 | [diff] [blame] | 208 | bool credit_allocation; |
| 209 | unsigned int max_usb3_credits; |
| 210 | unsigned int min_dp_aux_credits; |
| 211 | unsigned int min_dp_main_credits; |
| 212 | unsigned int max_pcie_credits; |
| 213 | unsigned int max_dma_credits; |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 214 | unsigned int clx; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 215 | }; |
| 216 | |
| 217 | /** |
Mika Westerberg | 6ce3563 | 2022-03-23 16:45:39 +0200 | [diff] [blame] | 218 | * struct tb_bandwidth_group - Bandwidth management group |
| 219 | * @tb: Pointer to the domain the group belongs to |
| 220 | * @index: Index of the group (aka Group_ID). Valid values %1-%7 |
| 221 | * @ports: DP IN adapters belonging to this group are linked here |
Mika Westerberg | 52a4490 | 2024-01-09 17:57:10 +0200 | [diff] [blame] | 222 | * @reserved: Bandwidth released by one tunnel in the group, available |
| 223 | * to others. This is reported as part of estimated_bw for |
| 224 | * the group. |
| 225 | * @release_work: Worker to release the @reserved if it is not used by |
| 226 | * any of the tunnels. |
Mika Westerberg | 6ce3563 | 2022-03-23 16:45:39 +0200 | [diff] [blame] | 227 | * |
| 228 | * Any tunnel that requires isochronous bandwidth (that's DP for now) is |
| 229 | * attached to a bandwidth group. All tunnels going through the same |
| 230 | * USB4 links share the same group and can dynamically distribute the |
| 231 | * bandwidth within the group. |
| 232 | */ |
| 233 | struct tb_bandwidth_group { |
| 234 | struct tb *tb; |
| 235 | int index; |
| 236 | struct list_head ports; |
Mika Westerberg | 52a4490 | 2024-01-09 17:57:10 +0200 | [diff] [blame] | 237 | int reserved; |
| 238 | struct delayed_work release_work; |
Mika Westerberg | 6ce3563 | 2022-03-23 16:45:39 +0200 | [diff] [blame] | 239 | }; |
| 240 | |
| 241 | /** |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 242 | * struct tb_port - a thunderbolt port, part of a tb_switch |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 243 | * @config: Cached port configuration read from registers |
| 244 | * @sw: Switch the port belongs to |
| 245 | * @remote: Remote port (%NULL if not connected) |
| 246 | * @xdomain: Remote host (%NULL if not connected) |
| 247 | * @cap_phy: Offset, zero if not found |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 248 | * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present) |
Mika Westerberg | 56183c8 | 2017-02-19 10:39:34 +0200 | [diff] [blame] | 249 | * @cap_adap: Offset of the adapter specific capability (%0 if not present) |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 250 | * @cap_usb4: Offset to the USB4 port capability (%0 if not present) |
Mika Westerberg | cae5f51 | 2021-04-01 17:34:20 +0300 | [diff] [blame] | 251 | * @usb4: Pointer to the USB4 port structure (only if @cap_usb4 is != %0) |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 252 | * @port: Port number on switch |
Nikunj A. Dadhania | 8824d19 | 2020-07-21 17:05:23 +0530 | [diff] [blame] | 253 | * @disabled: Disabled by eeprom or enabled but not implemented |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 254 | * @bonded: true if the port is bonded (two lanes combined as one) |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 255 | * @dual_link_port: If the switch is connected using two ports, points |
| 256 | * to the other port. |
| 257 | * @link_nr: Is this primary or secondary port on the dual_link. |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 258 | * @in_hopids: Currently allocated input HopIDs |
| 259 | * @out_hopids: Currently allocated output HopIDs |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 260 | * @list: Used to link ports to DP resources list |
Mika Westerberg | 56ad3ae | 2021-03-10 13:34:12 +0200 | [diff] [blame] | 261 | * @total_credits: Total number of buffers available for this port |
| 262 | * @ctl_credits: Buffers reserved for control path |
Mika Westerberg | 6ed541c | 2021-03-22 18:09:35 +0200 | [diff] [blame] | 263 | * @dma_credits: Number of credits allocated for DMA tunneling for all |
| 264 | * DMA paths through this port. |
Mika Westerberg | 6ce3563 | 2022-03-23 16:45:39 +0200 | [diff] [blame] | 265 | * @group: Bandwidth allocation group the adapter is assigned to. Only |
| 266 | * used for DP IN adapters for now. |
| 267 | * @group_list: The adapter is linked to the group's list of ports through this |
Gil Fine | f0a57dd | 2023-01-31 13:04:52 +0200 | [diff] [blame] | 268 | * @max_bw: Maximum possible bandwidth through this adapter if set to |
| 269 | * non-zero. |
Mika Westerberg | a75e068 | 2024-01-26 15:55:55 +0200 | [diff] [blame] | 270 | * @redrive: For DP IN, if true the adapter is in redrive mode. |
Mika Westerberg | c3963a5 | 2021-02-01 15:03:00 +0300 | [diff] [blame] | 271 | * |
| 272 | * In USB4 terminology this structure represents an adapter (protocol or |
| 273 | * lane adapter). |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 274 | */ |
| 275 | struct tb_port { |
| 276 | struct tb_regs_port_header config; |
| 277 | struct tb_switch *sw; |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 278 | struct tb_port *remote; |
| 279 | struct tb_xdomain *xdomain; |
| 280 | int cap_phy; |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 281 | int cap_tmu; |
Mika Westerberg | 56183c8 | 2017-02-19 10:39:34 +0200 | [diff] [blame] | 282 | int cap_adap; |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 283 | int cap_usb4; |
Mika Westerberg | cae5f51 | 2021-04-01 17:34:20 +0300 | [diff] [blame] | 284 | struct usb4_port *usb4; |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 285 | u8 port; |
| 286 | bool disabled; |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 287 | bool bonded; |
Andreas Noever | cd22e73 | 2014-06-12 23:11:46 +0200 | [diff] [blame] | 288 | struct tb_port *dual_link_port; |
| 289 | u8 link_nr:1; |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 290 | struct ida in_hopids; |
| 291 | struct ida out_hopids; |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 292 | struct list_head list; |
Mika Westerberg | 56ad3ae | 2021-03-10 13:34:12 +0200 | [diff] [blame] | 293 | unsigned int total_credits; |
| 294 | unsigned int ctl_credits; |
Mika Westerberg | 6ed541c | 2021-03-22 18:09:35 +0200 | [diff] [blame] | 295 | unsigned int dma_credits; |
Mika Westerberg | 6ce3563 | 2022-03-23 16:45:39 +0200 | [diff] [blame] | 296 | struct tb_bandwidth_group *group; |
| 297 | struct list_head group_list; |
Gil Fine | f0a57dd | 2023-01-31 13:04:52 +0200 | [diff] [blame] | 298 | unsigned int max_bw; |
Mika Westerberg | a75e068 | 2024-01-26 15:55:55 +0200 | [diff] [blame] | 299 | bool redrive; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 300 | }; |
| 301 | |
| 302 | /** |
Mika Westerberg | cae5f51 | 2021-04-01 17:34:20 +0300 | [diff] [blame] | 303 | * struct usb4_port - USB4 port device |
| 304 | * @dev: Device for the port |
| 305 | * @port: Pointer to the lane 0 adapter |
Rajmohan Mani | ccc5cb8 | 2021-04-01 18:20:17 +0300 | [diff] [blame] | 306 | * @can_offline: Does the port have necessary platform support to moved |
| 307 | * it into offline mode and back |
Rajmohan Mani | 3fb10ea | 2021-04-01 18:42:38 +0300 | [diff] [blame] | 308 | * @offline: The port is currently in offline mode |
Mika Westerberg | d0f1e0c | 2022-02-22 19:31:47 +0200 | [diff] [blame] | 309 | * @margining: Pointer to margining structure if enabled |
Mika Westerberg | cae5f51 | 2021-04-01 17:34:20 +0300 | [diff] [blame] | 310 | */ |
| 311 | struct usb4_port { |
| 312 | struct device dev; |
| 313 | struct tb_port *port; |
Rajmohan Mani | ccc5cb8 | 2021-04-01 18:20:17 +0300 | [diff] [blame] | 314 | bool can_offline; |
Rajmohan Mani | 3fb10ea | 2021-04-01 18:42:38 +0300 | [diff] [blame] | 315 | bool offline; |
Mika Westerberg | d0f1e0c | 2022-02-22 19:31:47 +0200 | [diff] [blame] | 316 | #ifdef CONFIG_USB4_DEBUGFS_MARGINING |
| 317 | struct tb_margining *margining; |
| 318 | #endif |
Mika Westerberg | cae5f51 | 2021-04-01 17:34:20 +0300 | [diff] [blame] | 319 | }; |
| 320 | |
| 321 | /** |
Kranthi Kuntala | dacb128 | 2020-03-05 16:39:58 +0200 | [diff] [blame] | 322 | * tb_retimer: Thunderbolt retimer |
| 323 | * @dev: Device for the retimer |
| 324 | * @tb: Pointer to the domain the retimer belongs to |
| 325 | * @index: Retimer index facing the router USB4 port |
| 326 | * @vendor: Vendor ID of the retimer |
| 327 | * @device: Device ID of the retimer |
| 328 | * @port: Pointer to the lane 0 adapter |
| 329 | * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise) |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 330 | * @no_nvm_upgrade: Prevent NVM upgrade of this retimer |
Kranthi Kuntala | dacb128 | 2020-03-05 16:39:58 +0200 | [diff] [blame] | 331 | * @auth_status: Status of last NVM authentication |
Mika Westerberg | ff6ab05 | 2023-03-21 11:40:49 +0200 | [diff] [blame] | 332 | * @margining: Pointer to margining structure if enabled |
Kranthi Kuntala | dacb128 | 2020-03-05 16:39:58 +0200 | [diff] [blame] | 333 | */ |
| 334 | struct tb_retimer { |
| 335 | struct device dev; |
| 336 | struct tb *tb; |
| 337 | u8 index; |
| 338 | u32 vendor; |
| 339 | u32 device; |
| 340 | struct tb_port *port; |
| 341 | struct tb_nvm *nvm; |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 342 | bool no_nvm_upgrade; |
Kranthi Kuntala | dacb128 | 2020-03-05 16:39:58 +0200 | [diff] [blame] | 343 | u32 auth_status; |
Mika Westerberg | ff6ab05 | 2023-03-21 11:40:49 +0200 | [diff] [blame] | 344 | #ifdef CONFIG_USB4_DEBUGFS_MARGINING |
| 345 | struct tb_margining *margining; |
| 346 | #endif |
Kranthi Kuntala | dacb128 | 2020-03-05 16:39:58 +0200 | [diff] [blame] | 347 | }; |
| 348 | |
| 349 | /** |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 350 | * struct tb_path_hop - routing information for a tb_path |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 351 | * @in_port: Ingress port of a switch |
| 352 | * @out_port: Egress port of a switch where the packet is routed out |
| 353 | * (must be on the same switch than @in_port) |
| 354 | * @in_hop_index: HopID where the path configuration entry is placed in |
| 355 | * the path config space of @in_port. |
| 356 | * @in_counter_index: Used counter index (not used in the driver |
| 357 | * currently, %-1 to disable) |
| 358 | * @next_hop_index: HopID of the packet when it is routed out from @out_port |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 359 | * @initial_credits: Number of initial flow control credits allocated for |
| 360 | * the path |
Mika Westerberg | 02c5e7c | 2020-12-10 16:07:59 +0200 | [diff] [blame] | 361 | * @nfc_credits: Number of non-flow controlled buffers allocated for the |
| 362 | * @in_port. |
Mika Westerberg | ce91d79 | 2023-09-08 12:07:47 +0300 | [diff] [blame] | 363 | * @pm_support: Set path PM packet support bit to 1 (for USB4 v2 routers) |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 364 | * |
| 365 | * Hop configuration is always done on the IN port of a switch. |
| 366 | * in_port and out_port have to be on the same switch. Packets arriving on |
| 367 | * in_port with "hop" = in_hop_index will get routed to through out_port. The |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 368 | * next hop to take (on out_port->remote) is determined by |
| 369 | * next_hop_index. When routing packet to another switch (out->remote is |
| 370 | * set) the @next_hop_index must match the @in_hop_index of that next |
| 371 | * hop to make routing possible. |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 372 | * |
| 373 | * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in |
| 374 | * port. |
| 375 | */ |
| 376 | struct tb_path_hop { |
| 377 | struct tb_port *in_port; |
| 378 | struct tb_port *out_port; |
| 379 | int in_hop_index; |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 380 | int in_counter_index; |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 381 | int next_hop_index; |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 382 | unsigned int initial_credits; |
Mika Westerberg | 02c5e7c | 2020-12-10 16:07:59 +0200 | [diff] [blame] | 383 | unsigned int nfc_credits; |
Mika Westerberg | ce91d79 | 2023-09-08 12:07:47 +0300 | [diff] [blame] | 384 | bool pm_support; |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 385 | }; |
| 386 | |
| 387 | /** |
| 388 | * enum tb_path_port - path options mask |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 389 | * @TB_PATH_NONE: Do not activate on any hop on path |
| 390 | * @TB_PATH_SOURCE: Activate on the first hop (out of src) |
| 391 | * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last) |
| 392 | * @TB_PATH_DESTINATION: Activate on the last hop (into dst) |
| 393 | * @TB_PATH_ALL: Activate on all hops on the path |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 394 | */ |
| 395 | enum tb_path_port { |
| 396 | TB_PATH_NONE = 0, |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 397 | TB_PATH_SOURCE = 1, |
| 398 | TB_PATH_INTERNAL = 2, |
| 399 | TB_PATH_DESTINATION = 4, |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 400 | TB_PATH_ALL = 7, |
| 401 | }; |
| 402 | |
| 403 | /** |
| 404 | * struct tb_path - a unidirectional path between two ports |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 405 | * @tb: Pointer to the domain structure |
| 406 | * @name: Name of the path (used for debugging) |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 407 | * @ingress_shared_buffer: Shared buffering used for ingress ports on the path |
| 408 | * @egress_shared_buffer: Shared buffering used for egress ports on the path |
| 409 | * @ingress_fc_enable: Flow control for ingress ports on the path |
| 410 | * @egress_fc_enable: Flow control for egress ports on the path |
| 411 | * @priority: Priority group if the path |
| 412 | * @weight: Weight of the path inside the priority group |
| 413 | * @drop_packages: Drop packages from queue tail or head |
| 414 | * @activated: Is the path active |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 415 | * @clear_fc: Clear all flow control from the path config space entries |
| 416 | * when deactivating this path |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 417 | * @hops: Path hops |
| 418 | * @path_length: How many hops the path uses |
Mika Westerberg | 43bddb2 | 2021-11-14 17:20:59 +0200 | [diff] [blame] | 419 | * @alloc_hopid: Does this path consume port HopID |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 420 | * |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 421 | * A path consists of a number of hops (see &struct tb_path_hop). To |
| 422 | * establish a PCIe tunnel two paths have to be created between the two |
| 423 | * PCIe ports. |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 424 | */ |
| 425 | struct tb_path { |
| 426 | struct tb *tb; |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 427 | const char *name; |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 428 | enum tb_path_port ingress_shared_buffer; |
| 429 | enum tb_path_port egress_shared_buffer; |
| 430 | enum tb_path_port ingress_fc_enable; |
| 431 | enum tb_path_port egress_fc_enable; |
| 432 | |
Nathan Chancellor | 3720978 | 2019-04-24 11:34:13 -0700 | [diff] [blame] | 433 | unsigned int priority:3; |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 434 | int weight:4; |
| 435 | bool drop_packages; |
| 436 | bool activated; |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 437 | bool clear_fc; |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 438 | struct tb_path_hop *hops; |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 439 | int path_length; |
Mika Westerberg | 43bddb2 | 2021-11-14 17:20:59 +0200 | [diff] [blame] | 440 | bool alloc_hopid; |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 441 | }; |
| 442 | |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 443 | /* HopIDs 0-7 are reserved by the Thunderbolt protocol */ |
| 444 | #define TB_PATH_MIN_HOPID 8 |
Mika Westerberg | c738a79 | 2020-05-08 11:47:00 +0300 | [diff] [blame] | 445 | /* |
| 446 | * Support paths from the farthest (depth 6) router to the host and back |
| 447 | * to the same level (not necessarily to the same router). |
| 448 | */ |
| 449 | #define TB_PATH_MAX_HOPS (7 * 2) |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 450 | |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 451 | /* Possible wake types */ |
| 452 | #define TB_WAKE_ON_CONNECT BIT(0) |
| 453 | #define TB_WAKE_ON_DISCONNECT BIT(1) |
| 454 | #define TB_WAKE_ON_USB4 BIT(2) |
| 455 | #define TB_WAKE_ON_USB3 BIT(3) |
| 456 | #define TB_WAKE_ON_PCIE BIT(4) |
Mika Westerberg | 6026b70 | 2021-01-14 16:44:17 +0200 | [diff] [blame] | 457 | #define TB_WAKE_ON_DP BIT(5) |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 458 | |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 459 | /* CL states */ |
| 460 | #define TB_CL0S BIT(0) |
| 461 | #define TB_CL1 BIT(1) |
| 462 | #define TB_CL2 BIT(2) |
| 463 | |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 464 | /** |
| 465 | * struct tb_cm_ops - Connection manager specific operations vector |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 466 | * @driver_ready: Called right after control channel is started. Used by |
| 467 | * ICM to send driver ready message to the firmware. |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 468 | * @start: Starts the domain |
| 469 | * @stop: Stops the domain |
Mika Westerberg | 52a4490 | 2024-01-09 17:57:10 +0200 | [diff] [blame] | 470 | * @deinit: Perform any cleanup after the domain is stopped but before |
| 471 | * it is unregistered. Called without @tb->lock taken. Optional. |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 472 | * @suspend_noirq: Connection manager specific suspend_noirq |
| 473 | * @resume_noirq: Connection manager specific resume_noirq |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 474 | * @suspend: Connection manager specific suspend |
Mika Westerberg | 884e4d5 | 2020-08-31 13:05:14 +0300 | [diff] [blame] | 475 | * @freeze_noirq: Connection manager specific freeze_noirq |
| 476 | * @thaw_noirq: Connection manager specific thaw_noirq |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 477 | * @complete: Connection manager specific complete |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 478 | * @runtime_suspend: Connection manager specific runtime_suspend |
| 479 | * @runtime_resume: Connection manager specific runtime_resume |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 480 | * @runtime_suspend_switch: Runtime suspend a switch |
| 481 | * @runtime_resume_switch: Runtime resume a switch |
Mika Westerberg | 81a54b5 | 2017-06-06 15:25:09 +0300 | [diff] [blame] | 482 | * @handle_event: Handle thunderbolt event |
Mika Westerberg | 9aaa3b8 | 2018-01-21 12:08:04 +0200 | [diff] [blame] | 483 | * @get_boot_acl: Get boot ACL list |
| 484 | * @set_boot_acl: Set boot ACL list |
Mika Westerberg | 3da88be | 2020-11-10 11:47:14 +0300 | [diff] [blame] | 485 | * @disapprove_switch: Disapprove switch (disconnect PCIe tunnel) |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 486 | * @approve_switch: Approve switch |
| 487 | * @add_switch_key: Add key to switch |
| 488 | * @challenge_switch_key: Challenge switch using key |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 489 | * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 490 | * @approve_xdomain_paths: Approve (establish) XDomain DMA paths |
| 491 | * @disconnect_xdomain_paths: Disconnect XDomain DMA paths |
Mika Westerberg | 9490f71 | 2020-11-03 13:58:00 +0200 | [diff] [blame] | 492 | * @usb4_switch_op: Optional proxy for USB4 router operations. If set |
| 493 | * this will be called whenever USB4 router operation is |
| 494 | * performed. If this returns %-EOPNOTSUPP then the |
| 495 | * native USB4 router operation is called. |
| 496 | * @usb4_switch_nvm_authenticate_status: Optional callback that the CM |
| 497 | * implementation can be used to |
| 498 | * return status of USB4 NVM_AUTH |
| 499 | * router operation. |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 500 | */ |
| 501 | struct tb_cm_ops { |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 502 | int (*driver_ready)(struct tb *tb); |
Sanath S | 59a54c5 | 2024-01-13 11:52:48 +0200 | [diff] [blame] | 503 | int (*start)(struct tb *tb, bool reset); |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 504 | void (*stop)(struct tb *tb); |
Mika Westerberg | 52a4490 | 2024-01-09 17:57:10 +0200 | [diff] [blame] | 505 | void (*deinit)(struct tb *tb); |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 506 | int (*suspend_noirq)(struct tb *tb); |
| 507 | int (*resume_noirq)(struct tb *tb); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 508 | int (*suspend)(struct tb *tb); |
Mika Westerberg | 884e4d5 | 2020-08-31 13:05:14 +0300 | [diff] [blame] | 509 | int (*freeze_noirq)(struct tb *tb); |
| 510 | int (*thaw_noirq)(struct tb *tb); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 511 | void (*complete)(struct tb *tb); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 512 | int (*runtime_suspend)(struct tb *tb); |
| 513 | int (*runtime_resume)(struct tb *tb); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 514 | int (*runtime_suspend_switch)(struct tb_switch *sw); |
| 515 | int (*runtime_resume_switch)(struct tb_switch *sw); |
Mika Westerberg | 81a54b5 | 2017-06-06 15:25:09 +0300 | [diff] [blame] | 516 | void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type, |
| 517 | const void *buf, size_t size); |
Mika Westerberg | 9aaa3b8 | 2018-01-21 12:08:04 +0200 | [diff] [blame] | 518 | int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids); |
| 519 | int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids); |
Mika Westerberg | 3da88be | 2020-11-10 11:47:14 +0300 | [diff] [blame] | 520 | int (*disapprove_switch)(struct tb *tb, struct tb_switch *sw); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 521 | int (*approve_switch)(struct tb *tb, struct tb_switch *sw); |
| 522 | int (*add_switch_key)(struct tb *tb, struct tb_switch *sw); |
| 523 | int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw, |
| 524 | const u8 *challenge, u8 *response); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 525 | int (*disconnect_pcie_paths)(struct tb *tb); |
Mika Westerberg | 180b068 | 2021-01-08 16:25:39 +0200 | [diff] [blame] | 526 | int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd, |
| 527 | int transmit_path, int transmit_ring, |
| 528 | int receive_path, int receive_ring); |
| 529 | int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd, |
| 530 | int transmit_path, int transmit_ring, |
| 531 | int receive_path, int receive_ring); |
Mika Westerberg | 9490f71 | 2020-11-03 13:58:00 +0200 | [diff] [blame] | 532 | int (*usb4_switch_op)(struct tb_switch *sw, u16 opcode, u32 *metadata, |
| 533 | u8 *status, const void *tx_data, size_t tx_data_len, |
| 534 | void *rx_data, size_t rx_data_len); |
| 535 | int (*usb4_switch_nvm_authenticate_status)(struct tb_switch *sw, |
| 536 | u32 *status); |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 537 | }; |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 538 | |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 539 | static inline void *tb_priv(struct tb *tb) |
| 540 | { |
| 541 | return (void *)tb->privdata; |
| 542 | } |
| 543 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 544 | #define TB_AUTOSUSPEND_DELAY 15000 /* ms */ |
| 545 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 546 | /* helper functions & macros */ |
| 547 | |
| 548 | /** |
| 549 | * tb_upstream_port() - return the upstream port of a switch |
| 550 | * |
| 551 | * Every switch has an upstream port (for the root switch it is the NHI). |
| 552 | * |
| 553 | * During switch alloc/init tb_upstream_port()->remote may be NULL, even for |
| 554 | * non root switches (on the NHI port remote is always NULL). |
| 555 | * |
| 556 | * Return: Returns the upstream port of the switch. |
| 557 | */ |
| 558 | static inline struct tb_port *tb_upstream_port(struct tb_switch *sw) |
| 559 | { |
| 560 | return &sw->ports[sw->config.upstream_port_number]; |
| 561 | } |
| 562 | |
Mika Westerberg | dfe40ca | 2019-03-07 15:26:45 +0200 | [diff] [blame] | 563 | /** |
| 564 | * tb_is_upstream_port() - Is the port upstream facing |
| 565 | * @port: Port to check |
| 566 | * |
| 567 | * Returns true if @port is upstream facing port. In case of dual link |
| 568 | * ports both return true. |
| 569 | */ |
| 570 | static inline bool tb_is_upstream_port(const struct tb_port *port) |
| 571 | { |
| 572 | const struct tb_port *upstream_port = tb_upstream_port(port->sw); |
| 573 | return port == upstream_port || port->dual_link_port == upstream_port; |
| 574 | } |
| 575 | |
Mika Westerberg | b323a98 | 2019-03-06 19:23:38 +0200 | [diff] [blame] | 576 | static inline u64 tb_route(const struct tb_switch *sw) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 577 | { |
| 578 | return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo; |
| 579 | } |
| 580 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 581 | static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw) |
| 582 | { |
| 583 | u8 port; |
| 584 | |
| 585 | port = route >> (sw->config.depth * 8); |
| 586 | if (WARN_ON(port > sw->config.max_port_number)) |
| 587 | return NULL; |
| 588 | return &sw->ports[port]; |
| 589 | } |
| 590 | |
Gil Fine | 30c6759 | 2023-11-05 17:52:19 +0200 | [diff] [blame] | 591 | static inline const char *tb_width_name(enum tb_link_width width) |
| 592 | { |
| 593 | switch (width) { |
| 594 | case TB_LINK_WIDTH_SINGLE: |
| 595 | return "symmetric, single lane"; |
| 596 | case TB_LINK_WIDTH_DUAL: |
| 597 | return "symmetric, dual lanes"; |
| 598 | case TB_LINK_WIDTH_ASYM_TX: |
| 599 | return "asymmetric, 3 transmitters, 1 receiver"; |
| 600 | case TB_LINK_WIDTH_ASYM_RX: |
| 601 | return "asymmetric, 3 receivers, 1 transmitter"; |
| 602 | default: |
| 603 | return "unknown"; |
| 604 | } |
| 605 | } |
| 606 | |
Mika Westerberg | dfe40ca | 2019-03-07 15:26:45 +0200 | [diff] [blame] | 607 | /** |
| 608 | * tb_port_has_remote() - Does the port have switch connected downstream |
| 609 | * @port: Port to check |
| 610 | * |
| 611 | * Returns true only when the port is primary port and has remote set. |
| 612 | */ |
| 613 | static inline bool tb_port_has_remote(const struct tb_port *port) |
| 614 | { |
| 615 | if (tb_is_upstream_port(port)) |
| 616 | return false; |
| 617 | if (!port->remote) |
| 618 | return false; |
| 619 | if (port->dual_link_port && port->link_nr) |
| 620 | return false; |
| 621 | |
| 622 | return true; |
| 623 | } |
| 624 | |
Mika Westerberg | 344e064 | 2017-10-11 17:19:54 +0300 | [diff] [blame] | 625 | static inline bool tb_port_is_null(const struct tb_port *port) |
| 626 | { |
| 627 | return port && port->port && port->config.type == TB_TYPE_PORT; |
| 628 | } |
| 629 | |
Mika Westerberg | a3cfebd | 2020-07-25 10:32:46 +0300 | [diff] [blame] | 630 | static inline bool tb_port_is_nhi(const struct tb_port *port) |
| 631 | { |
| 632 | return port && port->config.type == TB_TYPE_NHI; |
| 633 | } |
| 634 | |
Mika Westerberg | 99cabbb | 2018-12-30 21:34:08 +0200 | [diff] [blame] | 635 | static inline bool tb_port_is_pcie_down(const struct tb_port *port) |
| 636 | { |
| 637 | return port && port->config.type == TB_TYPE_PCIE_DOWN; |
| 638 | } |
| 639 | |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 640 | static inline bool tb_port_is_pcie_up(const struct tb_port *port) |
| 641 | { |
| 642 | return port && port->config.type == TB_TYPE_PCIE_UP; |
| 643 | } |
| 644 | |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 645 | static inline bool tb_port_is_dpin(const struct tb_port *port) |
| 646 | { |
| 647 | return port && port->config.type == TB_TYPE_DP_HDMI_IN; |
| 648 | } |
| 649 | |
| 650 | static inline bool tb_port_is_dpout(const struct tb_port *port) |
| 651 | { |
| 652 | return port && port->config.type == TB_TYPE_DP_HDMI_OUT; |
| 653 | } |
| 654 | |
Rajmohan Mani | e6f8185 | 2019-12-17 15:33:44 +0300 | [diff] [blame] | 655 | static inline bool tb_port_is_usb3_down(const struct tb_port *port) |
| 656 | { |
| 657 | return port && port->config.type == TB_TYPE_USB3_DOWN; |
| 658 | } |
| 659 | |
| 660 | static inline bool tb_port_is_usb3_up(const struct tb_port *port) |
| 661 | { |
| 662 | return port && port->config.type == TB_TYPE_USB3_UP; |
| 663 | } |
| 664 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 665 | static inline int tb_sw_read(struct tb_switch *sw, void *buffer, |
| 666 | enum tb_cfg_space space, u32 offset, u32 length) |
| 667 | { |
Mika Westerberg | 4708384 | 2019-03-19 17:07:37 +0200 | [diff] [blame] | 668 | if (sw->is_unplugged) |
| 669 | return -ENODEV; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 670 | return tb_cfg_read(sw->tb->ctl, |
| 671 | buffer, |
| 672 | tb_route(sw), |
| 673 | 0, |
| 674 | space, |
| 675 | offset, |
| 676 | length); |
| 677 | } |
| 678 | |
Mika Westerberg | 826c6a1 | 2019-07-01 18:41:51 +0300 | [diff] [blame] | 679 | static inline int tb_sw_write(struct tb_switch *sw, const void *buffer, |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 680 | enum tb_cfg_space space, u32 offset, u32 length) |
| 681 | { |
Mika Westerberg | 4708384 | 2019-03-19 17:07:37 +0200 | [diff] [blame] | 682 | if (sw->is_unplugged) |
| 683 | return -ENODEV; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 684 | return tb_cfg_write(sw->tb->ctl, |
| 685 | buffer, |
| 686 | tb_route(sw), |
| 687 | 0, |
| 688 | space, |
| 689 | offset, |
| 690 | length); |
| 691 | } |
| 692 | |
| 693 | static inline int tb_port_read(struct tb_port *port, void *buffer, |
| 694 | enum tb_cfg_space space, u32 offset, u32 length) |
| 695 | { |
Mika Westerberg | 4708384 | 2019-03-19 17:07:37 +0200 | [diff] [blame] | 696 | if (port->sw->is_unplugged) |
| 697 | return -ENODEV; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 698 | return tb_cfg_read(port->sw->tb->ctl, |
| 699 | buffer, |
| 700 | tb_route(port->sw), |
| 701 | port->port, |
| 702 | space, |
| 703 | offset, |
| 704 | length); |
| 705 | } |
| 706 | |
Mika Westerberg | 16a1258 | 2017-06-06 15:24:53 +0300 | [diff] [blame] | 707 | static inline int tb_port_write(struct tb_port *port, const void *buffer, |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 708 | enum tb_cfg_space space, u32 offset, u32 length) |
| 709 | { |
Mika Westerberg | 4708384 | 2019-03-19 17:07:37 +0200 | [diff] [blame] | 710 | if (port->sw->is_unplugged) |
| 711 | return -ENODEV; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 712 | return tb_cfg_write(port->sw->tb->ctl, |
| 713 | buffer, |
| 714 | tb_route(port->sw), |
| 715 | port->port, |
| 716 | space, |
| 717 | offset, |
| 718 | length); |
| 719 | } |
| 720 | |
| 721 | #define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg) |
| 722 | #define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg) |
| 723 | #define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg) |
| 724 | #define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg) |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 725 | #define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 726 | |
| 727 | #define __TB_SW_PRINT(level, sw, fmt, arg...) \ |
| 728 | do { \ |
Mika Westerberg | b323a98 | 2019-03-06 19:23:38 +0200 | [diff] [blame] | 729 | const struct tb_switch *__sw = (sw); \ |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 730 | level(__sw->tb, "%llx: " fmt, \ |
| 731 | tb_route(__sw), ## arg); \ |
| 732 | } while (0) |
| 733 | #define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg) |
| 734 | #define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg) |
| 735 | #define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg) |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 736 | #define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 737 | |
| 738 | #define __TB_PORT_PRINT(level, _port, fmt, arg...) \ |
| 739 | do { \ |
Mika Westerberg | b323a98 | 2019-03-06 19:23:38 +0200 | [diff] [blame] | 740 | const struct tb_port *__port = (_port); \ |
Mika Westerberg | ebe99c0 | 2022-04-01 13:36:47 +0300 | [diff] [blame] | 741 | level(__port->sw->tb, "%llx:%u: " fmt, \ |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 742 | tb_route(__port->sw), __port->port, ## arg); \ |
| 743 | } while (0) |
| 744 | #define tb_port_WARN(port, fmt, arg...) \ |
| 745 | __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg) |
| 746 | #define tb_port_warn(port, fmt, arg...) \ |
| 747 | __TB_PORT_PRINT(tb_warn, port, fmt, ##arg) |
| 748 | #define tb_port_info(port, fmt, arg...) \ |
| 749 | __TB_PORT_PRINT(tb_info, port, fmt, ##arg) |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 750 | #define tb_port_dbg(port, fmt, arg...) \ |
| 751 | __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 752 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 753 | struct tb *icm_probe(struct tb_nhi *nhi); |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 754 | struct tb *tb_probe(struct tb_nhi *nhi); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 755 | |
Ricardo B. Marliere | b8a7308 | 2024-02-19 09:45:50 -0300 | [diff] [blame] | 756 | extern const struct device_type tb_domain_type; |
| 757 | extern const struct device_type tb_retimer_type; |
| 758 | extern const struct device_type tb_switch_type; |
| 759 | extern const struct device_type usb4_port_device_type; |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 760 | |
| 761 | int tb_domain_init(void); |
| 762 | void tb_domain_exit(void); |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 763 | int tb_xdomain_init(void); |
| 764 | void tb_xdomain_exit(void); |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 765 | |
Mika Westerberg | 7f0a34d | 2020-12-29 13:44:57 +0200 | [diff] [blame] | 766 | struct tb *tb_domain_alloc(struct tb_nhi *nhi, int timeout_msec, size_t privsize); |
Sanath S | 59a54c5 | 2024-01-13 11:52:48 +0200 | [diff] [blame] | 767 | int tb_domain_add(struct tb *tb, bool reset); |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 768 | void tb_domain_remove(struct tb *tb); |
| 769 | int tb_domain_suspend_noirq(struct tb *tb); |
| 770 | int tb_domain_resume_noirq(struct tb *tb); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 771 | int tb_domain_suspend(struct tb *tb); |
Mika Westerberg | 884e4d5 | 2020-08-31 13:05:14 +0300 | [diff] [blame] | 772 | int tb_domain_freeze_noirq(struct tb *tb); |
| 773 | int tb_domain_thaw_noirq(struct tb *tb); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 774 | void tb_domain_complete(struct tb *tb); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 775 | int tb_domain_runtime_suspend(struct tb *tb); |
| 776 | int tb_domain_runtime_resume(struct tb *tb); |
Mika Westerberg | 3da88be | 2020-11-10 11:47:14 +0300 | [diff] [blame] | 777 | int tb_domain_disapprove_switch(struct tb *tb, struct tb_switch *sw); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 778 | int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw); |
| 779 | int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw); |
| 780 | int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 781 | int tb_domain_disconnect_pcie_paths(struct tb *tb); |
Mika Westerberg | 180b068 | 2021-01-08 16:25:39 +0200 | [diff] [blame] | 782 | int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd, |
| 783 | int transmit_path, int transmit_ring, |
| 784 | int receive_path, int receive_ring); |
| 785 | int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd, |
| 786 | int transmit_path, int transmit_ring, |
| 787 | int receive_path, int receive_ring); |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 788 | int tb_domain_disconnect_all_paths(struct tb *tb); |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 789 | |
Mika Westerberg | 559c1e1 | 2018-10-22 14:47:01 +0300 | [diff] [blame] | 790 | static inline struct tb *tb_domain_get(struct tb *tb) |
| 791 | { |
| 792 | if (tb) |
| 793 | get_device(&tb->dev); |
| 794 | return tb; |
| 795 | } |
| 796 | |
Mika Westerberg | 9d3cce0 | 2017-06-06 15:25:00 +0300 | [diff] [blame] | 797 | static inline void tb_domain_put(struct tb *tb) |
| 798 | { |
| 799 | put_device(&tb->dev); |
| 800 | } |
Andreas Noever | d6cc51c | 2014-06-03 22:04:00 +0200 | [diff] [blame] | 801 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 802 | struct tb_nvm *tb_nvm_alloc(struct device *dev); |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 803 | int tb_nvm_read_version(struct tb_nvm *nvm); |
| 804 | int tb_nvm_validate(struct tb_nvm *nvm); |
| 805 | int tb_nvm_write_headers(struct tb_nvm *nvm); |
| 806 | int tb_nvm_add_active(struct tb_nvm *nvm, nvmem_reg_read_t reg_read); |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 807 | int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val, |
| 808 | size_t bytes); |
Szuying Chen | aef9c69 | 2022-09-02 17:40:08 +0800 | [diff] [blame] | 809 | int tb_nvm_add_non_active(struct tb_nvm *nvm, nvmem_reg_write_t reg_write); |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 810 | void tb_nvm_free(struct tb_nvm *nvm); |
| 811 | void tb_nvm_exit(void); |
| 812 | |
Mika Westerberg | 9b38303 | 2021-04-01 16:54:15 +0300 | [diff] [blame] | 813 | typedef int (*read_block_fn)(void *, unsigned int, void *, size_t); |
| 814 | typedef int (*write_block_fn)(void *, unsigned int, const void *, size_t); |
| 815 | |
| 816 | int tb_nvm_read_data(unsigned int address, void *buf, size_t size, |
| 817 | unsigned int retries, read_block_fn read_block, |
| 818 | void *read_block_data); |
| 819 | int tb_nvm_write_data(unsigned int address, const void *buf, size_t size, |
| 820 | unsigned int retries, write_block_fn write_next_block, |
| 821 | void *write_block_data); |
| 822 | |
Szuying Chen | 7bfafaa | 2022-09-03 10:39:18 +0300 | [diff] [blame] | 823 | int tb_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf, |
| 824 | size_t size); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 825 | struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent, |
| 826 | u64 route); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 827 | struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb, |
| 828 | struct device *parent, u64 route); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 829 | int tb_switch_configure(struct tb_switch *sw); |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 830 | int tb_switch_configuration_valid(struct tb_switch *sw); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 831 | int tb_switch_add(struct tb_switch *sw); |
| 832 | void tb_switch_remove(struct tb_switch *sw); |
Mika Westerberg | 6ac6fae | 2020-06-05 14:25:02 +0300 | [diff] [blame] | 833 | void tb_switch_suspend(struct tb_switch *sw, bool runtime); |
Gil Fine | dcd12ac | 2024-03-01 15:11:18 +0200 | [diff] [blame] | 834 | int tb_switch_resume(struct tb_switch *sw, bool runtime); |
Mika Westerberg | 356b6c4 | 2019-09-19 15:25:30 +0300 | [diff] [blame] | 835 | int tb_switch_reset(struct tb_switch *sw); |
Gil Fine | 1639664 | 2021-12-17 03:16:40 +0200 | [diff] [blame] | 836 | int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit, |
| 837 | u32 value, int timeout_msec); |
Lukas Wunner | aae20bb | 2016-03-20 13:57:20 +0100 | [diff] [blame] | 838 | void tb_sw_set_unplugged(struct tb_switch *sw); |
Mika Westerberg | 386e5e2 | 2019-12-17 15:33:37 +0300 | [diff] [blame] | 839 | struct tb_port *tb_switch_find_port(struct tb_switch *sw, |
| 840 | enum tb_port_type type); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 841 | struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link, |
| 842 | u8 depth); |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 843 | struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid); |
Radion Mirchevsky | 8e9267b | 2017-10-04 15:24:14 +0300 | [diff] [blame] | 844 | struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 845 | |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 846 | /** |
| 847 | * tb_switch_for_each_port() - Iterate over each switch port |
| 848 | * @sw: Switch whose ports to iterate |
| 849 | * @p: Port used as iterator |
| 850 | * |
| 851 | * Iterates over each switch port skipping the control port (port %0). |
| 852 | */ |
| 853 | #define tb_switch_for_each_port(sw, p) \ |
| 854 | for ((p) = &(sw)->ports[1]; \ |
| 855 | (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++) |
| 856 | |
Mika Westerberg | b6b0ea7 | 2017-10-04 15:19:20 +0300 | [diff] [blame] | 857 | static inline struct tb_switch *tb_switch_get(struct tb_switch *sw) |
| 858 | { |
| 859 | if (sw) |
| 860 | get_device(&sw->dev); |
| 861 | return sw; |
| 862 | } |
| 863 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 864 | static inline void tb_switch_put(struct tb_switch *sw) |
| 865 | { |
| 866 | put_device(&sw->dev); |
| 867 | } |
| 868 | |
| 869 | static inline bool tb_is_switch(const struct device *dev) |
| 870 | { |
| 871 | return dev->type == &tb_switch_type; |
| 872 | } |
| 873 | |
Greg Kroah-Hartman | 162736b | 2023-01-11 12:30:07 +0100 | [diff] [blame] | 874 | static inline struct tb_switch *tb_to_switch(const struct device *dev) |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 875 | { |
| 876 | if (tb_is_switch(dev)) |
| 877 | return container_of(dev, struct tb_switch, dev); |
| 878 | return NULL; |
| 879 | } |
| 880 | |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 881 | static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw) |
| 882 | { |
| 883 | return tb_to_switch(sw->dev.parent); |
| 884 | } |
| 885 | |
Gil Fine | 7ce5422 | 2022-09-23 01:30:38 +0300 | [diff] [blame] | 886 | /** |
| 887 | * tb_switch_downstream_port() - Return downstream facing port of parent router |
| 888 | * @sw: Device router pointer |
| 889 | * |
| 890 | * Only call for device routers. Returns the downstream facing port of |
| 891 | * the parent router. |
| 892 | */ |
| 893 | static inline struct tb_port *tb_switch_downstream_port(struct tb_switch *sw) |
| 894 | { |
| 895 | if (WARN_ON(!tb_route(sw))) |
| 896 | return NULL; |
| 897 | return tb_port_at(tb_route(sw), tb_switch_parent(sw)); |
| 898 | } |
| 899 | |
Mika Westerberg | c4ff144 | 2023-09-04 09:09:34 +0300 | [diff] [blame] | 900 | /** |
| 901 | * tb_switch_depth() - Returns depth of the connected router |
| 902 | * @sw: Router |
| 903 | */ |
| 904 | static inline int tb_switch_depth(const struct tb_switch *sw) |
| 905 | { |
| 906 | return sw->config.depth; |
| 907 | } |
| 908 | |
Mika Westerberg | 17a8f81 | 2019-10-08 16:42:47 +0300 | [diff] [blame] | 909 | static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw) |
Mika Westerberg | 8b0110d | 2019-01-08 18:55:09 +0200 | [diff] [blame] | 910 | { |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 911 | return sw->config.vendor_id == PCI_VENDOR_ID_INTEL && |
| 912 | sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE; |
Mika Westerberg | 8b0110d | 2019-01-08 18:55:09 +0200 | [diff] [blame] | 913 | } |
| 914 | |
Mika Westerberg | 17a8f81 | 2019-10-08 16:42:47 +0300 | [diff] [blame] | 915 | static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw) |
Mika Westerberg | 8b0110d | 2019-01-08 18:55:09 +0200 | [diff] [blame] | 916 | { |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 917 | return sw->config.vendor_id == PCI_VENDOR_ID_INTEL && |
| 918 | sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE; |
Mika Westerberg | 8b0110d | 2019-01-08 18:55:09 +0200 | [diff] [blame] | 919 | } |
| 920 | |
Mika Westerberg | 17a8f81 | 2019-10-08 16:42:47 +0300 | [diff] [blame] | 921 | static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw) |
Mika Westerberg | 99cabbb | 2018-12-30 21:34:08 +0200 | [diff] [blame] | 922 | { |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 923 | if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) { |
| 924 | switch (sw->config.device_id) { |
| 925 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: |
| 926 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: |
| 927 | return true; |
| 928 | } |
Mika Westerberg | 99cabbb | 2018-12-30 21:34:08 +0200 | [diff] [blame] | 929 | } |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 930 | return false; |
Mika Westerberg | 99cabbb | 2018-12-30 21:34:08 +0200 | [diff] [blame] | 931 | } |
| 932 | |
Mika Westerberg | 17a8f81 | 2019-10-08 16:42:47 +0300 | [diff] [blame] | 933 | static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw) |
Mika Westerberg | 99cabbb | 2018-12-30 21:34:08 +0200 | [diff] [blame] | 934 | { |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 935 | if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) { |
| 936 | switch (sw->config.device_id) { |
| 937 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: |
| 938 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: |
| 939 | return true; |
| 940 | } |
Mika Westerberg | 99cabbb | 2018-12-30 21:34:08 +0200 | [diff] [blame] | 941 | } |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 942 | return false; |
Mika Westerberg | 99cabbb | 2018-12-30 21:34:08 +0200 | [diff] [blame] | 943 | } |
| 944 | |
Mika Westerberg | 7bffd97e | 2019-03-22 15:16:53 +0200 | [diff] [blame] | 945 | static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw) |
| 946 | { |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 947 | if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) { |
| 948 | switch (sw->config.device_id) { |
| 949 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: |
Mika Westerberg | f1d5ec3 | 2022-01-07 12:59:01 +0200 | [diff] [blame] | 950 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE: |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 951 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: |
| 952 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: |
| 953 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: |
| 954 | return true; |
| 955 | } |
Mika Westerberg | 7bffd97e | 2019-03-22 15:16:53 +0200 | [diff] [blame] | 956 | } |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 957 | return false; |
Mika Westerberg | 7bffd97e | 2019-03-22 15:16:53 +0200 | [diff] [blame] | 958 | } |
| 959 | |
| 960 | static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw) |
| 961 | { |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 962 | if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) { |
| 963 | switch (sw->config.device_id) { |
| 964 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: |
| 965 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: |
| 966 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: |
| 967 | return true; |
| 968 | } |
Mika Westerberg | 7bffd97e | 2019-03-22 15:16:53 +0200 | [diff] [blame] | 969 | } |
Mika Westerberg | 35ee69e | 2020-07-25 10:40:47 +0300 | [diff] [blame] | 970 | return false; |
Mika Westerberg | 7bffd97e | 2019-03-22 15:16:53 +0200 | [diff] [blame] | 971 | } |
| 972 | |
Gil Fine | 8a90e4f | 2021-12-17 03:16:39 +0200 | [diff] [blame] | 973 | static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw) |
| 974 | { |
| 975 | if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) { |
| 976 | switch (sw->config.device_id) { |
| 977 | case PCI_DEVICE_ID_INTEL_TGL_NHI0: |
| 978 | case PCI_DEVICE_ID_INTEL_TGL_NHI1: |
| 979 | case PCI_DEVICE_ID_INTEL_TGL_H_NHI0: |
| 980 | case PCI_DEVICE_ID_INTEL_TGL_H_NHI1: |
| 981 | return true; |
| 982 | } |
| 983 | } |
| 984 | return false; |
| 985 | } |
| 986 | |
Mika Westerberg | f07a360 | 2019-06-25 15:10:01 +0300 | [diff] [blame] | 987 | /** |
| 988 | * tb_switch_is_icm() - Is the switch handled by ICM firmware |
| 989 | * @sw: Switch to check |
| 990 | * |
| 991 | * In case there is a need to differentiate whether ICM firmware or SW CM |
| 992 | * is handling @sw this function can be called. It is valid to call this |
| 993 | * after tb_switch_alloc() and tb_switch_configure() has been called |
| 994 | * (latter only for SW CM case). |
| 995 | */ |
| 996 | static inline bool tb_switch_is_icm(const struct tb_switch *sw) |
| 997 | { |
| 998 | return !sw->config.enabled; |
| 999 | } |
| 1000 | |
Gil Fine | 81af295 | 2023-08-10 22:37:15 +0300 | [diff] [blame] | 1001 | int tb_switch_set_link_width(struct tb_switch *sw, enum tb_link_width width); |
Mika Westerberg | de46203 | 2020-04-02 14:50:52 +0300 | [diff] [blame] | 1002 | int tb_switch_configure_link(struct tb_switch *sw); |
| 1003 | void tb_switch_unconfigure_link(struct tb_switch *sw); |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1004 | |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 1005 | bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in); |
| 1006 | int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in); |
| 1007 | void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in); |
| 1008 | |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 1009 | int tb_switch_tmu_init(struct tb_switch *sw); |
| 1010 | int tb_switch_tmu_post_time(struct tb_switch *sw); |
| 1011 | int tb_switch_tmu_disable(struct tb_switch *sw); |
| 1012 | int tb_switch_tmu_enable(struct tb_switch *sw); |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 1013 | int tb_switch_tmu_configure(struct tb_switch *sw, enum tb_switch_tmu_mode mode); |
| 1014 | |
| 1015 | /** |
| 1016 | * tb_switch_tmu_is_configured() - Is given TMU mode configured |
| 1017 | * @sw: Router whose mode to check |
| 1018 | * @mode: Mode to check |
| 1019 | * |
| 1020 | * Checks if given router TMU mode is configured to @mode. Note the |
| 1021 | * router TMU might not be enabled to this mode. |
| 1022 | */ |
| 1023 | static inline bool tb_switch_tmu_is_configured(const struct tb_switch *sw, |
| 1024 | enum tb_switch_tmu_mode mode) |
| 1025 | { |
| 1026 | return sw->tmu.mode_request == mode; |
| 1027 | } |
| 1028 | |
Gil Fine | a28ec0e | 2021-12-17 03:16:38 +0200 | [diff] [blame] | 1029 | /** |
Gil Fine | b017a46 | 2022-05-26 13:59:20 +0300 | [diff] [blame] | 1030 | * tb_switch_tmu_is_enabled() - Checks if the specified TMU mode is enabled |
Gil Fine | a28ec0e | 2021-12-17 03:16:38 +0200 | [diff] [blame] | 1031 | * @sw: Router whose TMU mode to check |
Gil Fine | a28ec0e | 2021-12-17 03:16:38 +0200 | [diff] [blame] | 1032 | * |
Mika Westerberg | 826f55d | 2022-10-07 13:19:09 +0300 | [diff] [blame] | 1033 | * Return true if hardware TMU configuration matches the requested |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 1034 | * configuration (and is not %TB_SWITCH_TMU_MODE_OFF). |
Gil Fine | a28ec0e | 2021-12-17 03:16:38 +0200 | [diff] [blame] | 1035 | */ |
Mika Westerberg | 826f55d | 2022-10-07 13:19:09 +0300 | [diff] [blame] | 1036 | static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw) |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 1037 | { |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 1038 | return sw->tmu.mode != TB_SWITCH_TMU_MODE_OFF && |
| 1039 | sw->tmu.mode == sw->tmu.mode_request; |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 1040 | } |
| 1041 | |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 1042 | bool tb_port_clx_is_enabled(struct tb_port *port, unsigned int clx); |
Mika Westerberg | 12a14f2 | 2022-10-07 18:12:02 +0300 | [diff] [blame] | 1043 | |
Mika Westerberg | 768e6fe | 2023-05-24 13:33:57 +0300 | [diff] [blame] | 1044 | int tb_switch_clx_init(struct tb_switch *sw); |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 1045 | int tb_switch_clx_enable(struct tb_switch *sw, unsigned int clx); |
| 1046 | int tb_switch_clx_disable(struct tb_switch *sw); |
Gil Fine | 8a90e4f | 2021-12-17 03:16:39 +0200 | [diff] [blame] | 1047 | |
| 1048 | /** |
Mika Westerberg | 12a14f2 | 2022-10-07 18:12:02 +0300 | [diff] [blame] | 1049 | * tb_switch_clx_is_enabled() - Checks if the CLx is enabled |
Gil Fine | b017a46 | 2022-05-26 13:59:20 +0300 | [diff] [blame] | 1050 | * @sw: Router to check for the CLx |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 1051 | * @clx: The CLx states to check for |
Gil Fine | 8a90e4f | 2021-12-17 03:16:39 +0200 | [diff] [blame] | 1052 | * |
Gil Fine | b017a46 | 2022-05-26 13:59:20 +0300 | [diff] [blame] | 1053 | * Checks if the specified CLx is enabled on the router upstream link. |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 1054 | * Returns true if any of the given states is enabled. |
| 1055 | * |
Gil Fine | 8a90e4f | 2021-12-17 03:16:39 +0200 | [diff] [blame] | 1056 | * Not applicable for a host router. |
| 1057 | */ |
Mika Westerberg | 12a14f2 | 2022-10-07 18:12:02 +0300 | [diff] [blame] | 1058 | static inline bool tb_switch_clx_is_enabled(const struct tb_switch *sw, |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 1059 | unsigned int clx) |
Gil Fine | 8a90e4f | 2021-12-17 03:16:39 +0200 | [diff] [blame] | 1060 | { |
Mika Westerberg | 3562735 | 2022-10-10 13:36:56 +0300 | [diff] [blame] | 1061 | return sw->clx & clx; |
Gil Fine | 43f977b | 2021-12-17 03:16:43 +0200 | [diff] [blame] | 1062 | } |
| 1063 | |
Gil Fine | 43f977b | 2021-12-17 03:16:43 +0200 | [diff] [blame] | 1064 | int tb_switch_pcie_l1_enable(struct tb_switch *sw); |
| 1065 | |
Mika Westerberg | 30a4eca | 2022-01-07 13:00:47 +0200 | [diff] [blame] | 1066 | int tb_switch_xhci_connect(struct tb_switch *sw); |
| 1067 | void tb_switch_xhci_disconnect(struct tb_switch *sw); |
| 1068 | |
Mika Westerberg | 94581b2 | 2022-02-13 11:45:39 +0200 | [diff] [blame] | 1069 | int tb_port_state(struct tb_port *port); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 1070 | int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged); |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 1071 | int tb_port_add_nfc_credits(struct tb_port *port, int credits); |
| 1072 | int tb_port_clear_counter(struct tb_port *port, int counter); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1073 | int tb_port_unlock(struct tb_port *port); |
Mika Westerberg | 341d451 | 2020-02-21 12:11:54 +0200 | [diff] [blame] | 1074 | int tb_port_enable(struct tb_port *port); |
| 1075 | int tb_port_disable(struct tb_port *port); |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 1076 | int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid); |
| 1077 | void tb_port_release_in_hopid(struct tb_port *port, int hopid); |
| 1078 | int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid); |
| 1079 | void tb_port_release_out_hopid(struct tb_port *port, int hopid); |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 1080 | struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end, |
| 1081 | struct tb_port *prev); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 1082 | |
Gil Fine | 2bfeca7 | 2023-08-10 22:37:14 +0300 | [diff] [blame] | 1083 | /** |
| 1084 | * tb_port_path_direction_downstream() - Checks if path directed downstream |
| 1085 | * @src: Source adapter |
| 1086 | * @dst: Destination adapter |
| 1087 | * |
| 1088 | * Returns %true only if the specified path from source adapter (@src) |
| 1089 | * to destination adapter (@dst) is directed downstream. |
| 1090 | */ |
| 1091 | static inline bool |
| 1092 | tb_port_path_direction_downstream(const struct tb_port *src, |
| 1093 | const struct tb_port *dst) |
| 1094 | { |
| 1095 | return src->sw->config.depth < dst->sw->config.depth; |
| 1096 | } |
| 1097 | |
Mika Westerberg | 56ad3ae | 2021-03-10 13:34:12 +0200 | [diff] [blame] | 1098 | static inline bool tb_port_use_credit_allocation(const struct tb_port *port) |
| 1099 | { |
| 1100 | return tb_port_is_null(port) && port->sw->credit_allocation; |
| 1101 | } |
| 1102 | |
Mika Westerberg | c64c3f3 | 2020-04-29 17:07:59 +0300 | [diff] [blame] | 1103 | /** |
| 1104 | * tb_for_each_port_on_path() - Iterate over each port on path |
| 1105 | * @src: Source port |
| 1106 | * @dst: Destination port |
| 1107 | * @p: Port used as iterator |
| 1108 | * |
| 1109 | * Walks over each port on path from @src to @dst. |
| 1110 | */ |
| 1111 | #define tb_for_each_port_on_path(src, dst, p) \ |
| 1112 | for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \ |
| 1113 | (p) = tb_next_port_on_path((src), (dst), (p))) |
| 1114 | |
Mika Westerberg | 956c3ab | 2023-09-03 08:25:39 +0300 | [diff] [blame] | 1115 | /** |
| 1116 | * tb_for_each_upstream_port_on_path() - Iterate over each upstreamm port on path |
| 1117 | * @src: Source port |
| 1118 | * @dst: Destination port |
| 1119 | * @p: Port used as iterator |
| 1120 | * |
| 1121 | * Walks over each upstream lane adapter on path from @src to @dst. |
| 1122 | */ |
| 1123 | #define tb_for_each_upstream_port_on_path(src, dst, p) \ |
| 1124 | for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \ |
| 1125 | (p) = tb_next_port_on_path((src), (dst), (p))) \ |
| 1126 | if (!tb_port_is_null((p)) || !tb_is_upstream_port((p))) {\ |
| 1127 | continue; \ |
| 1128 | } else |
| 1129 | |
Mika Westerberg | 5b7b8c0 | 2020-05-08 12:41:34 +0300 | [diff] [blame] | 1130 | int tb_port_get_link_speed(struct tb_port *port); |
Gil Fine | aa673d6 | 2023-07-31 05:25:39 +0300 | [diff] [blame] | 1131 | int tb_port_get_link_generation(struct tb_port *port); |
Isaac Hazan | 4210d50 | 2020-09-24 11:43:58 +0300 | [diff] [blame] | 1132 | int tb_port_get_link_width(struct tb_port *port); |
Gil Fine | 81af295 | 2023-08-10 22:37:15 +0300 | [diff] [blame] | 1133 | bool tb_port_width_supported(struct tb_port *port, unsigned int width); |
Gil Fine | e111fb9 | 2022-09-29 13:00:09 +0300 | [diff] [blame] | 1134 | int tb_port_set_link_width(struct tb_port *port, enum tb_link_width width); |
Isaac Hazan | 5cc0df9 | 2020-09-24 11:44:01 +0300 | [diff] [blame] | 1135 | int tb_port_lane_bonding_enable(struct tb_port *port); |
| 1136 | void tb_port_lane_bonding_disable(struct tb_port *port); |
Gil Fine | 81af295 | 2023-08-10 22:37:15 +0300 | [diff] [blame] | 1137 | int tb_port_wait_for_link_width(struct tb_port *port, unsigned int width, |
Mika Westerberg | e7051be | 2021-03-22 16:54:54 +0200 | [diff] [blame] | 1138 | int timeout_msec); |
Mika Westerberg | 69fea37 | 2021-03-22 17:01:59 +0200 | [diff] [blame] | 1139 | int tb_port_update_credits(struct tb_port *port); |
Mika Westerberg | 5b7b8c0 | 2020-05-08 12:41:34 +0300 | [diff] [blame] | 1140 | |
Mika Westerberg | da2da04 | 2017-06-06 15:24:58 +0300 | [diff] [blame] | 1141 | int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec); |
Rajmohan Mani | aa43a9d | 2019-12-17 15:33:42 +0300 | [diff] [blame] | 1142 | int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap); |
Mika Westerberg | 6de057e | 2020-06-29 20:21:07 +0300 | [diff] [blame] | 1143 | int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset); |
Mika Westerberg | da2da04 | 2017-06-06 15:24:58 +0300 | [diff] [blame] | 1144 | int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap); |
Mika Westerberg | 3c8b228 | 2020-06-29 20:15:17 +0300 | [diff] [blame] | 1145 | int tb_port_next_cap(struct tb_port *port, unsigned int offset); |
Mika Westerberg | e78db6f | 2017-10-12 16:45:50 +0300 | [diff] [blame] | 1146 | bool tb_port_is_enabled(struct tb_port *port); |
Andreas Noever | e2b8785 | 2014-06-03 22:04:03 +0200 | [diff] [blame] | 1147 | |
Rajmohan Mani | e6f8185 | 2019-12-17 15:33:44 +0300 | [diff] [blame] | 1148 | bool tb_usb3_port_is_enabled(struct tb_port *port); |
| 1149 | int tb_usb3_port_enable(struct tb_port *port, bool enable); |
| 1150 | |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 1151 | bool tb_pci_port_is_enabled(struct tb_port *port); |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 1152 | int tb_pci_port_enable(struct tb_port *port, bool enable); |
| 1153 | |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1154 | int tb_dp_port_hpd_is_active(struct tb_port *port); |
| 1155 | int tb_dp_port_hpd_clear(struct tb_port *port); |
| 1156 | int tb_dp_port_set_hops(struct tb_port *port, unsigned int video, |
| 1157 | unsigned int aux_tx, unsigned int aux_rx); |
| 1158 | bool tb_dp_port_is_enabled(struct tb_port *port); |
| 1159 | int tb_dp_port_enable(struct tb_port *port, bool enable); |
| 1160 | |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 1161 | struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid, |
| 1162 | struct tb_port *dst, int dst_hopid, |
Mika Westerberg | 43bddb2 | 2021-11-14 17:20:59 +0200 | [diff] [blame] | 1163 | struct tb_port **last, const char *name, |
| 1164 | bool alloc_hopid); |
Mika Westerberg | 8c7acaaf | 2017-02-19 22:11:41 +0200 | [diff] [blame] | 1165 | struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid, |
| 1166 | struct tb_port *dst, int dst_hopid, int link_nr, |
| 1167 | const char *name); |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 1168 | void tb_path_free(struct tb_path *path); |
| 1169 | int tb_path_activate(struct tb_path *path); |
| 1170 | void tb_path_deactivate(struct tb_path *path); |
Sanath S | b35c1d7 | 2024-01-13 11:42:23 +0200 | [diff] [blame] | 1171 | int tb_path_deactivate_hop(struct tb_port *port, int hop_index); |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 1172 | bool tb_path_is_invalid(struct tb_path *path); |
Mika Westerberg | 0bd680c | 2020-03-24 14:44:13 +0200 | [diff] [blame] | 1173 | bool tb_path_port_on_path(const struct tb_path *path, |
| 1174 | const struct tb_port *port); |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 1175 | |
Mika Westerberg | 6ed541c | 2021-03-22 18:09:35 +0200 | [diff] [blame] | 1176 | /** |
| 1177 | * tb_path_for_each_hop() - Iterate over each hop on path |
| 1178 | * @path: Path whose hops to iterate |
| 1179 | * @hop: Hop used as iterator |
| 1180 | * |
| 1181 | * Iterates over each hop on path. |
| 1182 | */ |
| 1183 | #define tb_path_for_each_hop(path, hop) \ |
| 1184 | for ((hop) = &(path)->hops[0]; \ |
| 1185 | (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++) |
| 1186 | |
Andreas Noever | cd22e73 | 2014-06-12 23:11:46 +0200 | [diff] [blame] | 1187 | int tb_drom_read(struct tb_switch *sw); |
| 1188 | int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid); |
Andreas Noever | c90553b | 2014-06-03 22:04:11 +0200 | [diff] [blame] | 1189 | |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 1190 | int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid); |
Sanath S | 01da6b9 | 2024-01-13 11:39:57 +0200 | [diff] [blame] | 1191 | int tb_lc_reset_port(struct tb_port *port); |
Mika Westerberg | e28178b | 2020-04-02 12:42:44 +0300 | [diff] [blame] | 1192 | int tb_lc_configure_port(struct tb_port *port); |
| 1193 | void tb_lc_unconfigure_port(struct tb_port *port); |
Mika Westerberg | 284652a | 2020-04-09 14:23:32 +0300 | [diff] [blame] | 1194 | int tb_lc_configure_xdomain(struct tb_port *port); |
| 1195 | void tb_lc_unconfigure_xdomain(struct tb_port *port); |
Mika Westerberg | fdb0887 | 2020-11-26 12:52:43 +0300 | [diff] [blame] | 1196 | int tb_lc_start_lane_initialization(struct tb_port *port); |
Gil Fine | 43f977b | 2021-12-17 03:16:43 +0200 | [diff] [blame] | 1197 | bool tb_lc_is_clx_supported(struct tb_port *port); |
Mika Westerberg | 30a4eca | 2022-01-07 13:00:47 +0200 | [diff] [blame] | 1198 | bool tb_lc_is_usb_plugged(struct tb_port *port); |
| 1199 | bool tb_lc_is_xhci_connected(struct tb_port *port); |
| 1200 | int tb_lc_xhci_connect(struct tb_port *port); |
| 1201 | void tb_lc_xhci_disconnect(struct tb_port *port); |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 1202 | int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags); |
Mika Westerberg | 5480dfc | 2019-01-09 17:25:43 +0200 | [diff] [blame] | 1203 | int tb_lc_set_sleep(struct tb_switch *sw); |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1204 | bool tb_lc_lane_bonding_possible(struct tb_switch *sw); |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 1205 | bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in); |
| 1206 | int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in); |
| 1207 | int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in); |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1208 | int tb_lc_force_power(struct tb_switch *sw); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1209 | |
| 1210 | static inline int tb_route_length(u64 route) |
| 1211 | { |
| 1212 | return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT; |
| 1213 | } |
| 1214 | |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 1215 | /** |
| 1216 | * tb_downstream_route() - get route to downstream switch |
| 1217 | * |
| 1218 | * Port must not be the upstream port (otherwise a loop is created). |
| 1219 | * |
| 1220 | * Return: Returns a route to the switch behind @port. |
| 1221 | */ |
| 1222 | static inline u64 tb_downstream_route(struct tb_port *port) |
| 1223 | { |
| 1224 | return tb_route(port->sw) |
| 1225 | | ((u64) port->port << (port->sw->config.depth * 8)); |
| 1226 | } |
| 1227 | |
Mika Westerberg | 5ca6768 | 2020-10-22 13:22:06 +0300 | [diff] [blame] | 1228 | bool tb_is_xdomain_enabled(void); |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 1229 | bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type, |
| 1230 | const void *buf, size_t size); |
| 1231 | struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent, |
| 1232 | u64 route, const uuid_t *local_uuid, |
| 1233 | const uuid_t *remote_uuid); |
| 1234 | void tb_xdomain_add(struct tb_xdomain *xd); |
| 1235 | void tb_xdomain_remove(struct tb_xdomain *xd); |
| 1236 | struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link, |
| 1237 | u8 depth); |
| 1238 | |
Mika Westerberg | 7f333ac | 2022-02-22 19:29:43 +0200 | [diff] [blame] | 1239 | static inline struct tb_switch *tb_xdomain_parent(struct tb_xdomain *xd) |
| 1240 | { |
| 1241 | return tb_to_switch(xd->dev.parent); |
| 1242 | } |
| 1243 | |
Mika Westerberg | 17fb1a3 | 2022-09-30 11:12:42 +0300 | [diff] [blame] | 1244 | /** |
| 1245 | * tb_xdomain_downstream_port() - Return downstream facing port of parent router |
| 1246 | * @xd: Xdomain pointer |
| 1247 | * |
| 1248 | * Returns the downstream port the XDomain is connected to. |
| 1249 | */ |
| 1250 | static inline struct tb_port *tb_xdomain_downstream_port(struct tb_xdomain *xd) |
| 1251 | { |
| 1252 | return tb_port_at(xd->route, tb_xdomain_parent(xd)); |
| 1253 | } |
| 1254 | |
Mika Westerberg | 8b02b2d | 2022-09-03 10:43:25 +0300 | [diff] [blame] | 1255 | int tb_retimer_nvm_read(struct tb_retimer *rt, unsigned int address, void *buf, |
| 1256 | size_t size); |
Rajmohan Mani | 3fb10ea | 2021-04-01 18:42:38 +0300 | [diff] [blame] | 1257 | int tb_retimer_scan(struct tb_port *port, bool add); |
Kranthi Kuntala | dacb128 | 2020-03-05 16:39:58 +0200 | [diff] [blame] | 1258 | void tb_retimer_remove_all(struct tb_port *port); |
| 1259 | |
| 1260 | static inline bool tb_is_retimer(const struct device *dev) |
| 1261 | { |
| 1262 | return dev->type == &tb_retimer_type; |
| 1263 | } |
| 1264 | |
| 1265 | static inline struct tb_retimer *tb_to_retimer(struct device *dev) |
| 1266 | { |
| 1267 | if (tb_is_retimer(dev)) |
| 1268 | return container_of(dev, struct tb_retimer, dev); |
| 1269 | return NULL; |
| 1270 | } |
| 1271 | |
Gil Fine | 6e21007 | 2022-09-23 01:30:43 +0300 | [diff] [blame] | 1272 | /** |
| 1273 | * usb4_switch_version() - Returns USB4 version of the router |
| 1274 | * @sw: Router to check |
| 1275 | * |
| 1276 | * Returns major version of USB4 router (%1 for v1, %2 for v2 and so |
| 1277 | * on). Can be called to pre-USB4 router too and in that case returns %0. |
| 1278 | */ |
| 1279 | static inline unsigned int usb4_switch_version(const struct tb_switch *sw) |
| 1280 | { |
| 1281 | return FIELD_GET(USB4_VERSION_MAJOR_MASK, sw->config.thunderbolt_version); |
| 1282 | } |
| 1283 | |
| 1284 | /** |
| 1285 | * tb_switch_is_usb4() - Is the switch USB4 compliant |
| 1286 | * @sw: Switch to check |
| 1287 | * |
| 1288 | * Returns true if the @sw is USB4 compliant router, false otherwise. |
| 1289 | */ |
| 1290 | static inline bool tb_switch_is_usb4(const struct tb_switch *sw) |
| 1291 | { |
| 1292 | return usb4_switch_version(sw) > 0; |
| 1293 | } |
| 1294 | |
Gil Fine | dcd12ac | 2024-03-01 15:11:18 +0200 | [diff] [blame] | 1295 | void usb4_switch_check_wakes(struct tb_switch *sw); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1296 | int usb4_switch_setup(struct tb_switch *sw); |
Mika Westerberg | d49b4f0 | 2022-10-11 12:11:09 +0300 | [diff] [blame] | 1297 | int usb4_switch_configuration_valid(struct tb_switch *sw); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1298 | int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid); |
| 1299 | int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf, |
| 1300 | size_t size); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1301 | bool usb4_switch_lane_bonding_possible(struct tb_switch *sw); |
Mika Westerberg | b2911a5 | 2019-12-06 18:36:07 +0200 | [diff] [blame] | 1302 | int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1303 | int usb4_switch_set_sleep(struct tb_switch *sw); |
| 1304 | int usb4_switch_nvm_sector_size(struct tb_switch *sw); |
| 1305 | int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf, |
| 1306 | size_t size); |
Mika Westerberg | 1cbf680 | 2021-04-12 15:25:08 +0300 | [diff] [blame] | 1307 | int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1308 | int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address, |
| 1309 | const void *buf, size_t size); |
| 1310 | int usb4_switch_nvm_authenticate(struct tb_switch *sw); |
Mika Westerberg | 661b194 | 2020-11-10 11:34:07 +0300 | [diff] [blame] | 1311 | int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status); |
Mika Westerberg | 56ad3ae | 2021-03-10 13:34:12 +0200 | [diff] [blame] | 1312 | int usb4_switch_credits_init(struct tb_switch *sw); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1313 | bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in); |
| 1314 | int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in); |
| 1315 | int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in); |
| 1316 | struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw, |
| 1317 | const struct tb_port *port); |
Rajmohan Mani | e6f8185 | 2019-12-17 15:33:44 +0300 | [diff] [blame] | 1318 | struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw, |
| 1319 | const struct tb_port *port); |
Mika Westerberg | cae5f51 | 2021-04-01 17:34:20 +0300 | [diff] [blame] | 1320 | int usb4_switch_add_ports(struct tb_switch *sw); |
| 1321 | void usb4_switch_remove_ports(struct tb_switch *sw); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1322 | |
| 1323 | int usb4_port_unlock(struct tb_port *port); |
Mario Limonciello | 5d2569c | 2022-09-26 09:33:50 -0500 | [diff] [blame] | 1324 | int usb4_port_hotplug_enable(struct tb_port *port); |
Sanath S | 01da6b9 | 2024-01-13 11:39:57 +0200 | [diff] [blame] | 1325 | int usb4_port_reset(struct tb_port *port); |
Mika Westerberg | e28178b | 2020-04-02 12:42:44 +0300 | [diff] [blame] | 1326 | int usb4_port_configure(struct tb_port *port); |
| 1327 | void usb4_port_unconfigure(struct tb_port *port); |
Mika Westerberg | f9cad07 | 2022-08-30 18:32:47 +0300 | [diff] [blame] | 1328 | int usb4_port_configure_xdomain(struct tb_port *port, struct tb_xdomain *xd); |
Mika Westerberg | 284652a | 2020-04-09 14:23:32 +0300 | [diff] [blame] | 1329 | void usb4_port_unconfigure_xdomain(struct tb_port *port); |
Rajmohan Mani | 3406de7 | 2021-04-01 18:38:05 +0300 | [diff] [blame] | 1330 | int usb4_port_router_offline(struct tb_port *port); |
| 1331 | int usb4_port_router_online(struct tb_port *port); |
Rajmohan Mani | 02d1285 | 2020-03-05 16:33:46 +0200 | [diff] [blame] | 1332 | int usb4_port_enumerate_retimers(struct tb_port *port); |
Gil Fine | 8a90e4f | 2021-12-17 03:16:39 +0200 | [diff] [blame] | 1333 | bool usb4_port_clx_supported(struct tb_port *port); |
Gil Fine | 81af295 | 2023-08-10 22:37:15 +0300 | [diff] [blame] | 1334 | |
| 1335 | bool usb4_port_asym_supported(struct tb_port *port); |
| 1336 | int usb4_port_asym_set_link_width(struct tb_port *port, enum tb_link_width width); |
| 1337 | int usb4_port_asym_start(struct tb_port *port); |
| 1338 | |
Mika Westerberg | e8241f6 | 2024-04-16 09:41:14 +0300 | [diff] [blame] | 1339 | /** |
| 1340 | * enum tb_sb_target - Sideband transaction target |
| 1341 | * @USB4_SB_TARGET_ROUTER: Target is the router itself |
| 1342 | * @USB4_SB_TARGET_PARTNER: Target is partner |
| 1343 | * @USB4_SB_TARGET_RETIMER: Target is retimer |
| 1344 | */ |
| 1345 | enum usb4_sb_target { |
| 1346 | USB4_SB_TARGET_ROUTER, |
| 1347 | USB4_SB_TARGET_PARTNER, |
| 1348 | USB4_SB_TARGET_RETIMER, |
| 1349 | }; |
| 1350 | |
| 1351 | int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target, u8 index, |
| 1352 | u8 reg, void *buf, u8 size); |
| 1353 | int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target, |
| 1354 | u8 index, u8 reg, const void *buf, u8 size); |
| 1355 | |
Mika Westerberg | 0890fc3 | 2023-03-21 10:02:55 +0200 | [diff] [blame] | 1356 | int usb4_port_margining_caps(struct tb_port *port, enum usb4_sb_target target, |
| 1357 | u8 index, u32 *caps); |
| 1358 | int usb4_port_hw_margin(struct tb_port *port, enum usb4_sb_target target, |
| 1359 | u8 index, unsigned int lanes, unsigned int ber_level, |
| 1360 | bool timing, bool right_high, u32 *results); |
| 1361 | int usb4_port_sw_margin(struct tb_port *port, enum usb4_sb_target target, |
| 1362 | u8 index, unsigned int lanes, bool timing, |
Mika Westerberg | d0f1e0c | 2022-02-22 19:31:47 +0200 | [diff] [blame] | 1363 | bool right_high, u32 counter); |
Mika Westerberg | 0890fc3 | 2023-03-21 10:02:55 +0200 | [diff] [blame] | 1364 | int usb4_port_sw_margin_errors(struct tb_port *port, enum usb4_sb_target target, |
| 1365 | u8 index, u32 *errors); |
Rajmohan Mani | 02d1285 | 2020-03-05 16:33:46 +0200 | [diff] [blame] | 1366 | |
Rajmohan Mani | 3406de7 | 2021-04-01 18:38:05 +0300 | [diff] [blame] | 1367 | int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index); |
Gil Fine | cd0c1e5 | 2023-03-03 00:17:24 +0200 | [diff] [blame] | 1368 | int usb4_port_retimer_unset_inbound_sbtx(struct tb_port *port, u8 index); |
Rajmohan Mani | 02d1285 | 2020-03-05 16:33:46 +0200 | [diff] [blame] | 1369 | int usb4_port_retimer_is_last(struct tb_port *port, u8 index); |
Mika Westerberg | ff6ab05 | 2023-03-21 11:40:49 +0200 | [diff] [blame] | 1370 | int usb4_port_retimer_is_cable(struct tb_port *port, u8 index); |
Rajmohan Mani | 02d1285 | 2020-03-05 16:33:46 +0200 | [diff] [blame] | 1371 | int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index); |
Rajmohan Mani | faa1c61 | 2021-04-12 15:29:16 +0300 | [diff] [blame] | 1372 | int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index, |
| 1373 | unsigned int address); |
Rajmohan Mani | 02d1285 | 2020-03-05 16:33:46 +0200 | [diff] [blame] | 1374 | int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, |
| 1375 | unsigned int address, const void *buf, |
| 1376 | size_t size); |
| 1377 | int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index); |
| 1378 | int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index, |
| 1379 | u32 *status); |
| 1380 | int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index, |
| 1381 | unsigned int address, void *buf, size_t size); |
Mika Westerberg | 3b1d8d5 | 2020-02-21 23:14:41 +0200 | [diff] [blame] | 1382 | |
| 1383 | int usb4_usb3_port_max_link_rate(struct tb_port *port); |
Mika Westerberg | 3b1d8d5 | 2020-02-21 23:14:41 +0200 | [diff] [blame] | 1384 | int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw, |
| 1385 | int *downstream_bw); |
| 1386 | int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw, |
| 1387 | int *downstream_bw); |
| 1388 | int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw, |
| 1389 | int *downstream_bw); |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1390 | |
Mika Westerberg | e327380 | 2022-03-23 16:18:28 +0200 | [diff] [blame] | 1391 | int usb4_dp_port_set_cm_id(struct tb_port *port, int cm_id); |
Mika Westerberg | 8d73f6b | 2023-02-01 13:21:37 +0200 | [diff] [blame] | 1392 | bool usb4_dp_port_bandwidth_mode_supported(struct tb_port *port); |
| 1393 | bool usb4_dp_port_bandwidth_mode_enabled(struct tb_port *port); |
| 1394 | int usb4_dp_port_set_cm_bandwidth_mode_supported(struct tb_port *port, |
| 1395 | bool supported); |
Mika Westerberg | e327380 | 2022-03-23 16:18:28 +0200 | [diff] [blame] | 1396 | int usb4_dp_port_group_id(struct tb_port *port); |
| 1397 | int usb4_dp_port_set_group_id(struct tb_port *port, int group_id); |
| 1398 | int usb4_dp_port_nrd(struct tb_port *port, int *rate, int *lanes); |
| 1399 | int usb4_dp_port_set_nrd(struct tb_port *port, int rate, int lanes); |
| 1400 | int usb4_dp_port_granularity(struct tb_port *port); |
| 1401 | int usb4_dp_port_set_granularity(struct tb_port *port, int granularity); |
Mika Westerberg | 8d73f6b | 2023-02-01 13:21:37 +0200 | [diff] [blame] | 1402 | int usb4_dp_port_set_estimated_bandwidth(struct tb_port *port, int bw); |
| 1403 | int usb4_dp_port_allocated_bandwidth(struct tb_port *port); |
| 1404 | int usb4_dp_port_allocate_bandwidth(struct tb_port *port, int bw); |
| 1405 | int usb4_dp_port_requested_bandwidth(struct tb_port *port); |
Mika Westerberg | e327380 | 2022-03-23 16:18:28 +0200 | [diff] [blame] | 1406 | |
Gil Fine | 6e19d48 | 2022-09-29 12:49:48 +0300 | [diff] [blame] | 1407 | int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable); |
| 1408 | |
Mika Westerberg | cae5f51 | 2021-04-01 17:34:20 +0300 | [diff] [blame] | 1409 | static inline bool tb_is_usb4_port_device(const struct device *dev) |
| 1410 | { |
| 1411 | return dev->type == &usb4_port_device_type; |
| 1412 | } |
| 1413 | |
| 1414 | static inline struct usb4_port *tb_to_usb4_port_device(struct device *dev) |
| 1415 | { |
| 1416 | if (tb_is_usb4_port_device(dev)) |
| 1417 | return container_of(dev, struct usb4_port, dev); |
| 1418 | return NULL; |
| 1419 | } |
| 1420 | |
| 1421 | struct usb4_port *usb4_port_device_add(struct tb_port *port); |
| 1422 | void usb4_port_device_remove(struct usb4_port *usb4); |
Rajmohan Mani | 3fb10ea | 2021-04-01 18:42:38 +0300 | [diff] [blame] | 1423 | int usb4_port_device_resume(struct usb4_port *usb4); |
Mika Westerberg | cae5f51 | 2021-04-01 17:34:20 +0300 | [diff] [blame] | 1424 | |
Mika Westerberg | 87200371 | 2023-05-26 14:55:20 +0300 | [diff] [blame] | 1425 | static inline bool usb4_port_device_is_offline(const struct usb4_port *usb4) |
| 1426 | { |
| 1427 | return usb4->offline; |
| 1428 | } |
| 1429 | |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1430 | void tb_check_quirks(struct tb_switch *sw); |
| 1431 | |
Mika Westerberg | b2be2b0 | 2019-04-02 15:26:00 +0300 | [diff] [blame] | 1432 | #ifdef CONFIG_ACPI |
Mika Westerberg | 408e1d9 | 2022-12-27 09:17:48 +0200 | [diff] [blame] | 1433 | bool tb_acpi_add_links(struct tb_nhi *nhi); |
Mika Westerberg | c6da62a | 2020-02-18 16:14:42 +0200 | [diff] [blame] | 1434 | |
| 1435 | bool tb_acpi_is_native(void); |
| 1436 | bool tb_acpi_may_tunnel_usb3(void); |
| 1437 | bool tb_acpi_may_tunnel_dp(void); |
| 1438 | bool tb_acpi_may_tunnel_pcie(void); |
| 1439 | bool tb_acpi_is_xdomain_allowed(void); |
Rajmohan Mani | ccc5cb8 | 2021-04-01 18:20:17 +0300 | [diff] [blame] | 1440 | |
| 1441 | int tb_acpi_init(void); |
| 1442 | void tb_acpi_exit(void); |
| 1443 | int tb_acpi_power_on_retimers(struct tb_port *port); |
| 1444 | int tb_acpi_power_off_retimers(struct tb_port *port); |
Mika Westerberg | b2be2b0 | 2019-04-02 15:26:00 +0300 | [diff] [blame] | 1445 | #else |
Mika Westerberg | 408e1d9 | 2022-12-27 09:17:48 +0200 | [diff] [blame] | 1446 | static inline bool tb_acpi_add_links(struct tb_nhi *nhi) { return false; } |
Mika Westerberg | c6da62a | 2020-02-18 16:14:42 +0200 | [diff] [blame] | 1447 | |
| 1448 | static inline bool tb_acpi_is_native(void) { return true; } |
| 1449 | static inline bool tb_acpi_may_tunnel_usb3(void) { return true; } |
| 1450 | static inline bool tb_acpi_may_tunnel_dp(void) { return true; } |
| 1451 | static inline bool tb_acpi_may_tunnel_pcie(void) { return true; } |
| 1452 | static inline bool tb_acpi_is_xdomain_allowed(void) { return true; } |
Rajmohan Mani | ccc5cb8 | 2021-04-01 18:20:17 +0300 | [diff] [blame] | 1453 | |
| 1454 | static inline int tb_acpi_init(void) { return 0; } |
| 1455 | static inline void tb_acpi_exit(void) { } |
| 1456 | static inline int tb_acpi_power_on_retimers(struct tb_port *port) { return 0; } |
| 1457 | static inline int tb_acpi_power_off_retimers(struct tb_port *port) { return 0; } |
Mika Westerberg | b2be2b0 | 2019-04-02 15:26:00 +0300 | [diff] [blame] | 1458 | #endif |
| 1459 | |
Gil Fine | 54e4181 | 2020-06-29 20:30:52 +0300 | [diff] [blame] | 1460 | #ifdef CONFIG_DEBUG_FS |
| 1461 | void tb_debugfs_init(void); |
| 1462 | void tb_debugfs_exit(void); |
| 1463 | void tb_switch_debugfs_init(struct tb_switch *sw); |
| 1464 | void tb_switch_debugfs_remove(struct tb_switch *sw); |
Mika Westerberg | d0f1e0c | 2022-02-22 19:31:47 +0200 | [diff] [blame] | 1465 | void tb_xdomain_debugfs_init(struct tb_xdomain *xd); |
| 1466 | void tb_xdomain_debugfs_remove(struct tb_xdomain *xd); |
Mika Westerberg | 407ac93 | 2020-10-07 17:53:44 +0300 | [diff] [blame] | 1467 | void tb_service_debugfs_init(struct tb_service *svc); |
| 1468 | void tb_service_debugfs_remove(struct tb_service *svc); |
Mika Westerberg | 6d241fa | 2023-03-20 13:50:44 +0200 | [diff] [blame] | 1469 | void tb_retimer_debugfs_init(struct tb_retimer *rt); |
| 1470 | void tb_retimer_debugfs_remove(struct tb_retimer *rt); |
Gil Fine | 54e4181 | 2020-06-29 20:30:52 +0300 | [diff] [blame] | 1471 | #else |
| 1472 | static inline void tb_debugfs_init(void) { } |
| 1473 | static inline void tb_debugfs_exit(void) { } |
| 1474 | static inline void tb_switch_debugfs_init(struct tb_switch *sw) { } |
| 1475 | static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { } |
Mika Westerberg | d0f1e0c | 2022-02-22 19:31:47 +0200 | [diff] [blame] | 1476 | static inline void tb_xdomain_debugfs_init(struct tb_xdomain *xd) { } |
| 1477 | static inline void tb_xdomain_debugfs_remove(struct tb_xdomain *xd) { } |
Mika Westerberg | 407ac93 | 2020-10-07 17:53:44 +0300 | [diff] [blame] | 1478 | static inline void tb_service_debugfs_init(struct tb_service *svc) { } |
| 1479 | static inline void tb_service_debugfs_remove(struct tb_service *svc) { } |
Mika Westerberg | 6d241fa | 2023-03-20 13:50:44 +0200 | [diff] [blame] | 1480 | static inline void tb_retimer_debugfs_init(struct tb_retimer *rt) { } |
| 1481 | static inline void tb_retimer_debugfs_remove(struct tb_retimer *rt) { } |
Gil Fine | 54e4181 | 2020-06-29 20:30:52 +0300 | [diff] [blame] | 1482 | #endif |
| 1483 | |
Andreas Noever | d6cc51c | 2014-06-03 22:04:00 +0200 | [diff] [blame] | 1484 | #endif |