Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for OMAP3 SoC |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of any |
| 8 | * kind, whether express or implied. |
| 9 | */ |
| 10 | |
Florian Vaussard | 6d624ea | 2013-05-31 14:32:56 +0200 | [diff] [blame] | 11 | #include <dt-bindings/gpio/gpio.h> |
Florian Vaussard | 71fdc6e | 2013-06-11 16:49:46 +0200 | [diff] [blame] | 12 | #include <dt-bindings/interrupt-controller/irq.h> |
Florian Vaussard | bcd3cca | 2013-05-31 14:32:59 +0200 | [diff] [blame] | 13 | #include <dt-bindings/pinctrl/omap.h> |
Florian Vaussard | 6d624ea | 2013-05-31 14:32:56 +0200 | [diff] [blame] | 14 | |
Florian Vaussard | 98ef7957 | 2013-05-31 14:32:55 +0200 | [diff] [blame] | 15 | #include "skeleton.dtsi" |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 16 | |
| 17 | / { |
| 18 | compatible = "ti,omap3430", "ti,omap3"; |
Benoit Cousson | 4c94ac2 | 2012-10-24 10:47:52 +0200 | [diff] [blame] | 19 | interrupt-parent = <&intc>; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 20 | |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 21 | aliases { |
Nishanth Menon | 20b8094 | 2013-10-16 15:21:03 -0500 | [diff] [blame] | 22 | i2c0 = &i2c1; |
| 23 | i2c1 = &i2c2; |
| 24 | i2c2 = &i2c3; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 25 | serial0 = &uart1; |
| 26 | serial1 = &uart2; |
| 27 | serial2 = &uart3; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 28 | }; |
| 29 | |
Benoit Cousson | 476b679 | 2011-08-16 11:49:08 +0200 | [diff] [blame] | 30 | cpus { |
Lorenzo Pieralisi | eeb25fd | 2013-04-18 18:35:59 +0100 | [diff] [blame] | 31 | #address-cells = <1>; |
| 32 | #size-cells = <0>; |
| 33 | |
Benoit Cousson | 476b679 | 2011-08-16 11:49:08 +0200 | [diff] [blame] | 34 | cpu@0 { |
| 35 | compatible = "arm,cortex-a8"; |
Lorenzo Pieralisi | eeb25fd | 2013-04-18 18:35:59 +0100 | [diff] [blame] | 36 | device_type = "cpu"; |
| 37 | reg = <0x0>; |
Benoit Cousson | 476b679 | 2011-08-16 11:49:08 +0200 | [diff] [blame] | 38 | }; |
| 39 | }; |
| 40 | |
Jon Hunter | 9b07b47 | 2012-10-18 09:28:52 -0500 | [diff] [blame] | 41 | pmu { |
| 42 | compatible = "arm,cortex-a8-pmu"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 43 | reg = <0x54000000 0x800000>; |
Jon Hunter | 9b07b47 | 2012-10-18 09:28:52 -0500 | [diff] [blame] | 44 | interrupts = <3>; |
| 45 | ti,hwmods = "debugss"; |
| 46 | }; |
| 47 | |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 48 | /* |
Christoph Fritz | 161e89a | 2013-03-29 17:32:05 +0100 | [diff] [blame] | 49 | * The soc node represents the soc top level view. It is used for IPs |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 50 | * that are not memory mapped in the MPU view or for the MPU itself. |
| 51 | */ |
| 52 | soc { |
| 53 | compatible = "ti,omap-infra"; |
Benoit Cousson | 476b679 | 2011-08-16 11:49:08 +0200 | [diff] [blame] | 54 | mpu { |
| 55 | compatible = "ti,omap3-mpu"; |
| 56 | ti,hwmods = "mpu"; |
| 57 | }; |
| 58 | |
| 59 | iva { |
| 60 | compatible = "ti,iva2.2"; |
| 61 | ti,hwmods = "iva"; |
| 62 | |
| 63 | dsp { |
| 64 | compatible = "ti,omap3-c64"; |
| 65 | }; |
| 66 | }; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | /* |
| 70 | * XXX: Use a flat representation of the OMAP3 interconnect. |
| 71 | * The real OMAP interconnect network is quite complex. |
| 72 | * Since that will not bring real advantage to represent that in DT for |
| 73 | * the moment, just use a fake OCP bus entry to represent the whole bus |
| 74 | * hierarchy. |
| 75 | */ |
| 76 | ocp { |
| 77 | compatible = "simple-bus"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 78 | reg = <0x68000000 0x10000>; |
| 79 | interrupts = <9 10>; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 80 | #address-cells = <1>; |
| 81 | #size-cells = <1>; |
| 82 | ranges; |
| 83 | ti,hwmods = "l3_main"; |
| 84 | |
Jon Hunter | 510c0ff | 2012-10-25 14:24:14 -0500 | [diff] [blame] | 85 | counter32k: counter@48320000 { |
| 86 | compatible = "ti,omap-counter32k"; |
| 87 | reg = <0x48320000 0x20>; |
| 88 | ti,hwmods = "counter_32k"; |
| 89 | }; |
| 90 | |
Benoit Cousson | d65c542 | 2011-11-30 19:26:42 +0100 | [diff] [blame] | 91 | intc: interrupt-controller@48200000 { |
| 92 | compatible = "ti,omap2-intc"; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 93 | interrupt-controller; |
| 94 | #interrupt-cells = <1>; |
Benoit Cousson | d65c542 | 2011-11-30 19:26:42 +0100 | [diff] [blame] | 95 | ti,intc-size = <96>; |
| 96 | reg = <0x48200000 0x1000>; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 97 | }; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 98 | |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 99 | sdma: dma-controller@48056000 { |
| 100 | compatible = "ti,omap3630-sdma", "ti,omap3430-sdma"; |
| 101 | reg = <0x48056000 0x1000>; |
| 102 | interrupts = <12>, |
| 103 | <13>, |
| 104 | <14>, |
| 105 | <15>; |
| 106 | #dma-cells = <1>; |
| 107 | #dma-channels = <32>; |
| 108 | #dma-requests = <96>; |
| 109 | }; |
| 110 | |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 111 | omap3_pmx_core: pinmux@48002030 { |
| 112 | compatible = "ti,omap3-padconf", "pinctrl-single"; |
| 113 | reg = <0x48002030 0x05cc>; |
| 114 | #address-cells = <1>; |
| 115 | #size-cells = <0>; |
Tony Lindgren | 30a69ef | 2013-10-10 15:45:13 -0700 | [diff] [blame] | 116 | #interrupt-cells = <1>; |
| 117 | interrupt-controller; |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 118 | pinctrl-single,register-width = <16>; |
Tony Lindgren | d623a0e | 2013-10-07 10:22:01 -0700 | [diff] [blame] | 119 | pinctrl-single,function-mask = <0xff1f>; |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 120 | }; |
| 121 | |
Lee Jones | b731777 | 2013-07-22 11:52:34 +0100 | [diff] [blame] | 122 | omap3_pmx_wkup: pinmux@48002a00 { |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 123 | compatible = "ti,omap3-padconf", "pinctrl-single"; |
Christoph Fritz | 161e89a | 2013-03-29 17:32:05 +0100 | [diff] [blame] | 124 | reg = <0x48002a00 0x5c>; |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 125 | #address-cells = <1>; |
| 126 | #size-cells = <0>; |
Tony Lindgren | 30a69ef | 2013-10-10 15:45:13 -0700 | [diff] [blame] | 127 | #interrupt-cells = <1>; |
| 128 | interrupt-controller; |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 129 | pinctrl-single,register-width = <16>; |
Tony Lindgren | d623a0e | 2013-10-07 10:22:01 -0700 | [diff] [blame] | 130 | pinctrl-single,function-mask = <0xff1f>; |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 131 | }; |
| 132 | |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 133 | gpio1: gpio@48310000 { |
| 134 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 135 | reg = <0x48310000 0x200>; |
| 136 | interrupts = <29>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 137 | ti,hwmods = "gpio1"; |
Jon Hunter | e4b9b9f | 2013-04-04 15:16:16 -0500 | [diff] [blame] | 138 | ti,gpio-always-on; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 139 | gpio-controller; |
| 140 | #gpio-cells = <2>; |
| 141 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 142 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 143 | }; |
| 144 | |
| 145 | gpio2: gpio@49050000 { |
| 146 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 147 | reg = <0x49050000 0x200>; |
| 148 | interrupts = <30>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 149 | ti,hwmods = "gpio2"; |
| 150 | gpio-controller; |
| 151 | #gpio-cells = <2>; |
| 152 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 153 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 154 | }; |
| 155 | |
| 156 | gpio3: gpio@49052000 { |
| 157 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 158 | reg = <0x49052000 0x200>; |
| 159 | interrupts = <31>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 160 | ti,hwmods = "gpio3"; |
| 161 | gpio-controller; |
| 162 | #gpio-cells = <2>; |
| 163 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 164 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 165 | }; |
| 166 | |
| 167 | gpio4: gpio@49054000 { |
| 168 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 169 | reg = <0x49054000 0x200>; |
| 170 | interrupts = <32>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 171 | ti,hwmods = "gpio4"; |
| 172 | gpio-controller; |
| 173 | #gpio-cells = <2>; |
| 174 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 175 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 176 | }; |
| 177 | |
| 178 | gpio5: gpio@49056000 { |
| 179 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 180 | reg = <0x49056000 0x200>; |
| 181 | interrupts = <33>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 182 | ti,hwmods = "gpio5"; |
| 183 | gpio-controller; |
| 184 | #gpio-cells = <2>; |
| 185 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 186 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 187 | }; |
| 188 | |
| 189 | gpio6: gpio@49058000 { |
| 190 | compatible = "ti,omap3-gpio"; |
Jon Hunter | e299185 | 2013-03-07 16:02:31 -0600 | [diff] [blame] | 191 | reg = <0x49058000 0x200>; |
| 192 | interrupts = <34>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 193 | ti,hwmods = "gpio6"; |
| 194 | gpio-controller; |
| 195 | #gpio-cells = <2>; |
| 196 | interrupt-controller; |
Jon Hunter | ff5c905 | 2013-03-07 15:44:39 -0600 | [diff] [blame] | 197 | #interrupt-cells = <2>; |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 198 | }; |
| 199 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 200 | uart1: serial@4806a000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 201 | compatible = "ti,omap3-uart"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 202 | reg = <0x4806a000 0x2000>; |
| 203 | interrupts = <72>; |
| 204 | dmas = <&sdma 49 &sdma 50>; |
| 205 | dma-names = "tx", "rx"; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 206 | ti,hwmods = "uart1"; |
| 207 | clock-frequency = <48000000>; |
| 208 | }; |
| 209 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 210 | uart2: serial@4806c000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 211 | compatible = "ti,omap3-uart"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 212 | reg = <0x4806c000 0x400>; |
| 213 | interrupts = <73>; |
| 214 | dmas = <&sdma 51 &sdma 52>; |
| 215 | dma-names = "tx", "rx"; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 216 | ti,hwmods = "uart2"; |
| 217 | clock-frequency = <48000000>; |
| 218 | }; |
| 219 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 220 | uart3: serial@49020000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 221 | compatible = "ti,omap3-uart"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 222 | reg = <0x49020000 0x400>; |
| 223 | interrupts = <74>; |
| 224 | dmas = <&sdma 53 &sdma 54>; |
| 225 | dma-names = "tx", "rx"; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 226 | ti,hwmods = "uart3"; |
| 227 | clock-frequency = <48000000>; |
| 228 | }; |
| 229 | |
Benoit Cousson | ca59a5c | 2011-08-30 16:50:24 +0200 | [diff] [blame] | 230 | i2c1: i2c@48070000 { |
| 231 | compatible = "ti,omap3-i2c"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 232 | reg = <0x48070000 0x80>; |
| 233 | interrupts = <56>; |
| 234 | dmas = <&sdma 27 &sdma 28>; |
| 235 | dma-names = "tx", "rx"; |
Benoit Cousson | ca59a5c | 2011-08-30 16:50:24 +0200 | [diff] [blame] | 236 | #address-cells = <1>; |
| 237 | #size-cells = <0>; |
| 238 | ti,hwmods = "i2c1"; |
| 239 | }; |
| 240 | |
| 241 | i2c2: i2c@48072000 { |
| 242 | compatible = "ti,omap3-i2c"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 243 | reg = <0x48072000 0x80>; |
| 244 | interrupts = <57>; |
| 245 | dmas = <&sdma 29 &sdma 30>; |
| 246 | dma-names = "tx", "rx"; |
Benoit Cousson | ca59a5c | 2011-08-30 16:50:24 +0200 | [diff] [blame] | 247 | #address-cells = <1>; |
| 248 | #size-cells = <0>; |
| 249 | ti,hwmods = "i2c2"; |
| 250 | }; |
| 251 | |
| 252 | i2c3: i2c@48060000 { |
| 253 | compatible = "ti,omap3-i2c"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 254 | reg = <0x48060000 0x80>; |
| 255 | interrupts = <61>; |
| 256 | dmas = <&sdma 25 &sdma 26>; |
| 257 | dma-names = "tx", "rx"; |
Benoit Cousson | ca59a5c | 2011-08-30 16:50:24 +0200 | [diff] [blame] | 258 | #address-cells = <1>; |
| 259 | #size-cells = <0>; |
| 260 | ti,hwmods = "i2c3"; |
| 261 | }; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 262 | |
| 263 | mcspi1: spi@48098000 { |
| 264 | compatible = "ti,omap2-mcspi"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 265 | reg = <0x48098000 0x100>; |
| 266 | interrupts = <65>; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 267 | #address-cells = <1>; |
| 268 | #size-cells = <0>; |
| 269 | ti,hwmods = "mcspi1"; |
| 270 | ti,spi-num-cs = <4>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 271 | dmas = <&sdma 35>, |
| 272 | <&sdma 36>, |
| 273 | <&sdma 37>, |
| 274 | <&sdma 38>, |
| 275 | <&sdma 39>, |
| 276 | <&sdma 40>, |
| 277 | <&sdma 41>, |
| 278 | <&sdma 42>; |
| 279 | dma-names = "tx0", "rx0", "tx1", "rx1", |
| 280 | "tx2", "rx2", "tx3", "rx3"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 281 | }; |
| 282 | |
| 283 | mcspi2: spi@4809a000 { |
| 284 | compatible = "ti,omap2-mcspi"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 285 | reg = <0x4809a000 0x100>; |
| 286 | interrupts = <66>; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 287 | #address-cells = <1>; |
| 288 | #size-cells = <0>; |
| 289 | ti,hwmods = "mcspi2"; |
| 290 | ti,spi-num-cs = <2>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 291 | dmas = <&sdma 43>, |
| 292 | <&sdma 44>, |
| 293 | <&sdma 45>, |
| 294 | <&sdma 46>; |
| 295 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 296 | }; |
| 297 | |
| 298 | mcspi3: spi@480b8000 { |
| 299 | compatible = "ti,omap2-mcspi"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 300 | reg = <0x480b8000 0x100>; |
| 301 | interrupts = <91>; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 302 | #address-cells = <1>; |
| 303 | #size-cells = <0>; |
| 304 | ti,hwmods = "mcspi3"; |
| 305 | ti,spi-num-cs = <2>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 306 | dmas = <&sdma 15>, |
| 307 | <&sdma 16>, |
| 308 | <&sdma 23>, |
| 309 | <&sdma 24>; |
| 310 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 311 | }; |
| 312 | |
| 313 | mcspi4: spi@480ba000 { |
| 314 | compatible = "ti,omap2-mcspi"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 315 | reg = <0x480ba000 0x100>; |
| 316 | interrupts = <48>; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 317 | #address-cells = <1>; |
| 318 | #size-cells = <0>; |
| 319 | ti,hwmods = "mcspi4"; |
| 320 | ti,spi-num-cs = <1>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 321 | dmas = <&sdma 70>, <&sdma 71>; |
| 322 | dma-names = "tx0", "rx0"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 323 | }; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 324 | |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 325 | hdqw1w: 1w@480b2000 { |
| 326 | compatible = "ti,omap3-1w"; |
| 327 | reg = <0x480b2000 0x1000>; |
| 328 | interrupts = <58>; |
| 329 | ti,hwmods = "hdq1w"; |
| 330 | }; |
| 331 | |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 332 | mmc1: mmc@4809c000 { |
| 333 | compatible = "ti,omap3-hsmmc"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 334 | reg = <0x4809c000 0x200>; |
| 335 | interrupts = <83>; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 336 | ti,hwmods = "mmc1"; |
| 337 | ti,dual-volt; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 338 | dmas = <&sdma 61>, <&sdma 62>; |
| 339 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 340 | }; |
| 341 | |
| 342 | mmc2: mmc@480b4000 { |
| 343 | compatible = "ti,omap3-hsmmc"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 344 | reg = <0x480b4000 0x200>; |
| 345 | interrupts = <86>; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 346 | ti,hwmods = "mmc2"; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 347 | dmas = <&sdma 47>, <&sdma 48>; |
| 348 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 349 | }; |
| 350 | |
| 351 | mmc3: mmc@480ad000 { |
| 352 | compatible = "ti,omap3-hsmmc"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 353 | reg = <0x480ad000 0x200>; |
| 354 | interrupts = <94>; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 355 | ti,hwmods = "mmc3"; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 356 | dmas = <&sdma 77>, <&sdma 78>; |
| 357 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 358 | }; |
Xiao Jiang | 94c3073 | 2012-06-01 12:44:14 +0800 | [diff] [blame] | 359 | |
| 360 | wdt2: wdt@48314000 { |
| 361 | compatible = "ti,omap3-wdt"; |
Tony Lindgren | d7c8f25 | 2013-10-17 15:15:22 -0700 | [diff] [blame] | 362 | reg = <0x48314000 0x80>; |
Xiao Jiang | 94c3073 | 2012-06-01 12:44:14 +0800 | [diff] [blame] | 363 | ti,hwmods = "wd_timer2"; |
| 364 | }; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 365 | |
| 366 | mcbsp1: mcbsp@48074000 { |
| 367 | compatible = "ti,omap3-mcbsp"; |
| 368 | reg = <0x48074000 0xff>; |
| 369 | reg-names = "mpu"; |
| 370 | interrupts = <16>, /* OCP compliant interrupt */ |
| 371 | <59>, /* TX interrupt */ |
| 372 | <60>; /* RX interrupt */ |
| 373 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 374 | ti,buffer-size = <128>; |
| 375 | ti,hwmods = "mcbsp1"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 376 | dmas = <&sdma 31>, |
| 377 | <&sdma 32>; |
| 378 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 379 | }; |
| 380 | |
| 381 | mcbsp2: mcbsp@49022000 { |
| 382 | compatible = "ti,omap3-mcbsp"; |
| 383 | reg = <0x49022000 0xff>, |
| 384 | <0x49028000 0xff>; |
| 385 | reg-names = "mpu", "sidetone"; |
| 386 | interrupts = <17>, /* OCP compliant interrupt */ |
| 387 | <62>, /* TX interrupt */ |
| 388 | <63>, /* RX interrupt */ |
| 389 | <4>; /* Sidetone */ |
| 390 | interrupt-names = "common", "tx", "rx", "sidetone"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 391 | ti,buffer-size = <1280>; |
Peter Ujfalusi | eef6fca | 2012-10-18 11:25:07 +0200 | [diff] [blame] | 392 | ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 393 | dmas = <&sdma 33>, |
| 394 | <&sdma 34>; |
| 395 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 396 | }; |
| 397 | |
| 398 | mcbsp3: mcbsp@49024000 { |
| 399 | compatible = "ti,omap3-mcbsp"; |
| 400 | reg = <0x49024000 0xff>, |
| 401 | <0x4902a000 0xff>; |
| 402 | reg-names = "mpu", "sidetone"; |
| 403 | interrupts = <22>, /* OCP compliant interrupt */ |
| 404 | <89>, /* TX interrupt */ |
| 405 | <90>, /* RX interrupt */ |
| 406 | <5>; /* Sidetone */ |
| 407 | interrupt-names = "common", "tx", "rx", "sidetone"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 408 | ti,buffer-size = <128>; |
Peter Ujfalusi | eef6fca | 2012-10-18 11:25:07 +0200 | [diff] [blame] | 409 | ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 410 | dmas = <&sdma 17>, |
| 411 | <&sdma 18>; |
| 412 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 413 | }; |
| 414 | |
| 415 | mcbsp4: mcbsp@49026000 { |
| 416 | compatible = "ti,omap3-mcbsp"; |
| 417 | reg = <0x49026000 0xff>; |
| 418 | reg-names = "mpu"; |
| 419 | interrupts = <23>, /* OCP compliant interrupt */ |
| 420 | <54>, /* TX interrupt */ |
| 421 | <55>; /* RX interrupt */ |
| 422 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 423 | ti,buffer-size = <128>; |
| 424 | ti,hwmods = "mcbsp4"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 425 | dmas = <&sdma 19>, |
| 426 | <&sdma 20>; |
| 427 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 428 | }; |
| 429 | |
| 430 | mcbsp5: mcbsp@48096000 { |
| 431 | compatible = "ti,omap3-mcbsp"; |
| 432 | reg = <0x48096000 0xff>; |
| 433 | reg-names = "mpu"; |
| 434 | interrupts = <27>, /* OCP compliant interrupt */ |
| 435 | <81>, /* TX interrupt */ |
| 436 | <82>; /* RX interrupt */ |
| 437 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 438 | ti,buffer-size = <128>; |
| 439 | ti,hwmods = "mcbsp5"; |
Sebastien Guiriec | 4e4ead7 | 2013-03-11 08:50:21 +0100 | [diff] [blame] | 440 | dmas = <&sdma 21>, |
| 441 | <&sdma 22>; |
| 442 | dma-names = "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 443 | }; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 444 | |
| 445 | timer1: timer@48318000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 446 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 447 | reg = <0x48318000 0x400>; |
| 448 | interrupts = <37>; |
| 449 | ti,hwmods = "timer1"; |
| 450 | ti,timer-alwon; |
| 451 | }; |
| 452 | |
| 453 | timer2: timer@49032000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 454 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 455 | reg = <0x49032000 0x400>; |
| 456 | interrupts = <38>; |
| 457 | ti,hwmods = "timer2"; |
| 458 | }; |
| 459 | |
| 460 | timer3: timer@49034000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 461 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 462 | reg = <0x49034000 0x400>; |
| 463 | interrupts = <39>; |
| 464 | ti,hwmods = "timer3"; |
| 465 | }; |
| 466 | |
| 467 | timer4: timer@49036000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 468 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 469 | reg = <0x49036000 0x400>; |
| 470 | interrupts = <40>; |
| 471 | ti,hwmods = "timer4"; |
| 472 | }; |
| 473 | |
| 474 | timer5: timer@49038000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 475 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 476 | reg = <0x49038000 0x400>; |
| 477 | interrupts = <41>; |
| 478 | ti,hwmods = "timer5"; |
| 479 | ti,timer-dsp; |
| 480 | }; |
| 481 | |
| 482 | timer6: timer@4903a000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 483 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 484 | reg = <0x4903a000 0x400>; |
| 485 | interrupts = <42>; |
| 486 | ti,hwmods = "timer6"; |
| 487 | ti,timer-dsp; |
| 488 | }; |
| 489 | |
| 490 | timer7: timer@4903c000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 491 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 492 | reg = <0x4903c000 0x400>; |
| 493 | interrupts = <43>; |
| 494 | ti,hwmods = "timer7"; |
| 495 | ti,timer-dsp; |
| 496 | }; |
| 497 | |
| 498 | timer8: timer@4903e000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 499 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 500 | reg = <0x4903e000 0x400>; |
| 501 | interrupts = <44>; |
| 502 | ti,hwmods = "timer8"; |
| 503 | ti,timer-pwm; |
| 504 | ti,timer-dsp; |
| 505 | }; |
| 506 | |
| 507 | timer9: timer@49040000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 508 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 509 | reg = <0x49040000 0x400>; |
| 510 | interrupts = <45>; |
| 511 | ti,hwmods = "timer9"; |
| 512 | ti,timer-pwm; |
| 513 | }; |
| 514 | |
| 515 | timer10: timer@48086000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 516 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 517 | reg = <0x48086000 0x400>; |
| 518 | interrupts = <46>; |
| 519 | ti,hwmods = "timer10"; |
| 520 | ti,timer-pwm; |
| 521 | }; |
| 522 | |
| 523 | timer11: timer@48088000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 524 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 525 | reg = <0x48088000 0x400>; |
| 526 | interrupts = <47>; |
| 527 | ti,hwmods = "timer11"; |
| 528 | ti,timer-pwm; |
| 529 | }; |
| 530 | |
| 531 | timer12: timer@48304000 { |
Jon Hunter | 002e1ec | 2013-03-19 12:38:18 -0500 | [diff] [blame] | 532 | compatible = "ti,omap3430-timer"; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 533 | reg = <0x48304000 0x400>; |
| 534 | interrupts = <95>; |
| 535 | ti,hwmods = "timer12"; |
| 536 | ti,timer-alwon; |
| 537 | ti,timer-secure; |
| 538 | }; |
Roger Quadros | af3eb36 | 2013-03-20 17:44:59 +0200 | [diff] [blame] | 539 | |
| 540 | usbhstll: usbhstll@48062000 { |
| 541 | compatible = "ti,usbhs-tll"; |
| 542 | reg = <0x48062000 0x1000>; |
| 543 | interrupts = <78>; |
| 544 | ti,hwmods = "usb_tll_hs"; |
| 545 | }; |
| 546 | |
| 547 | usbhshost: usbhshost@48064000 { |
| 548 | compatible = "ti,usbhs-host"; |
| 549 | reg = <0x48064000 0x400>; |
| 550 | ti,hwmods = "usb_host_hs"; |
| 551 | #address-cells = <1>; |
| 552 | #size-cells = <1>; |
| 553 | ranges; |
| 554 | |
| 555 | usbhsohci: ohci@48064400 { |
| 556 | compatible = "ti,ohci-omap3", "usb-ohci"; |
| 557 | reg = <0x48064400 0x400>; |
| 558 | interrupt-parent = <&intc>; |
| 559 | interrupts = <76>; |
| 560 | }; |
| 561 | |
| 562 | usbhsehci: ehci@48064800 { |
| 563 | compatible = "ti,ehci-omap", "usb-ehci"; |
| 564 | reg = <0x48064800 0x400>; |
| 565 | interrupt-parent = <&intc>; |
| 566 | interrupts = <77>; |
| 567 | }; |
| 568 | }; |
| 569 | |
Florian Vaussard | 6e8489d | 2013-01-28 18:54:07 +0100 | [diff] [blame] | 570 | gpmc: gpmc@6e000000 { |
| 571 | compatible = "ti,omap3430-gpmc"; |
| 572 | ti,hwmods = "gpmc"; |
Javier Martinez Canillas | 41644e7 | 2013-02-27 02:30:51 +0100 | [diff] [blame] | 573 | reg = <0x6e000000 0x02d0>; |
Florian Vaussard | 6e8489d | 2013-01-28 18:54:07 +0100 | [diff] [blame] | 574 | interrupts = <20>; |
| 575 | gpmc,num-cs = <8>; |
| 576 | gpmc,num-waitpins = <4>; |
| 577 | #address-cells = <2>; |
| 578 | #size-cells = <1>; |
| 579 | }; |
Kishon Vijay Abraham I | ad871c1 | 2013-03-07 19:05:16 +0530 | [diff] [blame] | 580 | |
| 581 | usb_otg_hs: usb_otg_hs@480ab000 { |
| 582 | compatible = "ti,omap3-musb"; |
| 583 | reg = <0x480ab000 0x1000>; |
Tony Lindgren | 304e71e | 2013-05-14 20:28:15 -0700 | [diff] [blame] | 584 | interrupts = <92>, <93>; |
Kishon Vijay Abraham I | ad871c1 | 2013-03-07 19:05:16 +0530 | [diff] [blame] | 585 | interrupt-names = "mc", "dma"; |
| 586 | ti,hwmods = "usb_otg_hs"; |
Kishon Vijay Abraham I | ad871c1 | 2013-03-07 19:05:16 +0530 | [diff] [blame] | 587 | multipoint = <1>; |
| 588 | num-eps = <16>; |
| 589 | ram-bits = <12>; |
| 590 | }; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 591 | }; |
| 592 | }; |