| Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Al Viro | b4edf06 | 2020-07-16 14:05:36 -0400 | [diff] [blame] | 2 | #ifndef __ASM_EXTABLE_H |
| 3 | #define __ASM_EXTABLE_H |
| Al Viro | c99d2ab | 2016-09-05 11:42:55 -0400 | [diff] [blame] | 4 | /* |
| 5 | * The exception table consists of pairs of addresses: the first is the |
| 6 | * address of an instruction that is allowed to fault, and the second is |
| 7 | * the address at which the program should continue. No registers are |
| 8 | * modified, so it is entirely up to the continuation code to figure out |
| 9 | * what to do. |
| 10 | * |
| 11 | * All the routines below use bits of fixup code that are out of line |
| 12 | * with the main instruction path. This means when everything is well, |
| 13 | * we don't even have to jump over them. Further, they do not intrude |
| 14 | * on our cache or tlb entries. |
| 15 | */ |
| 16 | |
| 17 | struct exception_table_entry { |
| 18 | unsigned int insn, fixup; |
| 19 | }; |
| 20 | |
| 21 | #endif |
