blob: cde48c42b30ad4b63c27dde6741f8637840670fc [file] [log] [blame]
Christian König2280ab52014-02-20 10:25:15 +01001/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#include <drm/drmP.h>
29#include <drm/radeon_drm.h>
30#include "radeon.h"
31#include "radeon_trace.h"
32
33/*
34 * GPUVM
35 * GPUVM is similar to the legacy gart on older asics, however
36 * rather than there being a single global gart table
37 * for the entire GPU, there are multiple VM page tables active
38 * at any given time. The VM page tables can contain a mix
39 * vram pages and system memory pages and system memory pages
40 * can be mapped as snooped (cached system pages) or unsnooped
41 * (uncached system pages).
42 * Each VM has an ID associated with it and there is a page table
43 * associated with each VMID. When execting a command buffer,
44 * the kernel tells the the ring what VMID to use for that command
45 * buffer. VMIDs are allocated dynamically as commands are submitted.
46 * The userspace drivers maintain their own address space and the kernel
47 * sets up their pages tables accordingly when they submit their
48 * command buffers and a VMID is assigned.
49 * Cayman/Trinity support up to 8 active VMs at any given time;
50 * SI supports 16.
51 */
52
53/**
54 * radeon_vm_num_pde - return the number of page directory entries
55 *
56 * @rdev: radeon_device pointer
57 *
58 * Calculate the number of page directory entries (cayman+).
59 */
60static unsigned radeon_vm_num_pdes(struct radeon_device *rdev)
61{
Christian König4510fb92014-06-05 23:56:50 -040062 return rdev->vm_manager.max_pfn >> radeon_vm_block_size;
Christian König2280ab52014-02-20 10:25:15 +010063}
64
65/**
66 * radeon_vm_directory_size - returns the size of the page directory in bytes
67 *
68 * @rdev: radeon_device pointer
69 *
70 * Calculate the size of the page directory in bytes (cayman+).
71 */
72static unsigned radeon_vm_directory_size(struct radeon_device *rdev)
73{
74 return RADEON_GPU_PAGE_ALIGN(radeon_vm_num_pdes(rdev) * 8);
75}
76
77/**
78 * radeon_vm_manager_init - init the vm manager
79 *
80 * @rdev: radeon_device pointer
81 *
82 * Init the vm manager (cayman+).
83 * Returns 0 for success, error for failure.
84 */
85int radeon_vm_manager_init(struct radeon_device *rdev)
86{
Christian König2280ab52014-02-20 10:25:15 +010087 int r;
Christian König2280ab52014-02-20 10:25:15 +010088
89 if (!rdev->vm_manager.enabled) {
Christian König2280ab52014-02-20 10:25:15 +010090 r = radeon_asic_vm_init(rdev);
91 if (r)
92 return r;
93
94 rdev->vm_manager.enabled = true;
Christian König2280ab52014-02-20 10:25:15 +010095 }
96 return 0;
97}
98
99/**
Christian König2280ab52014-02-20 10:25:15 +0100100 * radeon_vm_manager_fini - tear down the vm manager
101 *
102 * @rdev: radeon_device pointer
103 *
104 * Tear down the VM manager (cayman+).
105 */
106void radeon_vm_manager_fini(struct radeon_device *rdev)
107{
Christian König2280ab52014-02-20 10:25:15 +0100108 int i;
109
110 if (!rdev->vm_manager.enabled)
111 return;
112
Christian König6d2f2942014-02-20 13:42:17 +0100113 for (i = 0; i < RADEON_NUM_VM; ++i)
Christian König2280ab52014-02-20 10:25:15 +0100114 radeon_fence_unref(&rdev->vm_manager.active[i]);
Christian König2280ab52014-02-20 10:25:15 +0100115 radeon_asic_vm_fini(rdev);
Christian König2280ab52014-02-20 10:25:15 +0100116 rdev->vm_manager.enabled = false;
117}
118
119/**
Christian König6d2f2942014-02-20 13:42:17 +0100120 * radeon_vm_get_bos - add the vm BOs to a validation list
Christian König2280ab52014-02-20 10:25:15 +0100121 *
Christian König6d2f2942014-02-20 13:42:17 +0100122 * @vm: vm providing the BOs
123 * @head: head of validation list
Christian König2280ab52014-02-20 10:25:15 +0100124 *
Christian König6d2f2942014-02-20 13:42:17 +0100125 * Add the page directory to the list of BOs to
126 * validate for command submission (cayman+).
Christian König2280ab52014-02-20 10:25:15 +0100127 */
Christian König1d0c0942014-11-27 14:48:42 +0100128struct radeon_bo_list *radeon_vm_get_bos(struct radeon_device *rdev,
Christian Königdf0af442014-03-03 12:38:08 +0100129 struct radeon_vm *vm,
130 struct list_head *head)
Christian König2280ab52014-02-20 10:25:15 +0100131{
Christian König1d0c0942014-11-27 14:48:42 +0100132 struct radeon_bo_list *list;
Christian König7d95f6c2014-05-28 12:24:17 +0200133 unsigned i, idx;
Christian König2280ab52014-02-20 10:25:15 +0100134
Michel Dänzere5a5fd4d2014-10-20 18:40:54 +0900135 list = drm_malloc_ab(vm->max_pde_used + 2,
Christian König1d0c0942014-11-27 14:48:42 +0100136 sizeof(struct radeon_bo_list));
Christian König6d2f2942014-02-20 13:42:17 +0100137 if (!list)
138 return NULL;
Christian König2280ab52014-02-20 10:25:15 +0100139
Christian König6d2f2942014-02-20 13:42:17 +0100140 /* add the vm page table to the list */
Christian Königdf0af442014-03-03 12:38:08 +0100141 list[0].robj = vm->page_directory;
Christian Königce6758c2014-06-02 17:33:07 +0200142 list[0].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
143 list[0].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
Christian König6d2f2942014-02-20 13:42:17 +0100144 list[0].tv.bo = &vm->page_directory->tbo;
Christian König587cdda2014-11-19 14:01:23 +0100145 list[0].tv.shared = true;
Christian Königdf0af442014-03-03 12:38:08 +0100146 list[0].tiling_flags = 0;
Christian König6d2f2942014-02-20 13:42:17 +0100147 list_add(&list[0].tv.head, head);
Christian König2280ab52014-02-20 10:25:15 +0100148
Christian König6d2f2942014-02-20 13:42:17 +0100149 for (i = 0, idx = 1; i <= vm->max_pde_used; i++) {
150 if (!vm->page_tables[i].bo)
151 continue;
Christian König2280ab52014-02-20 10:25:15 +0100152
Christian Königdf0af442014-03-03 12:38:08 +0100153 list[idx].robj = vm->page_tables[i].bo;
Christian Königce6758c2014-06-02 17:33:07 +0200154 list[idx].prefered_domains = RADEON_GEM_DOMAIN_VRAM;
155 list[idx].allowed_domains = RADEON_GEM_DOMAIN_VRAM;
Christian Königdf0af442014-03-03 12:38:08 +0100156 list[idx].tv.bo = &list[idx].robj->tbo;
Christian König587cdda2014-11-19 14:01:23 +0100157 list[idx].tv.shared = true;
Christian Königdf0af442014-03-03 12:38:08 +0100158 list[idx].tiling_flags = 0;
Christian König6d2f2942014-02-20 13:42:17 +0100159 list_add(&list[idx++].tv.head, head);
Christian König2280ab52014-02-20 10:25:15 +0100160 }
161
Christian König6d2f2942014-02-20 13:42:17 +0100162 return list;
Christian König2280ab52014-02-20 10:25:15 +0100163}
164
165/**
166 * radeon_vm_grab_id - allocate the next free VMID
167 *
168 * @rdev: radeon_device pointer
169 * @vm: vm to allocate id for
170 * @ring: ring we want to submit job to
171 *
172 * Allocate an id for the vm (cayman+).
173 * Returns the fence we need to sync to (if any).
174 *
175 * Global and local mutex must be locked!
176 */
177struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
178 struct radeon_vm *vm, int ring)
179{
180 struct radeon_fence *best[RADEON_NUM_RINGS] = {};
Christian König7c42bc12014-11-19 14:01:25 +0100181 struct radeon_vm_id *vm_id = &vm->ids[ring];
182
Christian König2280ab52014-02-20 10:25:15 +0100183 unsigned choices[2] = {};
184 unsigned i;
185
186 /* check if the id is still valid */
Christian König7c42bc12014-11-19 14:01:25 +0100187 if (vm_id->id && vm_id->last_id_use &&
188 vm_id->last_id_use == rdev->vm_manager.active[vm_id->id])
Christian König2280ab52014-02-20 10:25:15 +0100189 return NULL;
190
191 /* we definately need to flush */
Christian König7c42bc12014-11-19 14:01:25 +0100192 vm_id->pd_gpu_addr = ~0ll;
Christian König2280ab52014-02-20 10:25:15 +0100193
194 /* skip over VMID 0, since it is the system VM */
195 for (i = 1; i < rdev->vm_manager.nvm; ++i) {
196 struct radeon_fence *fence = rdev->vm_manager.active[i];
197
198 if (fence == NULL) {
199 /* found a free one */
Christian König7c42bc12014-11-19 14:01:25 +0100200 vm_id->id = i;
201 trace_radeon_vm_grab_id(i, ring);
Christian König2280ab52014-02-20 10:25:15 +0100202 return NULL;
203 }
204
205 if (radeon_fence_is_earlier(fence, best[fence->ring])) {
206 best[fence->ring] = fence;
207 choices[fence->ring == ring ? 0 : 1] = i;
208 }
209 }
210
211 for (i = 0; i < 2; ++i) {
212 if (choices[i]) {
Christian König7c42bc12014-11-19 14:01:25 +0100213 vm_id->id = choices[i];
214 trace_radeon_vm_grab_id(choices[i], ring);
Christian König2280ab52014-02-20 10:25:15 +0100215 return rdev->vm_manager.active[choices[i]];
216 }
217 }
218
219 /* should never happen */
220 BUG();
221 return NULL;
222}
223
224/**
Christian Königfa688342014-02-20 10:47:05 +0100225 * radeon_vm_flush - hardware flush the vm
226 *
227 * @rdev: radeon_device pointer
228 * @vm: vm we want to flush
229 * @ring: ring to use for flush
Christian Königad1a58a2014-11-19 14:01:24 +0100230 * @updates: last vm update that is waited for
Christian Königfa688342014-02-20 10:47:05 +0100231 *
232 * Flush the vm (cayman+).
233 *
234 * Global and local mutex must be locked!
235 */
236void radeon_vm_flush(struct radeon_device *rdev,
237 struct radeon_vm *vm,
Christian Königad1a58a2014-11-19 14:01:24 +0100238 int ring, struct radeon_fence *updates)
Christian Königfa688342014-02-20 10:47:05 +0100239{
Christian König6d2f2942014-02-20 13:42:17 +0100240 uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
Christian König7c42bc12014-11-19 14:01:25 +0100241 struct radeon_vm_id *vm_id = &vm->ids[ring];
Christian König6d2f2942014-02-20 13:42:17 +0100242
Christian König7c42bc12014-11-19 14:01:25 +0100243 if (pd_addr != vm_id->pd_gpu_addr || !vm_id->flushed_updates ||
244 radeon_fence_is_earlier(vm_id->flushed_updates, updates)) {
Christian Königad1a58a2014-11-19 14:01:24 +0100245
Christian König7c42bc12014-11-19 14:01:25 +0100246 trace_radeon_vm_flush(pd_addr, ring, vm->ids[ring].id);
247 radeon_fence_unref(&vm_id->flushed_updates);
248 vm_id->flushed_updates = radeon_fence_ref(updates);
249 vm_id->pd_gpu_addr = pd_addr;
Christian Königfaffaf62014-11-19 14:01:19 +0100250 radeon_ring_vm_flush(rdev, &rdev->ring[ring],
Christian König7c42bc12014-11-19 14:01:25 +0100251 vm_id->id, vm_id->pd_gpu_addr);
252
Christian König6d2f2942014-02-20 13:42:17 +0100253 }
Christian Königfa688342014-02-20 10:47:05 +0100254}
255
256/**
Christian König2280ab52014-02-20 10:25:15 +0100257 * radeon_vm_fence - remember fence for vm
258 *
259 * @rdev: radeon_device pointer
260 * @vm: vm we want to fence
261 * @fence: fence to remember
262 *
263 * Fence the vm (cayman+).
264 * Set the fence used to protect page table and id.
265 *
266 * Global and local mutex must be locked!
267 */
268void radeon_vm_fence(struct radeon_device *rdev,
269 struct radeon_vm *vm,
270 struct radeon_fence *fence)
271{
Christian König7c42bc12014-11-19 14:01:25 +0100272 unsigned vm_id = vm->ids[fence->ring].id;
273
Christian König7c42bc12014-11-19 14:01:25 +0100274 radeon_fence_unref(&rdev->vm_manager.active[vm_id]);
275 rdev->vm_manager.active[vm_id] = radeon_fence_ref(fence);
Christian Königfa688342014-02-20 10:47:05 +0100276
Christian König7c42bc12014-11-19 14:01:25 +0100277 radeon_fence_unref(&vm->ids[fence->ring].last_id_use);
278 vm->ids[fence->ring].last_id_use = radeon_fence_ref(fence);
Christian König2280ab52014-02-20 10:25:15 +0100279}
280
281/**
282 * radeon_vm_bo_find - find the bo_va for a specific vm & bo
283 *
284 * @vm: requested vm
285 * @bo: requested buffer object
286 *
287 * Find @bo inside the requested vm (cayman+).
288 * Search inside the @bos vm list for the requested vm
289 * Returns the found bo_va or NULL if none is found
290 *
291 * Object has to be reserved!
292 */
293struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm,
294 struct radeon_bo *bo)
295{
296 struct radeon_bo_va *bo_va;
297
298 list_for_each_entry(bo_va, &bo->va, bo_list) {
299 if (bo_va->vm == vm) {
300 return bo_va;
301 }
302 }
303 return NULL;
304}
305
306/**
307 * radeon_vm_bo_add - add a bo to a specific vm
308 *
309 * @rdev: radeon_device pointer
310 * @vm: requested vm
311 * @bo: radeon buffer object
312 *
313 * Add @bo into the requested vm (cayman+).
314 * Add @bo to the list of bos associated with the vm
315 * Returns newly added bo_va or NULL for failure
316 *
317 * Object has to be reserved!
318 */
319struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev,
320 struct radeon_vm *vm,
321 struct radeon_bo *bo)
322{
323 struct radeon_bo_va *bo_va;
324
325 bo_va = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);
326 if (bo_va == NULL) {
327 return NULL;
328 }
329 bo_va->vm = vm;
330 bo_va->bo = bo;
Alex Deucher0aea5e42014-07-30 11:49:56 -0400331 bo_va->it.start = 0;
332 bo_va->it.last = 0;
Christian König2280ab52014-02-20 10:25:15 +0100333 bo_va->flags = 0;
Christian Könige31ad962014-07-18 09:24:53 +0200334 bo_va->addr = 0;
Christian König2280ab52014-02-20 10:25:15 +0100335 bo_va->ref_count = 1;
336 INIT_LIST_HEAD(&bo_va->bo_list);
Christian König036bf462014-07-18 08:56:40 +0200337 INIT_LIST_HEAD(&bo_va->vm_status);
Christian König2280ab52014-02-20 10:25:15 +0100338
339 mutex_lock(&vm->mutex);
Christian König2280ab52014-02-20 10:25:15 +0100340 list_add_tail(&bo_va->bo_list, &bo->va);
341 mutex_unlock(&vm->mutex);
342
343 return bo_va;
344}
345
346/**
Christian König03f62ab2014-07-30 21:05:17 +0200347 * radeon_vm_set_pages - helper to call the right asic function
348 *
349 * @rdev: radeon_device pointer
350 * @ib: indirect buffer to fill with commands
351 * @pe: addr of the page entry
352 * @addr: dst addr to write into pe
353 * @count: number of page entries to update
354 * @incr: increase next addr by incr bytes
355 * @flags: hw access flags
356 *
357 * Traces the parameters and calls the right asic functions
358 * to setup the page table using the DMA.
359 */
360static void radeon_vm_set_pages(struct radeon_device *rdev,
361 struct radeon_ib *ib,
362 uint64_t pe,
363 uint64_t addr, unsigned count,
364 uint32_t incr, uint32_t flags)
365{
366 trace_radeon_vm_set_page(pe, addr, count, incr, flags);
367
368 if ((flags & R600_PTE_GART_MASK) == R600_PTE_GART_MASK) {
369 uint64_t src = rdev->gart.table_addr + (addr >> 12) * 8;
370 radeon_asic_vm_copy_pages(rdev, ib, pe, src, count);
371
372 } else if ((flags & R600_PTE_SYSTEM) || (count < 3)) {
373 radeon_asic_vm_write_pages(rdev, ib, pe, addr,
374 count, incr, flags);
375
376 } else {
377 radeon_asic_vm_set_pages(rdev, ib, pe, addr,
378 count, incr, flags);
379 }
380}
381
382/**
Christian König6d2f2942014-02-20 13:42:17 +0100383 * radeon_vm_clear_bo - initially clear the page dir/table
384 *
385 * @rdev: radeon_device pointer
386 * @bo: bo to clear
387 */
388static int radeon_vm_clear_bo(struct radeon_device *rdev,
389 struct radeon_bo *bo)
390{
Christian König6d2f2942014-02-20 13:42:17 +0100391 struct radeon_ib ib;
392 unsigned entries;
393 uint64_t addr;
394 int r;
395
Christian König587cdda2014-11-19 14:01:23 +0100396 r = radeon_bo_reserve(bo, false);
397 if (r)
Christian König6d2f2942014-02-20 13:42:17 +0100398 return r;
399
Christian König587cdda2014-11-19 14:01:23 +0100400 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
401 if (r)
402 goto error_unreserve;
Christian König6d2f2942014-02-20 13:42:17 +0100403
404 addr = radeon_bo_gpu_offset(bo);
405 entries = radeon_bo_size(bo) / 8;
406
Christian Königcc6f3532014-07-30 21:05:18 +0200407 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256);
Christian König6d2f2942014-02-20 13:42:17 +0100408 if (r)
Christian König587cdda2014-11-19 14:01:23 +0100409 goto error_unreserve;
Christian König6d2f2942014-02-20 13:42:17 +0100410
411 ib.length_dw = 0;
412
Christian König03f62ab2014-07-30 21:05:17 +0200413 radeon_vm_set_pages(rdev, &ib, addr, 0, entries, 0, 0);
414 radeon_asic_vm_pad_ib(rdev, &ib);
Christian Königcc6f3532014-07-30 21:05:18 +0200415 WARN_ON(ib.length_dw > 64);
Christian König6d2f2942014-02-20 13:42:17 +0100416
Michel Dänzer1538a9e2014-08-18 17:34:55 +0900417 r = radeon_ib_schedule(rdev, &ib, NULL, false);
Christian König6d2f2942014-02-20 13:42:17 +0100418 if (r)
Christian König587cdda2014-11-19 14:01:23 +0100419 goto error_free;
Christian König6d2f2942014-02-20 13:42:17 +0100420
Christian Königad1a58a2014-11-19 14:01:24 +0100421 ib.fence->is_vm_update = true;
Christian König587cdda2014-11-19 14:01:23 +0100422 radeon_bo_fence(bo, ib.fence, false);
423
424error_free:
Christian König6d2f2942014-02-20 13:42:17 +0100425 radeon_ib_free(rdev, &ib);
426
Christian König587cdda2014-11-19 14:01:23 +0100427error_unreserve:
428 radeon_bo_unreserve(bo);
Christian König6d2f2942014-02-20 13:42:17 +0100429 return r;
430}
431
432/**
Christian König2280ab52014-02-20 10:25:15 +0100433 * radeon_vm_bo_set_addr - set bos virtual address inside a vm
434 *
435 * @rdev: radeon_device pointer
436 * @bo_va: bo_va to store the address
437 * @soffset: requested offset of the buffer in the VM address space
438 * @flags: attributes of pages (read/write/valid/etc.)
439 *
440 * Set offset of @bo_va (cayman+).
441 * Validate and set the offset requested within the vm address space.
442 * Returns 0 for success, error for failure.
443 *
Christian König85761f62014-11-19 14:01:20 +0100444 * Object has to be reserved and gets unreserved by this function!
Christian König2280ab52014-02-20 10:25:15 +0100445 */
446int radeon_vm_bo_set_addr(struct radeon_device *rdev,
447 struct radeon_bo_va *bo_va,
448 uint64_t soffset,
449 uint32_t flags)
450{
451 uint64_t size = radeon_bo_size(bo_va->bo);
Christian König2280ab52014-02-20 10:25:15 +0100452 struct radeon_vm *vm = bo_va->vm;
Christian König6d2f2942014-02-20 13:42:17 +0100453 unsigned last_pfn, pt_idx;
Alex Deucher0aea5e42014-07-30 11:49:56 -0400454 uint64_t eoffset;
Christian König6d2f2942014-02-20 13:42:17 +0100455 int r;
Christian König2280ab52014-02-20 10:25:15 +0100456
457 if (soffset) {
458 /* make sure object fit at this offset */
459 eoffset = soffset + size;
460 if (soffset >= eoffset) {
461 return -EINVAL;
462 }
463
464 last_pfn = eoffset / RADEON_GPU_PAGE_SIZE;
465 if (last_pfn > rdev->vm_manager.max_pfn) {
466 dev_err(rdev->dev, "va above limit (0x%08X > 0x%08X)\n",
467 last_pfn, rdev->vm_manager.max_pfn);
468 return -EINVAL;
469 }
470
471 } else {
472 eoffset = last_pfn = 0;
473 }
474
475 mutex_lock(&vm->mutex);
Alex Deucher0aea5e42014-07-30 11:49:56 -0400476 if (bo_va->it.start || bo_va->it.last) {
477 if (bo_va->addr) {
478 /* add a clone of the bo_va to clear the old address */
479 struct radeon_bo_va *tmp;
480 tmp = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);
Dan Carpenter68b1ea32014-08-07 18:27:37 +0300481 if (!tmp) {
482 mutex_unlock(&vm->mutex);
483 return -ENOMEM;
484 }
Alex Deucher0aea5e42014-07-30 11:49:56 -0400485 tmp->it.start = bo_va->it.start;
486 tmp->it.last = bo_va->it.last;
487 tmp->vm = vm;
488 tmp->addr = bo_va->addr;
Christian Königee26d832014-07-30 21:04:57 +0200489 tmp->bo = radeon_bo_ref(bo_va->bo);
Christian Königf7a3db72014-11-27 14:48:44 +0100490 spin_lock(&vm->status_lock);
Alex Deucher0aea5e42014-07-30 11:49:56 -0400491 list_add(&tmp->vm_status, &vm->freed);
Christian Königf7a3db72014-11-27 14:48:44 +0100492 spin_unlock(&vm->status_lock);
Christian König2280ab52014-02-20 10:25:15 +0100493 }
494
Alex Deucher0aea5e42014-07-30 11:49:56 -0400495 interval_tree_remove(&bo_va->it, &vm->va);
496 bo_va->it.start = 0;
497 bo_va->it.last = 0;
498 }
499
500 soffset /= RADEON_GPU_PAGE_SIZE;
501 eoffset /= RADEON_GPU_PAGE_SIZE;
502 if (soffset || eoffset) {
503 struct interval_tree_node *it;
504 it = interval_tree_iter_first(&vm->va, soffset, eoffset - 1);
505 if (it) {
506 struct radeon_bo_va *tmp;
507 tmp = container_of(it, struct radeon_bo_va, it);
Christian König2280ab52014-02-20 10:25:15 +0100508 /* bo and tmp overlap, invalid offset */
Alex Deucher0aea5e42014-07-30 11:49:56 -0400509 dev_err(rdev->dev, "bo %p va 0x%010Lx conflict with "
510 "(bo %p 0x%010lx 0x%010lx)\n", bo_va->bo,
511 soffset, tmp->bo, tmp->it.start, tmp->it.last);
Christian König2280ab52014-02-20 10:25:15 +0100512 mutex_unlock(&vm->mutex);
513 return -EINVAL;
514 }
Alex Deucher0aea5e42014-07-30 11:49:56 -0400515 bo_va->it.start = soffset;
516 bo_va->it.last = eoffset - 1;
517 interval_tree_insert(&bo_va->it, &vm->va);
Christian König2280ab52014-02-20 10:25:15 +0100518 }
519
Christian König2280ab52014-02-20 10:25:15 +0100520 bo_va->flags = flags;
Christian Könige31ad962014-07-18 09:24:53 +0200521 bo_va->addr = 0;
Christian König2280ab52014-02-20 10:25:15 +0100522
Alex Deucher0aea5e42014-07-30 11:49:56 -0400523 soffset >>= radeon_vm_block_size;
524 eoffset >>= radeon_vm_block_size;
Christian König4510fb92014-06-05 23:56:50 -0400525
526 BUG_ON(eoffset >= radeon_vm_num_pdes(rdev));
Christian König6d2f2942014-02-20 13:42:17 +0100527
528 if (eoffset > vm->max_pde_used)
529 vm->max_pde_used = eoffset;
530
531 radeon_bo_unreserve(bo_va->bo);
532
533 /* walk over the address space and allocate the page tables */
534 for (pt_idx = soffset; pt_idx <= eoffset; ++pt_idx) {
535 struct radeon_bo *pt;
536
537 if (vm->page_tables[pt_idx].bo)
538 continue;
539
540 /* drop mutex to allocate and clear page table */
541 mutex_unlock(&vm->mutex);
542
543 r = radeon_bo_create(rdev, RADEON_VM_PTE_COUNT * 8,
Christian König7dae77f2014-07-02 21:28:10 +0200544 RADEON_GPU_PAGE_SIZE, true,
Maarten Lankhorst831b6962014-09-18 14:11:56 +0200545 RADEON_GEM_DOMAIN_VRAM, 0,
546 NULL, NULL, &pt);
Christian König6d2f2942014-02-20 13:42:17 +0100547 if (r)
548 return r;
549
550 r = radeon_vm_clear_bo(rdev, pt);
551 if (r) {
552 radeon_bo_unref(&pt);
553 radeon_bo_reserve(bo_va->bo, false);
554 return r;
555 }
556
557 /* aquire mutex again */
558 mutex_lock(&vm->mutex);
559 if (vm->page_tables[pt_idx].bo) {
560 /* someone else allocated the pt in the meantime */
561 mutex_unlock(&vm->mutex);
562 radeon_bo_unref(&pt);
563 mutex_lock(&vm->mutex);
564 continue;
565 }
566
567 vm->page_tables[pt_idx].addr = 0;
568 vm->page_tables[pt_idx].bo = pt;
569 }
570
Christian König2280ab52014-02-20 10:25:15 +0100571 mutex_unlock(&vm->mutex);
Christian König85761f62014-11-19 14:01:20 +0100572 return 0;
Christian König2280ab52014-02-20 10:25:15 +0100573}
574
575/**
576 * radeon_vm_map_gart - get the physical address of a gart page
577 *
578 * @rdev: radeon_device pointer
579 * @addr: the unmapped addr
580 *
581 * Look up the physical address of the page that the pte resolves
582 * to (cayman+).
583 * Returns the physical address of the page.
584 */
585uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr)
586{
587 uint64_t result;
588
589 /* page table offset */
590 result = rdev->gart.pages_addr[addr >> PAGE_SHIFT];
591
592 /* in case cpu page size != gpu page size*/
593 result |= addr & (~PAGE_MASK);
594
595 return result;
596}
597
598/**
599 * radeon_vm_page_flags - translate page flags to what the hw uses
600 *
601 * @flags: flags comming from userspace
602 *
603 * Translate the flags the userspace ABI uses to hw flags.
604 */
605static uint32_t radeon_vm_page_flags(uint32_t flags)
606{
607 uint32_t hw_flags = 0;
608 hw_flags |= (flags & RADEON_VM_PAGE_VALID) ? R600_PTE_VALID : 0;
609 hw_flags |= (flags & RADEON_VM_PAGE_READABLE) ? R600_PTE_READABLE : 0;
610 hw_flags |= (flags & RADEON_VM_PAGE_WRITEABLE) ? R600_PTE_WRITEABLE : 0;
611 if (flags & RADEON_VM_PAGE_SYSTEM) {
612 hw_flags |= R600_PTE_SYSTEM;
613 hw_flags |= (flags & RADEON_VM_PAGE_SNOOPED) ? R600_PTE_SNOOPED : 0;
614 }
615 return hw_flags;
616}
617
618/**
619 * radeon_vm_update_pdes - make sure that page directory is valid
620 *
621 * @rdev: radeon_device pointer
622 * @vm: requested vm
623 * @start: start of GPU address range
624 * @end: end of GPU address range
625 *
626 * Allocates new page tables if necessary
627 * and updates the page directory (cayman+).
628 * Returns 0 for success, error for failure.
629 *
630 * Global and local mutex must be locked!
631 */
Christian König6d2f2942014-02-20 13:42:17 +0100632int radeon_vm_update_page_directory(struct radeon_device *rdev,
633 struct radeon_vm *vm)
Christian König2280ab52014-02-20 10:25:15 +0100634{
Christian König37903b52014-05-30 15:21:16 +0200635 struct radeon_bo *pd = vm->page_directory;
636 uint64_t pd_addr = radeon_bo_gpu_offset(pd);
Christian König4510fb92014-06-05 23:56:50 -0400637 uint32_t incr = RADEON_VM_PTE_COUNT * 8;
Christian König2280ab52014-02-20 10:25:15 +0100638 uint64_t last_pde = ~0, last_pt = ~0;
Christian König6d2f2942014-02-20 13:42:17 +0100639 unsigned count = 0, pt_idx, ndw;
640 struct radeon_ib ib;
Christian König2280ab52014-02-20 10:25:15 +0100641 int r;
642
Christian König6d2f2942014-02-20 13:42:17 +0100643 /* padding, etc. */
644 ndw = 64;
645
646 /* assume the worst case */
Christian Königcc6f3532014-07-30 21:05:18 +0200647 ndw += vm->max_pde_used * 6;
Christian König6d2f2942014-02-20 13:42:17 +0100648
649 /* update too big for an IB */
650 if (ndw > 0xfffff)
651 return -ENOMEM;
652
653 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);
654 if (r)
655 return r;
656 ib.length_dw = 0;
Christian König2280ab52014-02-20 10:25:15 +0100657
658 /* walk over the address space and update the page directory */
Christian König6d2f2942014-02-20 13:42:17 +0100659 for (pt_idx = 0; pt_idx <= vm->max_pde_used; ++pt_idx) {
660 struct radeon_bo *bo = vm->page_tables[pt_idx].bo;
Christian König2280ab52014-02-20 10:25:15 +0100661 uint64_t pde, pt;
662
Christian König6d2f2942014-02-20 13:42:17 +0100663 if (bo == NULL)
Christian König2280ab52014-02-20 10:25:15 +0100664 continue;
665
Christian König6d2f2942014-02-20 13:42:17 +0100666 pt = radeon_bo_gpu_offset(bo);
667 if (vm->page_tables[pt_idx].addr == pt)
668 continue;
669 vm->page_tables[pt_idx].addr = pt;
Christian König2280ab52014-02-20 10:25:15 +0100670
Christian König6d2f2942014-02-20 13:42:17 +0100671 pde = pd_addr + pt_idx * 8;
Christian König2280ab52014-02-20 10:25:15 +0100672 if (((last_pde + 8 * count) != pde) ||
673 ((last_pt + incr * count) != pt)) {
674
675 if (count) {
Christian König03f62ab2014-07-30 21:05:17 +0200676 radeon_vm_set_pages(rdev, &ib, last_pde,
677 last_pt, count, incr,
678 R600_PTE_VALID);
Christian König2280ab52014-02-20 10:25:15 +0100679 }
680
681 count = 1;
682 last_pde = pde;
683 last_pt = pt;
684 } else {
685 ++count;
686 }
687 }
688
Christian König6d2f2942014-02-20 13:42:17 +0100689 if (count)
Christian König03f62ab2014-07-30 21:05:17 +0200690 radeon_vm_set_pages(rdev, &ib, last_pde, last_pt, count,
691 incr, R600_PTE_VALID);
Christian König2280ab52014-02-20 10:25:15 +0100692
Christian König6d2f2942014-02-20 13:42:17 +0100693 if (ib.length_dw != 0) {
Christian König03f62ab2014-07-30 21:05:17 +0200694 radeon_asic_vm_pad_ib(rdev, &ib);
Maarten Lankhorstf2c24b82014-04-02 17:14:48 +0200695
Christian König43ac8852014-11-19 14:01:27 +0100696 radeon_sync_resv(rdev, &ib.sync, pd->tbo.resv, true);
Christian Königcc6f3532014-07-30 21:05:18 +0200697 WARN_ON(ib.length_dw > ndw);
Michel Dänzer1538a9e2014-08-18 17:34:55 +0900698 r = radeon_ib_schedule(rdev, &ib, NULL, false);
Christian König6d2f2942014-02-20 13:42:17 +0100699 if (r) {
700 radeon_ib_free(rdev, &ib);
701 return r;
702 }
Christian Königad1a58a2014-11-19 14:01:24 +0100703 ib.fence->is_vm_update = true;
Christian König587cdda2014-11-19 14:01:23 +0100704 radeon_bo_fence(pd, ib.fence, false);
Christian König2280ab52014-02-20 10:25:15 +0100705 }
Christian König6d2f2942014-02-20 13:42:17 +0100706 radeon_ib_free(rdev, &ib);
Christian König2280ab52014-02-20 10:25:15 +0100707
708 return 0;
709}
710
711/**
Christian Königec3dbbc2014-05-10 12:17:55 +0200712 * radeon_vm_frag_ptes - add fragment information to PTEs
713 *
714 * @rdev: radeon_device pointer
715 * @ib: IB for the update
716 * @pe_start: first PTE to handle
717 * @pe_end: last PTE to handle
718 * @addr: addr those PTEs should point to
719 * @flags: hw mapping flags
720 *
721 * Global and local mutex must be locked!
722 */
723static void radeon_vm_frag_ptes(struct radeon_device *rdev,
724 struct radeon_ib *ib,
725 uint64_t pe_start, uint64_t pe_end,
726 uint64_t addr, uint32_t flags)
727{
728 /**
729 * The MC L1 TLB supports variable sized pages, based on a fragment
730 * field in the PTE. When this field is set to a non-zero value, page
731 * granularity is increased from 4KB to (1 << (12 + frag)). The PTE
732 * flags are considered valid for all PTEs within the fragment range
733 * and corresponding mappings are assumed to be physically contiguous.
734 *
735 * The L1 TLB can store a single PTE for the whole fragment,
736 * significantly increasing the space available for translation
737 * caching. This leads to large improvements in throughput when the
738 * TLB is under pressure.
739 *
740 * The L2 TLB distributes small and large fragments into two
741 * asymmetric partitions. The large fragment cache is significantly
742 * larger. Thus, we try to use large fragments wherever possible.
743 * Userspace can support this by aligning virtual base address and
744 * allocation size to the fragment size.
745 */
746
747 /* NI is optimized for 256KB fragments, SI and newer for 64KB */
748 uint64_t frag_flags = rdev->family == CHIP_CAYMAN ?
749 R600_PTE_FRAG_256KB : R600_PTE_FRAG_64KB;
750 uint64_t frag_align = rdev->family == CHIP_CAYMAN ? 0x200 : 0x80;
751
752 uint64_t frag_start = ALIGN(pe_start, frag_align);
753 uint64_t frag_end = pe_end & ~(frag_align - 1);
754
755 unsigned count;
756
757 /* system pages are non continuously */
758 if ((flags & R600_PTE_SYSTEM) || !(flags & R600_PTE_VALID) ||
759 (frag_start >= frag_end)) {
760
761 count = (pe_end - pe_start) / 8;
Christian König03f62ab2014-07-30 21:05:17 +0200762 radeon_vm_set_pages(rdev, ib, pe_start, addr, count,
763 RADEON_GPU_PAGE_SIZE, flags);
Christian Königec3dbbc2014-05-10 12:17:55 +0200764 return;
765 }
766
767 /* handle the 4K area at the beginning */
768 if (pe_start != frag_start) {
769 count = (frag_start - pe_start) / 8;
Christian König03f62ab2014-07-30 21:05:17 +0200770 radeon_vm_set_pages(rdev, ib, pe_start, addr, count,
771 RADEON_GPU_PAGE_SIZE, flags);
Christian Königec3dbbc2014-05-10 12:17:55 +0200772 addr += RADEON_GPU_PAGE_SIZE * count;
773 }
774
775 /* handle the area in the middle */
776 count = (frag_end - frag_start) / 8;
Christian König03f62ab2014-07-30 21:05:17 +0200777 radeon_vm_set_pages(rdev, ib, frag_start, addr, count,
778 RADEON_GPU_PAGE_SIZE, flags | frag_flags);
Christian Königec3dbbc2014-05-10 12:17:55 +0200779
780 /* handle the 4K area at the end */
781 if (frag_end != pe_end) {
782 addr += RADEON_GPU_PAGE_SIZE * count;
783 count = (pe_end - frag_end) / 8;
Christian König03f62ab2014-07-30 21:05:17 +0200784 radeon_vm_set_pages(rdev, ib, frag_end, addr, count,
785 RADEON_GPU_PAGE_SIZE, flags);
Christian Königec3dbbc2014-05-10 12:17:55 +0200786 }
787}
788
789/**
Christian König2280ab52014-02-20 10:25:15 +0100790 * radeon_vm_update_ptes - make sure that page tables are valid
791 *
792 * @rdev: radeon_device pointer
793 * @vm: requested vm
794 * @start: start of GPU address range
795 * @end: end of GPU address range
796 * @dst: destination address to map to
797 * @flags: mapping flags
798 *
799 * Update the page tables in the range @start - @end (cayman+).
800 *
801 * Global and local mutex must be locked!
802 */
Christian König44c4bd22014-11-27 14:48:43 +0100803static int radeon_vm_update_ptes(struct radeon_device *rdev,
804 struct radeon_vm *vm,
805 struct radeon_ib *ib,
806 uint64_t start, uint64_t end,
807 uint64_t dst, uint32_t flags)
Christian König2280ab52014-02-20 10:25:15 +0100808{
Christian König4510fb92014-06-05 23:56:50 -0400809 uint64_t mask = RADEON_VM_PTE_COUNT - 1;
Christian König2280ab52014-02-20 10:25:15 +0100810 uint64_t last_pte = ~0, last_dst = ~0;
811 unsigned count = 0;
812 uint64_t addr;
813
Christian König2280ab52014-02-20 10:25:15 +0100814 /* walk over the address space and update the page tables */
815 for (addr = start; addr < end; ) {
Christian König4510fb92014-06-05 23:56:50 -0400816 uint64_t pt_idx = addr >> radeon_vm_block_size;
Christian König37903b52014-05-30 15:21:16 +0200817 struct radeon_bo *pt = vm->page_tables[pt_idx].bo;
Christian König2280ab52014-02-20 10:25:15 +0100818 unsigned nptes;
819 uint64_t pte;
Christian König44c4bd22014-11-27 14:48:43 +0100820 int r;
Christian König2280ab52014-02-20 10:25:15 +0100821
Christian Königd1968e12014-11-19 14:01:28 +0100822 radeon_sync_resv(rdev, &ib->sync, pt->tbo.resv, true);
Christian König44c4bd22014-11-27 14:48:43 +0100823 r = reservation_object_reserve_shared(pt->tbo.resv);
824 if (r)
825 return r;
Christian König37903b52014-05-30 15:21:16 +0200826
Christian König2280ab52014-02-20 10:25:15 +0100827 if ((addr & ~mask) == (end & ~mask))
828 nptes = end - addr;
829 else
830 nptes = RADEON_VM_PTE_COUNT - (addr & mask);
831
Christian König37903b52014-05-30 15:21:16 +0200832 pte = radeon_bo_gpu_offset(pt);
Christian König2280ab52014-02-20 10:25:15 +0100833 pte += (addr & mask) * 8;
834
835 if ((last_pte + 8 * count) != pte) {
836
837 if (count) {
Christian Königec3dbbc2014-05-10 12:17:55 +0200838 radeon_vm_frag_ptes(rdev, ib, last_pte,
839 last_pte + 8 * count,
840 last_dst, flags);
Christian König2280ab52014-02-20 10:25:15 +0100841 }
842
843 count = nptes;
844 last_pte = pte;
845 last_dst = dst;
846 } else {
847 count += nptes;
848 }
849
850 addr += nptes;
851 dst += nptes * RADEON_GPU_PAGE_SIZE;
852 }
853
854 if (count) {
Christian Königec3dbbc2014-05-10 12:17:55 +0200855 radeon_vm_frag_ptes(rdev, ib, last_pte,
856 last_pte + 8 * count,
857 last_dst, flags);
Christian König2280ab52014-02-20 10:25:15 +0100858 }
Christian König44c4bd22014-11-27 14:48:43 +0100859
860 return 0;
Christian König2280ab52014-02-20 10:25:15 +0100861}
862
863/**
Christian König587cdda2014-11-19 14:01:23 +0100864 * radeon_vm_fence_pts - fence page tables after an update
865 *
866 * @vm: requested vm
867 * @start: start of GPU address range
868 * @end: end of GPU address range
869 * @fence: fence to use
870 *
871 * Fence the page tables in the range @start - @end (cayman+).
872 *
873 * Global and local mutex must be locked!
874 */
875static void radeon_vm_fence_pts(struct radeon_vm *vm,
876 uint64_t start, uint64_t end,
877 struct radeon_fence *fence)
878{
879 unsigned i;
880
881 start >>= radeon_vm_block_size;
882 end >>= radeon_vm_block_size;
883
884 for (i = start; i <= end; ++i)
Christian König44c4bd22014-11-27 14:48:43 +0100885 radeon_bo_fence(vm->page_tables[i].bo, fence, true);
Christian König587cdda2014-11-19 14:01:23 +0100886}
887
888/**
Christian König2280ab52014-02-20 10:25:15 +0100889 * radeon_vm_bo_update - map a bo into the vm page table
890 *
891 * @rdev: radeon_device pointer
892 * @vm: requested vm
893 * @bo: radeon buffer object
894 * @mem: ttm mem
895 *
896 * Fill in the page table entries for @bo (cayman+).
897 * Returns 0 for success, -EINVAL for failure.
898 *
Christian König529364e2014-02-20 19:33:15 +0100899 * Object have to be reserved and mutex must be locked!
Christian König2280ab52014-02-20 10:25:15 +0100900 */
901int radeon_vm_bo_update(struct radeon_device *rdev,
Christian König036bf462014-07-18 08:56:40 +0200902 struct radeon_bo_va *bo_va,
Christian König2280ab52014-02-20 10:25:15 +0100903 struct ttm_mem_reg *mem)
904{
Christian König036bf462014-07-18 08:56:40 +0200905 struct radeon_vm *vm = bo_va->vm;
Christian König2280ab52014-02-20 10:25:15 +0100906 struct radeon_ib ib;
Christian Königcc6f3532014-07-30 21:05:18 +0200907 unsigned nptes, ncmds, ndw;
Christian König2280ab52014-02-20 10:25:15 +0100908 uint64_t addr;
Christian Königcc6f3532014-07-30 21:05:18 +0200909 uint32_t flags;
Christian König2280ab52014-02-20 10:25:15 +0100910 int r;
911
Alex Deucher0aea5e42014-07-30 11:49:56 -0400912 if (!bo_va->it.start) {
Christian König2280ab52014-02-20 10:25:15 +0100913 dev_err(rdev->dev, "bo %p don't has a mapping in vm %p\n",
Christian König036bf462014-07-18 08:56:40 +0200914 bo_va->bo, vm);
Christian König2280ab52014-02-20 10:25:15 +0100915 return -EINVAL;
916 }
917
Christian Königf7a3db72014-11-27 14:48:44 +0100918 spin_lock(&vm->status_lock);
Christian Könige31ad962014-07-18 09:24:53 +0200919 list_del_init(&bo_va->vm_status);
Christian Königf7a3db72014-11-27 14:48:44 +0100920 spin_unlock(&vm->status_lock);
Christian König2280ab52014-02-20 10:25:15 +0100921
922 bo_va->flags &= ~RADEON_VM_PAGE_VALID;
923 bo_va->flags &= ~RADEON_VM_PAGE_SYSTEM;
Michel Dänzer02376d82014-07-17 19:01:08 +0900924 bo_va->flags &= ~RADEON_VM_PAGE_SNOOPED;
Christian Königf72a113a2014-08-07 09:36:00 +0200925 if (bo_va->bo && radeon_ttm_tt_is_readonly(bo_va->bo->tbo.ttm))
926 bo_va->flags &= ~RADEON_VM_PAGE_WRITEABLE;
927
Christian König2280ab52014-02-20 10:25:15 +0100928 if (mem) {
929 addr = mem->start << PAGE_SHIFT;
930 if (mem->mem_type != TTM_PL_SYSTEM) {
931 bo_va->flags |= RADEON_VM_PAGE_VALID;
Christian König2280ab52014-02-20 10:25:15 +0100932 }
933 if (mem->mem_type == TTM_PL_TT) {
934 bo_va->flags |= RADEON_VM_PAGE_SYSTEM;
Michel Dänzer02376d82014-07-17 19:01:08 +0900935 if (!(bo_va->bo->flags & (RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC)))
936 bo_va->flags |= RADEON_VM_PAGE_SNOOPED;
937
Christian König2280ab52014-02-20 10:25:15 +0100938 } else {
939 addr += rdev->vm_manager.vram_base_offset;
940 }
941 } else {
942 addr = 0;
Christian König2280ab52014-02-20 10:25:15 +0100943 }
944
Christian Könige31ad962014-07-18 09:24:53 +0200945 if (addr == bo_va->addr)
946 return 0;
947 bo_va->addr = addr;
948
Christian König2280ab52014-02-20 10:25:15 +0100949 trace_radeon_vm_bo_update(bo_va);
950
Alex Deucher0aea5e42014-07-30 11:49:56 -0400951 nptes = bo_va->it.last - bo_va->it.start + 1;
Christian König2280ab52014-02-20 10:25:15 +0100952
Christian Königcc6f3532014-07-30 21:05:18 +0200953 /* reserve space for one command every (1 << BLOCK_SIZE) entries
954 or 2k dwords (whatever is smaller) */
955 ncmds = (nptes >> min(radeon_vm_block_size, 11)) + 1;
956
Christian König2280ab52014-02-20 10:25:15 +0100957 /* padding, etc. */
958 ndw = 64;
959
Christian Königcc6f3532014-07-30 21:05:18 +0200960 flags = radeon_vm_page_flags(bo_va->flags);
961 if ((flags & R600_PTE_GART_MASK) == R600_PTE_GART_MASK) {
962 /* only copy commands needed */
963 ndw += ncmds * 7;
Christian König2280ab52014-02-20 10:25:15 +0100964
Christian Königcc6f3532014-07-30 21:05:18 +0200965 } else if (flags & R600_PTE_SYSTEM) {
966 /* header for write data commands */
967 ndw += ncmds * 4;
968
969 /* body of write data command */
970 ndw += nptes * 2;
971
972 } else {
973 /* set page commands needed */
974 ndw += ncmds * 10;
975
976 /* two extra commands for begin/end of fragment */
977 ndw += 2 * 10;
978 }
Christian König2280ab52014-02-20 10:25:15 +0100979
Christian König2280ab52014-02-20 10:25:15 +0100980 /* update too big for an IB */
981 if (ndw > 0xfffff)
982 return -ENOMEM;
983
984 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, ndw * 4);
985 if (r)
986 return r;
987 ib.length_dw = 0;
988
Christian Königd1968e12014-11-19 14:01:28 +0100989 if (!(bo_va->flags & RADEON_VM_PAGE_VALID)) {
990 unsigned i;
991
992 for (i = 0; i < RADEON_NUM_RINGS; ++i)
993 radeon_sync_fence(&ib.sync, vm->ids[i].last_id_use);
994 }
995
Christian König44c4bd22014-11-27 14:48:43 +0100996 r = radeon_vm_update_ptes(rdev, vm, &ib, bo_va->it.start,
997 bo_va->it.last + 1, addr,
998 radeon_vm_page_flags(bo_va->flags));
999 if (r) {
1000 radeon_ib_free(rdev, &ib);
1001 return r;
1002 }
Christian König2280ab52014-02-20 10:25:15 +01001003
Christian König03f62ab2014-07-30 21:05:17 +02001004 radeon_asic_vm_pad_ib(rdev, &ib);
Christian Königcc6f3532014-07-30 21:05:18 +02001005 WARN_ON(ib.length_dw > ndw);
1006
Michel Dänzer1538a9e2014-08-18 17:34:55 +09001007 r = radeon_ib_schedule(rdev, &ib, NULL, false);
Christian König2280ab52014-02-20 10:25:15 +01001008 if (r) {
1009 radeon_ib_free(rdev, &ib);
1010 return r;
1011 }
Christian Königad1a58a2014-11-19 14:01:24 +01001012 ib.fence->is_vm_update = true;
Christian König587cdda2014-11-19 14:01:23 +01001013 radeon_vm_fence_pts(vm, bo_va->it.start, bo_va->it.last + 1, ib.fence);
Christian König94214632014-11-19 14:01:26 +01001014 radeon_fence_unref(&bo_va->last_pt_update);
1015 bo_va->last_pt_update = radeon_fence_ref(ib.fence);
Christian König2280ab52014-02-20 10:25:15 +01001016 radeon_ib_free(rdev, &ib);
Christian König2280ab52014-02-20 10:25:15 +01001017
1018 return 0;
1019}
1020
1021/**
Christian König036bf462014-07-18 08:56:40 +02001022 * radeon_vm_clear_freed - clear freed BOs in the PT
1023 *
1024 * @rdev: radeon_device pointer
1025 * @vm: requested vm
1026 *
1027 * Make sure all freed BOs are cleared in the PT.
1028 * Returns 0 for success.
1029 *
1030 * PTs have to be reserved and mutex must be locked!
1031 */
1032int radeon_vm_clear_freed(struct radeon_device *rdev,
1033 struct radeon_vm *vm)
1034{
Christian Königf7a3db72014-11-27 14:48:44 +01001035 struct radeon_bo_va *bo_va;
Christian König036bf462014-07-18 08:56:40 +02001036 int r;
1037
Christian Königf7a3db72014-11-27 14:48:44 +01001038 spin_lock(&vm->status_lock);
1039 while (!list_empty(&vm->freed)) {
1040 bo_va = list_first_entry(&vm->freed,
1041 struct radeon_bo_va, vm_status);
1042 spin_unlock(&vm->status_lock);
1043
Christian König036bf462014-07-18 08:56:40 +02001044 r = radeon_vm_bo_update(rdev, bo_va, NULL);
Christian Königee26d832014-07-30 21:04:57 +02001045 radeon_bo_unref(&bo_va->bo);
Christian König94214632014-11-19 14:01:26 +01001046 radeon_fence_unref(&bo_va->last_pt_update);
Christian König036bf462014-07-18 08:56:40 +02001047 kfree(bo_va);
1048 if (r)
1049 return r;
Christian Königf7a3db72014-11-27 14:48:44 +01001050
1051 spin_lock(&vm->status_lock);
Christian König036bf462014-07-18 08:56:40 +02001052 }
Christian Königf7a3db72014-11-27 14:48:44 +01001053 spin_unlock(&vm->status_lock);
Christian König036bf462014-07-18 08:56:40 +02001054 return 0;
1055
1056}
1057
1058/**
Christian Könige31ad962014-07-18 09:24:53 +02001059 * radeon_vm_clear_invalids - clear invalidated BOs in the PT
1060 *
1061 * @rdev: radeon_device pointer
1062 * @vm: requested vm
1063 *
1064 * Make sure all invalidated BOs are cleared in the PT.
1065 * Returns 0 for success.
1066 *
1067 * PTs have to be reserved and mutex must be locked!
1068 */
1069int radeon_vm_clear_invalids(struct radeon_device *rdev,
1070 struct radeon_vm *vm)
1071{
Christian Königf7a3db72014-11-27 14:48:44 +01001072 struct radeon_bo_va *bo_va;
Christian Könige31ad962014-07-18 09:24:53 +02001073 int r;
1074
Christian Königf7a3db72014-11-27 14:48:44 +01001075 spin_lock(&vm->status_lock);
1076 while (!list_empty(&vm->invalidated)) {
1077 bo_va = list_first_entry(&vm->invalidated,
1078 struct radeon_bo_va, vm_status);
1079 spin_unlock(&vm->status_lock);
1080
Christian Könige31ad962014-07-18 09:24:53 +02001081 r = radeon_vm_bo_update(rdev, bo_va, NULL);
1082 if (r)
1083 return r;
Christian Königf7a3db72014-11-27 14:48:44 +01001084
1085 spin_lock(&vm->status_lock);
Christian Könige31ad962014-07-18 09:24:53 +02001086 }
Christian Königf7a3db72014-11-27 14:48:44 +01001087 spin_unlock(&vm->status_lock);
1088
Christian Könige31ad962014-07-18 09:24:53 +02001089 return 0;
1090}
1091
1092/**
Christian König2280ab52014-02-20 10:25:15 +01001093 * radeon_vm_bo_rmv - remove a bo to a specific vm
1094 *
1095 * @rdev: radeon_device pointer
1096 * @bo_va: requested bo_va
1097 *
1098 * Remove @bo_va->bo from the requested vm (cayman+).
Christian König2280ab52014-02-20 10:25:15 +01001099 *
1100 * Object have to be reserved!
1101 */
Christian König036bf462014-07-18 08:56:40 +02001102void radeon_vm_bo_rmv(struct radeon_device *rdev,
1103 struct radeon_bo_va *bo_va)
Christian König2280ab52014-02-20 10:25:15 +01001104{
Christian König036bf462014-07-18 08:56:40 +02001105 struct radeon_vm *vm = bo_va->vm;
Christian König2280ab52014-02-20 10:25:15 +01001106
Christian König2280ab52014-02-20 10:25:15 +01001107 list_del(&bo_va->bo_list);
1108
Christian König036bf462014-07-18 08:56:40 +02001109 mutex_lock(&vm->mutex);
Alex Deucher0aea5e42014-07-30 11:49:56 -04001110 interval_tree_remove(&bo_va->it, &vm->va);
Christian Königf7a3db72014-11-27 14:48:44 +01001111 spin_lock(&vm->status_lock);
Christian Könige31ad962014-07-18 09:24:53 +02001112 list_del(&bo_va->vm_status);
Christian König036bf462014-07-18 08:56:40 +02001113
Christian Könige31ad962014-07-18 09:24:53 +02001114 if (bo_va->addr) {
Christian Königee26d832014-07-30 21:04:57 +02001115 bo_va->bo = radeon_bo_ref(bo_va->bo);
Christian König036bf462014-07-18 08:56:40 +02001116 list_add(&bo_va->vm_status, &vm->freed);
1117 } else {
Christian König94214632014-11-19 14:01:26 +01001118 radeon_fence_unref(&bo_va->last_pt_update);
Christian König036bf462014-07-18 08:56:40 +02001119 kfree(bo_va);
1120 }
Christian Königf7a3db72014-11-27 14:48:44 +01001121 spin_unlock(&vm->status_lock);
Christian König036bf462014-07-18 08:56:40 +02001122
1123 mutex_unlock(&vm->mutex);
Christian König2280ab52014-02-20 10:25:15 +01001124}
1125
1126/**
1127 * radeon_vm_bo_invalidate - mark the bo as invalid
1128 *
1129 * @rdev: radeon_device pointer
1130 * @vm: requested vm
1131 * @bo: radeon buffer object
1132 *
1133 * Mark @bo as invalid (cayman+).
1134 */
1135void radeon_vm_bo_invalidate(struct radeon_device *rdev,
1136 struct radeon_bo *bo)
1137{
1138 struct radeon_bo_va *bo_va;
1139
1140 list_for_each_entry(bo_va, &bo->va, bo_list) {
Christian Könige31ad962014-07-18 09:24:53 +02001141 if (bo_va->addr) {
Christian Königf7a3db72014-11-27 14:48:44 +01001142 spin_lock(&bo_va->vm->status_lock);
Christian Könige31ad962014-07-18 09:24:53 +02001143 list_del(&bo_va->vm_status);
1144 list_add(&bo_va->vm_status, &bo_va->vm->invalidated);
Christian Königf7a3db72014-11-27 14:48:44 +01001145 spin_unlock(&bo_va->vm->status_lock);
Christian Könige31ad962014-07-18 09:24:53 +02001146 }
Christian König2280ab52014-02-20 10:25:15 +01001147 }
1148}
1149
1150/**
1151 * radeon_vm_init - initialize a vm instance
1152 *
1153 * @rdev: radeon_device pointer
1154 * @vm: requested vm
1155 *
1156 * Init @vm fields (cayman+).
1157 */
Christian König6d2f2942014-02-20 13:42:17 +01001158int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)
Christian König2280ab52014-02-20 10:25:15 +01001159{
Christian König1c89d272014-05-10 12:17:56 +02001160 const unsigned align = min(RADEON_VM_PTB_ALIGN_SIZE,
1161 RADEON_VM_PTE_COUNT * 8);
Christian König6d2f2942014-02-20 13:42:17 +01001162 unsigned pd_size, pd_entries, pts_size;
Christian König7c42bc12014-11-19 14:01:25 +01001163 int i, r;
Christian König6d2f2942014-02-20 13:42:17 +01001164
Christian Königcc9e67e2014-07-18 13:48:10 +02001165 vm->ib_bo_va = NULL;
Christian König7c42bc12014-11-19 14:01:25 +01001166 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
1167 vm->ids[i].id = 0;
1168 vm->ids[i].flushed_updates = NULL;
1169 vm->ids[i].last_id_use = NULL;
1170 }
Christian König2280ab52014-02-20 10:25:15 +01001171 mutex_init(&vm->mutex);
Alex Deucher0aea5e42014-07-30 11:49:56 -04001172 vm->va = RB_ROOT;
Christian Königf7a3db72014-11-27 14:48:44 +01001173 spin_lock_init(&vm->status_lock);
Christian Könige31ad962014-07-18 09:24:53 +02001174 INIT_LIST_HEAD(&vm->invalidated);
Christian König036bf462014-07-18 08:56:40 +02001175 INIT_LIST_HEAD(&vm->freed);
Christian König6d2f2942014-02-20 13:42:17 +01001176
1177 pd_size = radeon_vm_directory_size(rdev);
1178 pd_entries = radeon_vm_num_pdes(rdev);
1179
1180 /* allocate page table array */
1181 pts_size = pd_entries * sizeof(struct radeon_vm_pt);
1182 vm->page_tables = kzalloc(pts_size, GFP_KERNEL);
1183 if (vm->page_tables == NULL) {
1184 DRM_ERROR("Cannot allocate memory for page table array\n");
1185 return -ENOMEM;
1186 }
1187
Christian König7dae77f2014-07-02 21:28:10 +02001188 r = radeon_bo_create(rdev, pd_size, align, true,
Michel Dänzer02376d82014-07-17 19:01:08 +09001189 RADEON_GEM_DOMAIN_VRAM, 0, NULL,
Maarten Lankhorst831b6962014-09-18 14:11:56 +02001190 NULL, &vm->page_directory);
Christian König6d2f2942014-02-20 13:42:17 +01001191 if (r)
1192 return r;
1193
1194 r = radeon_vm_clear_bo(rdev, vm->page_directory);
1195 if (r) {
1196 radeon_bo_unref(&vm->page_directory);
1197 vm->page_directory = NULL;
1198 return r;
1199 }
1200
1201 return 0;
Christian König2280ab52014-02-20 10:25:15 +01001202}
1203
1204/**
1205 * radeon_vm_fini - tear down a vm instance
1206 *
1207 * @rdev: radeon_device pointer
1208 * @vm: requested vm
1209 *
1210 * Tear down @vm (cayman+).
1211 * Unbind the VM and remove all bos from the vm bo list
1212 */
1213void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm)
1214{
1215 struct radeon_bo_va *bo_va, *tmp;
Christian König6d2f2942014-02-20 13:42:17 +01001216 int i, r;
Christian König2280ab52014-02-20 10:25:15 +01001217
Alex Deucher0aea5e42014-07-30 11:49:56 -04001218 if (!RB_EMPTY_ROOT(&vm->va)) {
Christian König2280ab52014-02-20 10:25:15 +01001219 dev_err(rdev->dev, "still active bo inside vm\n");
1220 }
Alex Deucher0aea5e42014-07-30 11:49:56 -04001221 rbtree_postorder_for_each_entry_safe(bo_va, tmp, &vm->va, it.rb) {
1222 interval_tree_remove(&bo_va->it, &vm->va);
Christian König2280ab52014-02-20 10:25:15 +01001223 r = radeon_bo_reserve(bo_va->bo, false);
1224 if (!r) {
1225 list_del_init(&bo_va->bo_list);
1226 radeon_bo_unreserve(bo_va->bo);
Christian König94214632014-11-19 14:01:26 +01001227 radeon_fence_unref(&bo_va->last_pt_update);
Christian König2280ab52014-02-20 10:25:15 +01001228 kfree(bo_va);
1229 }
1230 }
Christian Königee26d832014-07-30 21:04:57 +02001231 list_for_each_entry_safe(bo_va, tmp, &vm->freed, vm_status) {
1232 radeon_bo_unref(&bo_va->bo);
Christian König94214632014-11-19 14:01:26 +01001233 radeon_fence_unref(&bo_va->last_pt_update);
Christian König036bf462014-07-18 08:56:40 +02001234 kfree(bo_va);
Christian Königee26d832014-07-30 21:04:57 +02001235 }
Christian König6d2f2942014-02-20 13:42:17 +01001236
1237 for (i = 0; i < radeon_vm_num_pdes(rdev); i++)
1238 radeon_bo_unref(&vm->page_tables[i].bo);
1239 kfree(vm->page_tables);
1240
1241 radeon_bo_unref(&vm->page_directory);
1242
Christian König7c42bc12014-11-19 14:01:25 +01001243 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
1244 radeon_fence_unref(&vm->ids[i].flushed_updates);
1245 radeon_fence_unref(&vm->ids[i].last_id_use);
1246 }
Christian König6d2f2942014-02-20 13:42:17 +01001247
1248 mutex_destroy(&vm->mutex);
Christian König2280ab52014-02-20 10:25:15 +01001249}