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Wolfram Sangcba59c22018-06-11 23:49:35 +09001// SPDX-License-Identifier: GPL-2.0
Vladimir Barinovb10690d2016-08-31 13:02:39 +03002/*
Vladimir Barinovc77c9752016-11-03 21:04:54 +03003 * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
Vladimir Barinovb10690d2016-08-31 13:02:39 +03004 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
Vladimir Barinovb10690d2016-08-31 13:02:39 +03007 */
8
9/dts-v1/;
Geert Uytterhoeven052e99d2019-12-17 19:38:37 +010010#include "r8a77951.dtsi"
Geert Uytterhoeven253ed042017-04-28 14:58:44 +020011#include "ulcb.dtsi"
Vladimir Barinovb10690d2016-08-31 13:02:39 +030012
13/ {
Geert Uytterhoeven052e99d2019-12-17 19:38:37 +010014 model = "Renesas H3ULCB board based on r8a77951";
Vladimir Barinovb10690d2016-08-31 13:02:39 +030015 compatible = "renesas,h3ulcb", "renesas,r8a7795";
16
Vladimir Barinovb10690d2016-08-31 13:02:39 +030017 memory@48000000 {
18 device_type = "memory";
19 /* first 128MB is reserved for secure area. */
20 reg = <0x0 0x48000000 0x0 0x38000000>;
21 };
Vladimir Barinov0e3886a2016-09-02 19:24:58 +030022
Vladimir Barinova262d662017-01-26 18:13:52 +030023 memory@500000000 {
24 device_type = "memory";
25 reg = <0x5 0x00000000 0x0 0x40000000>;
26 };
27
28 memory@600000000 {
29 device_type = "memory";
30 reg = <0x6 0x00000000 0x0 0x40000000>;
31 };
32
33 memory@700000000 {
34 device_type = "memory";
35 reg = <0x7 0x00000000 0x0 0x40000000>;
36 };
Vladimir Barinov15907f12016-08-31 13:04:03 +030037};
Vladimir Barinov6d81daf2017-07-07 05:37:14 +030038
39&du {
40 clocks = <&cpg CPG_MOD 724>,
41 <&cpg CPG_MOD 723>,
42 <&cpg CPG_MOD 722>,
43 <&cpg CPG_MOD 721>,
Vladimir Barinov6d81daf2017-07-07 05:37:14 +030044 <&versaclock5 1>,
45 <&versaclock5 3>,
46 <&versaclock5 4>,
47 <&versaclock5 2>;
Laurent Pinchart58e8ed22018-06-05 12:51:06 +030048 clock-names = "du.0", "du.1", "du.2", "du.3",
Vladimir Barinov6d81daf2017-07-07 05:37:14 +030049 "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
50};