Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * cpufreq driver for Enhanced SpeedStep, as found in Intel's Pentium |
| 3 | * M (part of the Centrino chipset). |
| 4 | * |
| 5 | * Despite the "SpeedStep" in the name, this is almost entirely unlike |
| 6 | * traditional SpeedStep. |
| 7 | * |
| 8 | * Modelled on speedstep.c |
| 9 | * |
| 10 | * Copyright (C) 2003 Jeremy Fitzhardinge <jeremy@goop.org> |
| 11 | * |
| 12 | * WARNING WARNING WARNING |
| 13 | * |
| 14 | * This driver manipulates the PERF_CTL MSR, which is only somewhat |
| 15 | * documented. While it seems to work on my laptop, it has not been |
| 16 | * tested anywhere else, and it may not work for you, do strange |
| 17 | * things or simply crash. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/cpufreq.h> |
| 24 | #include <linux/config.h> |
Tim Schmielau | 4e57b68 | 2005-10-30 15:03:48 -0800 | [diff] [blame] | 25 | #include <linux/sched.h> /* current */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <linux/delay.h> |
| 27 | #include <linux/compiler.h> |
| 28 | |
| 29 | #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI |
| 30 | #include <linux/acpi.h> |
| 31 | #include <acpi/processor.h> |
| 32 | #endif |
| 33 | |
| 34 | #include <asm/msr.h> |
| 35 | #include <asm/processor.h> |
| 36 | #include <asm/cpufeature.h> |
| 37 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #define PFX "speedstep-centrino: " |
| 39 | #define MAINTAINER "Jeremy Fitzhardinge <jeremy@goop.org>" |
| 40 | |
| 41 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-centrino", msg) |
| 42 | |
| 43 | |
| 44 | struct cpu_id |
| 45 | { |
| 46 | __u8 x86; /* CPU family */ |
| 47 | __u8 x86_model; /* model */ |
| 48 | __u8 x86_mask; /* stepping */ |
| 49 | }; |
| 50 | |
| 51 | enum { |
| 52 | CPU_BANIAS, |
| 53 | CPU_DOTHAN_A1, |
| 54 | CPU_DOTHAN_A2, |
| 55 | CPU_DOTHAN_B0, |
Dave Jones | 8282864 | 2005-05-31 19:03:43 -0700 | [diff] [blame] | 56 | CPU_MP4HT_D0, |
| 57 | CPU_MP4HT_E0, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | }; |
| 59 | |
| 60 | static const struct cpu_id cpu_ids[] = { |
| 61 | [CPU_BANIAS] = { 6, 9, 5 }, |
| 62 | [CPU_DOTHAN_A1] = { 6, 13, 1 }, |
| 63 | [CPU_DOTHAN_A2] = { 6, 13, 2 }, |
| 64 | [CPU_DOTHAN_B0] = { 6, 13, 6 }, |
Dave Jones | 8282864 | 2005-05-31 19:03:43 -0700 | [diff] [blame] | 65 | [CPU_MP4HT_D0] = {15, 3, 4 }, |
| 66 | [CPU_MP4HT_E0] = {15, 4, 1 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | }; |
Tobias Klauser | 38e548e | 2005-11-07 00:58:31 -0800 | [diff] [blame] | 68 | #define N_IDS ARRAY_SIZE(cpu_ids) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | |
| 70 | struct cpu_model |
| 71 | { |
| 72 | const struct cpu_id *cpu_id; |
| 73 | const char *model_name; |
| 74 | unsigned max_freq; /* max clock in kHz */ |
| 75 | |
| 76 | struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */ |
| 77 | }; |
| 78 | static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, const struct cpu_id *x); |
| 79 | |
| 80 | /* Operating points for current CPU */ |
| 81 | static struct cpu_model *centrino_model[NR_CPUS]; |
| 82 | static const struct cpu_id *centrino_cpu[NR_CPUS]; |
| 83 | |
| 84 | static struct cpufreq_driver centrino_driver; |
| 85 | |
| 86 | #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE |
| 87 | |
| 88 | /* Computes the correct form for IA32_PERF_CTL MSR for a particular |
| 89 | frequency/voltage operating point; frequency in MHz, volts in mV. |
| 90 | This is stored as "index" in the structure. */ |
| 91 | #define OP(mhz, mv) \ |
| 92 | { \ |
| 93 | .frequency = (mhz) * 1000, \ |
| 94 | .index = (((mhz)/100) << 8) | ((mv - 700) / 16) \ |
| 95 | } |
| 96 | |
| 97 | /* |
| 98 | * These voltage tables were derived from the Intel Pentium M |
| 99 | * datasheet, document 25261202.pdf, Table 5. I have verified they |
| 100 | * are consistent with my IBM ThinkPad X31, which has a 1.3GHz Pentium |
| 101 | * M. |
| 102 | */ |
| 103 | |
| 104 | /* Ultra Low Voltage Intel Pentium M processor 900MHz (Banias) */ |
| 105 | static struct cpufreq_frequency_table banias_900[] = |
| 106 | { |
| 107 | OP(600, 844), |
| 108 | OP(800, 988), |
| 109 | OP(900, 1004), |
| 110 | { .frequency = CPUFREQ_TABLE_END } |
| 111 | }; |
| 112 | |
| 113 | /* Ultra Low Voltage Intel Pentium M processor 1000MHz (Banias) */ |
| 114 | static struct cpufreq_frequency_table banias_1000[] = |
| 115 | { |
| 116 | OP(600, 844), |
| 117 | OP(800, 972), |
| 118 | OP(900, 988), |
| 119 | OP(1000, 1004), |
| 120 | { .frequency = CPUFREQ_TABLE_END } |
| 121 | }; |
| 122 | |
| 123 | /* Low Voltage Intel Pentium M processor 1.10GHz (Banias) */ |
| 124 | static struct cpufreq_frequency_table banias_1100[] = |
| 125 | { |
| 126 | OP( 600, 956), |
| 127 | OP( 800, 1020), |
| 128 | OP( 900, 1100), |
| 129 | OP(1000, 1164), |
| 130 | OP(1100, 1180), |
| 131 | { .frequency = CPUFREQ_TABLE_END } |
| 132 | }; |
| 133 | |
| 134 | |
| 135 | /* Low Voltage Intel Pentium M processor 1.20GHz (Banias) */ |
| 136 | static struct cpufreq_frequency_table banias_1200[] = |
| 137 | { |
| 138 | OP( 600, 956), |
| 139 | OP( 800, 1004), |
| 140 | OP( 900, 1020), |
| 141 | OP(1000, 1100), |
| 142 | OP(1100, 1164), |
| 143 | OP(1200, 1180), |
| 144 | { .frequency = CPUFREQ_TABLE_END } |
| 145 | }; |
| 146 | |
| 147 | /* Intel Pentium M processor 1.30GHz (Banias) */ |
| 148 | static struct cpufreq_frequency_table banias_1300[] = |
| 149 | { |
| 150 | OP( 600, 956), |
| 151 | OP( 800, 1260), |
| 152 | OP(1000, 1292), |
| 153 | OP(1200, 1356), |
| 154 | OP(1300, 1388), |
| 155 | { .frequency = CPUFREQ_TABLE_END } |
| 156 | }; |
| 157 | |
| 158 | /* Intel Pentium M processor 1.40GHz (Banias) */ |
| 159 | static struct cpufreq_frequency_table banias_1400[] = |
| 160 | { |
| 161 | OP( 600, 956), |
| 162 | OP( 800, 1180), |
| 163 | OP(1000, 1308), |
| 164 | OP(1200, 1436), |
| 165 | OP(1400, 1484), |
| 166 | { .frequency = CPUFREQ_TABLE_END } |
| 167 | }; |
| 168 | |
| 169 | /* Intel Pentium M processor 1.50GHz (Banias) */ |
| 170 | static struct cpufreq_frequency_table banias_1500[] = |
| 171 | { |
| 172 | OP( 600, 956), |
| 173 | OP( 800, 1116), |
| 174 | OP(1000, 1228), |
| 175 | OP(1200, 1356), |
| 176 | OP(1400, 1452), |
| 177 | OP(1500, 1484), |
| 178 | { .frequency = CPUFREQ_TABLE_END } |
| 179 | }; |
| 180 | |
| 181 | /* Intel Pentium M processor 1.60GHz (Banias) */ |
| 182 | static struct cpufreq_frequency_table banias_1600[] = |
| 183 | { |
| 184 | OP( 600, 956), |
| 185 | OP( 800, 1036), |
| 186 | OP(1000, 1164), |
| 187 | OP(1200, 1276), |
| 188 | OP(1400, 1420), |
| 189 | OP(1600, 1484), |
| 190 | { .frequency = CPUFREQ_TABLE_END } |
| 191 | }; |
| 192 | |
| 193 | /* Intel Pentium M processor 1.70GHz (Banias) */ |
| 194 | static struct cpufreq_frequency_table banias_1700[] = |
| 195 | { |
| 196 | OP( 600, 956), |
| 197 | OP( 800, 1004), |
| 198 | OP(1000, 1116), |
| 199 | OP(1200, 1228), |
| 200 | OP(1400, 1308), |
| 201 | OP(1700, 1484), |
| 202 | { .frequency = CPUFREQ_TABLE_END } |
| 203 | }; |
| 204 | #undef OP |
| 205 | |
| 206 | #define _BANIAS(cpuid, max, name) \ |
| 207 | { .cpu_id = cpuid, \ |
| 208 | .model_name = "Intel(R) Pentium(R) M processor " name "MHz", \ |
| 209 | .max_freq = (max)*1000, \ |
| 210 | .op_points = banias_##max, \ |
| 211 | } |
| 212 | #define BANIAS(max) _BANIAS(&cpu_ids[CPU_BANIAS], max, #max) |
| 213 | |
| 214 | /* CPU models, their operating frequency range, and freq/voltage |
| 215 | operating points */ |
| 216 | static struct cpu_model models[] = |
| 217 | { |
| 218 | _BANIAS(&cpu_ids[CPU_BANIAS], 900, " 900"), |
| 219 | BANIAS(1000), |
| 220 | BANIAS(1100), |
| 221 | BANIAS(1200), |
| 222 | BANIAS(1300), |
| 223 | BANIAS(1400), |
| 224 | BANIAS(1500), |
| 225 | BANIAS(1600), |
| 226 | BANIAS(1700), |
| 227 | |
| 228 | /* NULL model_name is a wildcard */ |
| 229 | { &cpu_ids[CPU_DOTHAN_A1], NULL, 0, NULL }, |
| 230 | { &cpu_ids[CPU_DOTHAN_A2], NULL, 0, NULL }, |
| 231 | { &cpu_ids[CPU_DOTHAN_B0], NULL, 0, NULL }, |
Dave Jones | 8282864 | 2005-05-31 19:03:43 -0700 | [diff] [blame] | 232 | { &cpu_ids[CPU_MP4HT_D0], NULL, 0, NULL }, |
| 233 | { &cpu_ids[CPU_MP4HT_E0], NULL, 0, NULL }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | |
| 235 | { NULL, } |
| 236 | }; |
| 237 | #undef _BANIAS |
| 238 | #undef BANIAS |
| 239 | |
| 240 | static int centrino_cpu_init_table(struct cpufreq_policy *policy) |
| 241 | { |
| 242 | struct cpuinfo_x86 *cpu = &cpu_data[policy->cpu]; |
| 243 | struct cpu_model *model; |
| 244 | |
| 245 | for(model = models; model->cpu_id != NULL; model++) |
| 246 | if (centrino_verify_cpu_id(cpu, model->cpu_id) && |
| 247 | (model->model_name == NULL || |
| 248 | strcmp(cpu->x86_model_id, model->model_name) == 0)) |
| 249 | break; |
| 250 | |
| 251 | if (model->cpu_id == NULL) { |
| 252 | /* No match at all */ |
| 253 | dprintk(KERN_INFO PFX "no support for CPU model \"%s\": " |
| 254 | "send /proc/cpuinfo to " MAINTAINER "\n", |
| 255 | cpu->x86_model_id); |
| 256 | return -ENOENT; |
| 257 | } |
| 258 | |
| 259 | if (model->op_points == NULL) { |
| 260 | /* Matched a non-match */ |
Dave Jones | 52c18fd | 2005-09-01 11:01:02 -0700 | [diff] [blame] | 261 | dprintk(KERN_INFO PFX "no table support for CPU model \"%s\"\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 262 | cpu->x86_model_id); |
| 263 | #ifndef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI |
| 264 | dprintk(KERN_INFO PFX "try compiling with CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI enabled\n"); |
| 265 | #endif |
| 266 | return -ENOENT; |
| 267 | } |
| 268 | |
| 269 | centrino_model[policy->cpu] = model; |
| 270 | |
| 271 | dprintk("found \"%s\": max frequency: %dkHz\n", |
| 272 | model->model_name, model->max_freq); |
| 273 | |
| 274 | return 0; |
| 275 | } |
| 276 | |
| 277 | #else |
| 278 | static inline int centrino_cpu_init_table(struct cpufreq_policy *policy) { return -ENODEV; } |
| 279 | #endif /* CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE */ |
| 280 | |
| 281 | static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, const struct cpu_id *x) |
| 282 | { |
| 283 | if ((c->x86 == x->x86) && |
| 284 | (c->x86_model == x->x86_model) && |
| 285 | (c->x86_mask == x->x86_mask)) |
| 286 | return 1; |
| 287 | return 0; |
| 288 | } |
| 289 | |
| 290 | /* To be called only after centrino_model is initialized */ |
| 291 | static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe) |
| 292 | { |
| 293 | int i; |
| 294 | |
| 295 | /* |
| 296 | * Extract clock in kHz from PERF_CTL value |
| 297 | * for centrino, as some DSDTs are buggy. |
| 298 | * Ideally, this can be done using the acpi_data structure. |
| 299 | */ |
| 300 | if ((centrino_cpu[cpu] == &cpu_ids[CPU_BANIAS]) || |
| 301 | (centrino_cpu[cpu] == &cpu_ids[CPU_DOTHAN_A1]) || |
| 302 | (centrino_cpu[cpu] == &cpu_ids[CPU_DOTHAN_B0])) { |
| 303 | msr = (msr >> 8) & 0xff; |
| 304 | return msr * 100000; |
| 305 | } |
| 306 | |
| 307 | if ((!centrino_model[cpu]) || (!centrino_model[cpu]->op_points)) |
| 308 | return 0; |
| 309 | |
| 310 | msr &= 0xffff; |
| 311 | for (i=0;centrino_model[cpu]->op_points[i].frequency != CPUFREQ_TABLE_END; i++) { |
| 312 | if (msr == centrino_model[cpu]->op_points[i].index) |
| 313 | return centrino_model[cpu]->op_points[i].frequency; |
| 314 | } |
| 315 | if (failsafe) |
| 316 | return centrino_model[cpu]->op_points[i-1].frequency; |
| 317 | else |
| 318 | return 0; |
| 319 | } |
| 320 | |
| 321 | /* Return the current CPU frequency in kHz */ |
| 322 | static unsigned int get_cur_freq(unsigned int cpu) |
| 323 | { |
| 324 | unsigned l, h; |
| 325 | unsigned clock_freq; |
| 326 | cpumask_t saved_mask; |
| 327 | |
| 328 | saved_mask = current->cpus_allowed; |
| 329 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); |
| 330 | if (smp_processor_id() != cpu) |
| 331 | return 0; |
| 332 | |
| 333 | rdmsr(MSR_IA32_PERF_STATUS, l, h); |
| 334 | clock_freq = extract_clock(l, cpu, 0); |
| 335 | |
| 336 | if (unlikely(clock_freq == 0)) { |
| 337 | /* |
| 338 | * On some CPUs, we can see transient MSR values (which are |
| 339 | * not present in _PSS), while CPU is doing some automatic |
| 340 | * P-state transition (like TM2). Get the last freq set |
| 341 | * in PERF_CTL. |
| 342 | */ |
| 343 | rdmsr(MSR_IA32_PERF_CTL, l, h); |
| 344 | clock_freq = extract_clock(l, cpu, 1); |
| 345 | } |
| 346 | |
| 347 | set_cpus_allowed(current, saved_mask); |
| 348 | return clock_freq; |
| 349 | } |
| 350 | |
| 351 | |
| 352 | #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI |
| 353 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 354 | static struct acpi_processor_performance *acpi_perf_data[NR_CPUS]; |
| 355 | |
| 356 | /* |
| 357 | * centrino_cpu_early_init_acpi - Do the preregistering with ACPI P-States |
| 358 | * library |
| 359 | * |
| 360 | * Before doing the actual init, we need to do _PSD related setup whenever |
| 361 | * supported by the BIOS. These are handled by this early_init routine. |
| 362 | */ |
| 363 | static int centrino_cpu_early_init_acpi(void) |
| 364 | { |
| 365 | unsigned int i, j; |
| 366 | struct acpi_processor_performance *data; |
| 367 | |
| 368 | for_each_cpu(i) { |
| 369 | data = kzalloc(sizeof(struct acpi_processor_performance), |
| 370 | GFP_KERNEL); |
| 371 | if (!data) { |
| 372 | for_each_cpu(j) { |
| 373 | kfree(acpi_perf_data[j]); |
| 374 | acpi_perf_data[j] = NULL; |
| 375 | } |
| 376 | return (-ENOMEM); |
| 377 | } |
| 378 | acpi_perf_data[i] = data; |
| 379 | } |
| 380 | |
| 381 | acpi_processor_preregister_performance(acpi_perf_data); |
| 382 | return 0; |
| 383 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | |
| 385 | /* |
| 386 | * centrino_cpu_init_acpi - register with ACPI P-States library |
| 387 | * |
| 388 | * Register with the ACPI P-States library (part of drivers/acpi/processor.c) |
| 389 | * in order to determine correct frequency and voltage pairings by reading |
| 390 | * the _PSS of the ACPI DSDT or SSDT tables. |
| 391 | */ |
| 392 | static int centrino_cpu_init_acpi(struct cpufreq_policy *policy) |
| 393 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | unsigned long cur_freq; |
| 395 | int result = 0, i; |
| 396 | unsigned int cpu = policy->cpu; |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 397 | struct acpi_processor_performance *p; |
| 398 | |
| 399 | p = acpi_perf_data[cpu]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | /* register with ACPI core */ |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 402 | if (acpi_processor_register_performance(p, cpu)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | dprintk(KERN_INFO PFX "obtaining ACPI data failed\n"); |
| 404 | return -EIO; |
| 405 | } |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 406 | policy->cpus = p->shared_cpu_map; |
| 407 | policy->shared_type = p->shared_type; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | |
| 409 | /* verify the acpi_data */ |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 410 | if (p->state_count <= 1) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 411 | dprintk("No P-States\n"); |
| 412 | result = -ENODEV; |
| 413 | goto err_unreg; |
| 414 | } |
| 415 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 416 | if ((p->control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) || |
| 417 | (p->status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 418 | dprintk("Invalid control/status registers (%x - %x)\n", |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 419 | p->control_register.space_id, p->status_register.space_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | result = -EIO; |
| 421 | goto err_unreg; |
| 422 | } |
| 423 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 424 | for (i=0; i<p->state_count; i++) { |
| 425 | if (p->states[i].control != p->states[i].status) { |
Mika Kukkonen | 123411f | 2005-08-07 23:13:00 +0300 | [diff] [blame] | 426 | dprintk("Different control (%llu) and status values (%llu)\n", |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 427 | p->states[i].control, p->states[i].status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 428 | result = -EINVAL; |
| 429 | goto err_unreg; |
| 430 | } |
| 431 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 432 | if (!p->states[i].core_frequency) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | dprintk("Zero core frequency for state %u\n", i); |
| 434 | result = -EINVAL; |
| 435 | goto err_unreg; |
| 436 | } |
| 437 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 438 | if (p->states[i].core_frequency > p->states[0].core_frequency) { |
Mika Kukkonen | 123411f | 2005-08-07 23:13:00 +0300 | [diff] [blame] | 439 | dprintk("P%u has larger frequency (%llu) than P0 (%llu), skipping\n", i, |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 440 | p->states[i].core_frequency, p->states[0].core_frequency); |
| 441 | p->states[i].core_frequency = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | continue; |
| 443 | } |
| 444 | } |
| 445 | |
Dave Jones | bfdc708 | 2005-10-20 15:16:15 -0700 | [diff] [blame] | 446 | centrino_model[cpu] = kzalloc(sizeof(struct cpu_model), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | if (!centrino_model[cpu]) { |
| 448 | result = -ENOMEM; |
| 449 | goto err_unreg; |
| 450 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | |
| 452 | centrino_model[cpu]->model_name=NULL; |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 453 | centrino_model[cpu]->max_freq = p->states[0].core_frequency * 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | centrino_model[cpu]->op_points = kmalloc(sizeof(struct cpufreq_frequency_table) * |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 455 | (p->state_count + 1), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | if (!centrino_model[cpu]->op_points) { |
| 457 | result = -ENOMEM; |
| 458 | goto err_kfree; |
| 459 | } |
| 460 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 461 | for (i=0; i<p->state_count; i++) { |
| 462 | centrino_model[cpu]->op_points[i].index = p->states[i].control; |
| 463 | centrino_model[cpu]->op_points[i].frequency = p->states[i].core_frequency * 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | dprintk("adding state %i with frequency %u and control value %04x\n", |
| 465 | i, centrino_model[cpu]->op_points[i].frequency, centrino_model[cpu]->op_points[i].index); |
| 466 | } |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 467 | centrino_model[cpu]->op_points[p->state_count].frequency = CPUFREQ_TABLE_END; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | |
| 469 | cur_freq = get_cur_freq(cpu); |
| 470 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 471 | for (i=0; i<p->state_count; i++) { |
| 472 | if (!p->states[i].core_frequency) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | dprintk("skipping state %u\n", i); |
| 474 | centrino_model[cpu]->op_points[i].frequency = CPUFREQ_ENTRY_INVALID; |
| 475 | continue; |
| 476 | } |
| 477 | |
| 478 | if (extract_clock(centrino_model[cpu]->op_points[i].index, cpu, 0) != |
| 479 | (centrino_model[cpu]->op_points[i].frequency)) { |
| 480 | dprintk("Invalid encoded frequency (%u vs. %u)\n", |
| 481 | extract_clock(centrino_model[cpu]->op_points[i].index, cpu, 0), |
| 482 | centrino_model[cpu]->op_points[i].frequency); |
| 483 | result = -EINVAL; |
| 484 | goto err_kfree_all; |
| 485 | } |
| 486 | |
| 487 | if (cur_freq == centrino_model[cpu]->op_points[i].frequency) |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 488 | p->state = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | } |
| 490 | |
| 491 | /* notify BIOS that we exist */ |
| 492 | acpi_processor_notify_smm(THIS_MODULE); |
| 493 | |
| 494 | return 0; |
| 495 | |
| 496 | err_kfree_all: |
| 497 | kfree(centrino_model[cpu]->op_points); |
| 498 | err_kfree: |
| 499 | kfree(centrino_model[cpu]); |
| 500 | err_unreg: |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 501 | acpi_processor_unregister_performance(p, cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | dprintk(KERN_INFO PFX "invalid ACPI data\n"); |
| 503 | return (result); |
| 504 | } |
| 505 | #else |
| 506 | static inline int centrino_cpu_init_acpi(struct cpufreq_policy *policy) { return -ENODEV; } |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 507 | static inline int centrino_cpu_early_init_acpi(void) { return 0; } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 508 | #endif |
| 509 | |
| 510 | static int centrino_cpu_init(struct cpufreq_policy *policy) |
| 511 | { |
| 512 | struct cpuinfo_x86 *cpu = &cpu_data[policy->cpu]; |
| 513 | unsigned freq; |
| 514 | unsigned l, h; |
| 515 | int ret; |
| 516 | int i; |
Andi Kleen | 152bf8c | 2006-01-11 22:42:48 +0100 | [diff] [blame] | 517 | struct cpuinfo_x86 *c = &cpu_data[policy->cpu]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 518 | |
| 519 | /* Only Intel makes Enhanced Speedstep-capable CPUs */ |
| 520 | if (cpu->x86_vendor != X86_VENDOR_INTEL || !cpu_has(cpu, X86_FEATURE_EST)) |
| 521 | return -ENODEV; |
| 522 | |
Andi Kleen | 152bf8c | 2006-01-11 22:42:48 +0100 | [diff] [blame] | 523 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | centrino_driver.flags |= CPUFREQ_CONST_LOOPS; |
| 525 | } |
| 526 | |
| 527 | if (centrino_cpu_init_acpi(policy)) { |
| 528 | if (policy->cpu != 0) |
| 529 | return -ENODEV; |
| 530 | |
Venkatesh Pallipadi | f914be7 | 2005-08-29 13:54:55 -0700 | [diff] [blame] | 531 | for (i = 0; i < N_IDS; i++) |
| 532 | if (centrino_verify_cpu_id(cpu, &cpu_ids[i])) |
| 533 | break; |
| 534 | |
| 535 | if (i != N_IDS) |
| 536 | centrino_cpu[policy->cpu] = &cpu_ids[i]; |
| 537 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | if (!centrino_cpu[policy->cpu]) { |
| 539 | dprintk(KERN_INFO PFX "found unsupported CPU with " |
| 540 | "Enhanced SpeedStep: send /proc/cpuinfo to " |
| 541 | MAINTAINER "\n"); |
| 542 | return -ENODEV; |
| 543 | } |
| 544 | |
| 545 | if (centrino_cpu_init_table(policy)) { |
| 546 | return -ENODEV; |
| 547 | } |
| 548 | } |
| 549 | |
| 550 | /* Check to see if Enhanced SpeedStep is enabled, and try to |
| 551 | enable it if not. */ |
| 552 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); |
| 553 | |
| 554 | if (!(l & (1<<16))) { |
| 555 | l |= (1<<16); |
| 556 | dprintk("trying to enable Enhanced SpeedStep (%x)\n", l); |
| 557 | wrmsr(MSR_IA32_MISC_ENABLE, l, h); |
| 558 | |
| 559 | /* check to see if it stuck */ |
| 560 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); |
| 561 | if (!(l & (1<<16))) { |
| 562 | printk(KERN_INFO PFX "couldn't enable Enhanced SpeedStep\n"); |
| 563 | return -ENODEV; |
| 564 | } |
| 565 | } |
| 566 | |
| 567 | freq = get_cur_freq(policy->cpu); |
| 568 | |
| 569 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; |
| 570 | policy->cpuinfo.transition_latency = 10000; /* 10uS transition latency */ |
| 571 | policy->cur = freq; |
| 572 | |
| 573 | dprintk("centrino_cpu_init: cur=%dkHz\n", policy->cur); |
| 574 | |
| 575 | ret = cpufreq_frequency_table_cpuinfo(policy, centrino_model[policy->cpu]->op_points); |
| 576 | if (ret) |
| 577 | return (ret); |
| 578 | |
| 579 | cpufreq_frequency_table_get_attr(centrino_model[policy->cpu]->op_points, policy->cpu); |
| 580 | |
| 581 | return 0; |
| 582 | } |
| 583 | |
| 584 | static int centrino_cpu_exit(struct cpufreq_policy *policy) |
| 585 | { |
| 586 | unsigned int cpu = policy->cpu; |
| 587 | |
| 588 | if (!centrino_model[cpu]) |
| 589 | return -ENODEV; |
| 590 | |
| 591 | cpufreq_frequency_table_put_attr(cpu); |
| 592 | |
| 593 | #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI |
| 594 | if (!centrino_model[cpu]->model_name) { |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 595 | static struct acpi_processor_performance *p; |
| 596 | |
| 597 | if (acpi_perf_data[cpu]) { |
| 598 | p = acpi_perf_data[cpu]; |
| 599 | dprintk("unregistering and freeing ACPI data\n"); |
| 600 | acpi_processor_unregister_performance(p, cpu); |
| 601 | kfree(centrino_model[cpu]->op_points); |
| 602 | kfree(centrino_model[cpu]); |
| 603 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 604 | } |
| 605 | #endif |
| 606 | |
| 607 | centrino_model[cpu] = NULL; |
| 608 | |
| 609 | return 0; |
| 610 | } |
| 611 | |
| 612 | /** |
| 613 | * centrino_verify - verifies a new CPUFreq policy |
| 614 | * @policy: new policy |
| 615 | * |
| 616 | * Limit must be within this model's frequency range at least one |
| 617 | * border included. |
| 618 | */ |
| 619 | static int centrino_verify (struct cpufreq_policy *policy) |
| 620 | { |
| 621 | return cpufreq_frequency_table_verify(policy, centrino_model[policy->cpu]->op_points); |
| 622 | } |
| 623 | |
| 624 | /** |
| 625 | * centrino_setpolicy - set a new CPUFreq policy |
| 626 | * @policy: new policy |
| 627 | * @target_freq: the target frequency |
| 628 | * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H) |
| 629 | * |
| 630 | * Sets a new CPUFreq policy. |
| 631 | */ |
| 632 | static int centrino_target (struct cpufreq_policy *policy, |
| 633 | unsigned int target_freq, |
| 634 | unsigned int relation) |
| 635 | { |
| 636 | unsigned int newstate = 0; |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 637 | unsigned int msr, oldmsr = 0, h = 0, cpu = policy->cpu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | struct cpufreq_freqs freqs; |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 639 | cpumask_t online_policy_cpus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | cpumask_t saved_mask; |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 641 | cpumask_t set_mask; |
| 642 | cpumask_t covered_cpus; |
| 643 | int retval = 0; |
| 644 | unsigned int j, k, first_cpu, tmp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 646 | if (unlikely(centrino_model[cpu] == NULL)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 647 | return -ENODEV; |
| 648 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 649 | if (unlikely(cpufreq_frequency_table_target(policy, |
| 650 | centrino_model[cpu]->op_points, |
| 651 | target_freq, |
| 652 | relation, |
| 653 | &newstate))) { |
| 654 | return -EINVAL; |
| 655 | } |
| 656 | |
| 657 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
| 658 | cpus_and(online_policy_cpus, cpu_online_map, policy->cpus); |
| 659 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | saved_mask = current->cpus_allowed; |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 661 | first_cpu = 1; |
| 662 | cpus_clear(covered_cpus); |
| 663 | for_each_cpu_mask(j, online_policy_cpus) { |
| 664 | /* |
| 665 | * Support for SMP systems. |
| 666 | * Make sure we are running on CPU that wants to change freq |
| 667 | */ |
| 668 | cpus_clear(set_mask); |
| 669 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) |
| 670 | cpus_or(set_mask, set_mask, online_policy_cpus); |
| 671 | else |
| 672 | cpu_set(j, set_mask); |
| 673 | |
| 674 | set_cpus_allowed(current, set_mask); |
| 675 | if (unlikely(!cpu_isset(smp_processor_id(), set_mask))) { |
| 676 | dprintk("couldn't limit to CPUs in this domain\n"); |
| 677 | retval = -EAGAIN; |
| 678 | if (first_cpu) { |
| 679 | /* We haven't started the transition yet. */ |
| 680 | goto migrate_end; |
| 681 | } |
| 682 | break; |
| 683 | } |
| 684 | |
| 685 | msr = centrino_model[cpu]->op_points[newstate].index; |
| 686 | |
| 687 | if (first_cpu) { |
| 688 | rdmsr(MSR_IA32_PERF_CTL, oldmsr, h); |
| 689 | if (msr == (oldmsr & 0xffff)) { |
| 690 | dprintk("no change needed - msr was and needs " |
| 691 | "to be %x\n", oldmsr); |
| 692 | retval = 0; |
| 693 | goto migrate_end; |
| 694 | } |
| 695 | |
| 696 | freqs.old = extract_clock(oldmsr, cpu, 0); |
| 697 | freqs.new = extract_clock(msr, cpu, 0); |
| 698 | |
| 699 | dprintk("target=%dkHz old=%d new=%d msr=%04x\n", |
| 700 | target_freq, freqs.old, freqs.new, msr); |
| 701 | |
| 702 | for_each_cpu_mask(k, online_policy_cpus) { |
| 703 | freqs.cpu = k; |
| 704 | cpufreq_notify_transition(&freqs, |
| 705 | CPUFREQ_PRECHANGE); |
| 706 | } |
| 707 | |
| 708 | first_cpu = 0; |
| 709 | /* all but 16 LSB are reserved, treat them with care */ |
| 710 | oldmsr &= ~0xffff; |
| 711 | msr &= 0xffff; |
| 712 | oldmsr |= msr; |
| 713 | } |
| 714 | |
| 715 | wrmsr(MSR_IA32_PERF_CTL, oldmsr, h); |
| 716 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) |
| 717 | break; |
| 718 | |
| 719 | cpu_set(j, covered_cpus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | } |
| 721 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 722 | for_each_cpu_mask(k, online_policy_cpus) { |
| 723 | freqs.cpu = k; |
| 724 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | } |
| 726 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 727 | if (unlikely(retval)) { |
| 728 | /* |
| 729 | * We have failed halfway through the frequency change. |
| 730 | * We have sent callbacks to policy->cpus and |
| 731 | * MSRs have already been written on coverd_cpus. |
| 732 | * Best effort undo.. |
| 733 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 735 | if (!cpus_empty(covered_cpus)) { |
| 736 | for_each_cpu_mask(j, covered_cpus) { |
| 737 | set_cpus_allowed(current, cpumask_of_cpu(j)); |
| 738 | wrmsr(MSR_IA32_PERF_CTL, oldmsr, h); |
| 739 | } |
| 740 | } |
| 741 | |
| 742 | tmp = freqs.new; |
| 743 | freqs.new = freqs.old; |
| 744 | freqs.old = tmp; |
| 745 | for_each_cpu_mask(j, online_policy_cpus) { |
| 746 | freqs.cpu = j; |
| 747 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
| 748 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
| 749 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | } |
| 751 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 752 | migrate_end: |
| 753 | set_cpus_allowed(current, saved_mask); |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 754 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 755 | } |
| 756 | |
| 757 | static struct freq_attr* centrino_attr[] = { |
| 758 | &cpufreq_freq_attr_scaling_available_freqs, |
| 759 | NULL, |
| 760 | }; |
| 761 | |
| 762 | static struct cpufreq_driver centrino_driver = { |
| 763 | .name = "centrino", /* should be speedstep-centrino, |
| 764 | but there's a 16 char limit */ |
| 765 | .init = centrino_cpu_init, |
| 766 | .exit = centrino_cpu_exit, |
| 767 | .verify = centrino_verify, |
| 768 | .target = centrino_target, |
| 769 | .get = get_cur_freq, |
| 770 | .attr = centrino_attr, |
| 771 | .owner = THIS_MODULE, |
| 772 | }; |
| 773 | |
| 774 | |
| 775 | /** |
| 776 | * centrino_init - initializes the Enhanced SpeedStep CPUFreq driver |
| 777 | * |
| 778 | * Initializes the Enhanced SpeedStep support. Returns -ENODEV on |
| 779 | * unsupported devices, -ENOENT if there's no voltage table for this |
| 780 | * particular CPU model, -EINVAL on problems during initiatization, |
| 781 | * and zero on success. |
| 782 | * |
| 783 | * This is quite picky. Not only does the CPU have to advertise the |
| 784 | * "est" flag in the cpuid capability flags, we look for a specific |
| 785 | * CPU model and stepping, and we need to have the exact model name in |
| 786 | * our voltage tables. That is, be paranoid about not releasing |
| 787 | * someone's valuable magic smoke. |
| 788 | */ |
| 789 | static int __init centrino_init(void) |
| 790 | { |
| 791 | struct cpuinfo_x86 *cpu = cpu_data; |
| 792 | |
| 793 | if (!cpu_has(cpu, X86_FEATURE_EST)) |
| 794 | return -ENODEV; |
| 795 | |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 796 | centrino_cpu_early_init_acpi(); |
| 797 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 798 | return cpufreq_register_driver(¢rino_driver); |
| 799 | } |
| 800 | |
| 801 | static void __exit centrino_exit(void) |
| 802 | { |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 803 | #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI |
| 804 | unsigned int j; |
| 805 | #endif |
| 806 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 807 | cpufreq_unregister_driver(¢rino_driver); |
Venkatesh Pallipadi | c52851b | 2005-12-14 15:05:00 -0500 | [diff] [blame^] | 808 | |
| 809 | #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI |
| 810 | for_each_cpu(j) { |
| 811 | kfree(acpi_perf_data[j]); |
| 812 | acpi_perf_data[j] = NULL; |
| 813 | } |
| 814 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 815 | } |
| 816 | |
| 817 | MODULE_AUTHOR ("Jeremy Fitzhardinge <jeremy@goop.org>"); |
| 818 | MODULE_DESCRIPTION ("Enhanced SpeedStep driver for Intel Pentium M processors."); |
| 819 | MODULE_LICENSE ("GPL"); |
| 820 | |
| 821 | late_initcall(centrino_init); |
| 822 | module_exit(centrino_exit); |