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Chunyan Zhang4fcba552017-12-07 20:57:09 +08001// SPDX-License-Identifier: GPL-2.0
2//
3// Spreadtrum composite clock driver
4//
5// Copyright (C) 2017 Spreadtrum, Inc.
6// Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
7
8#include <linux/clk-provider.h>
9
10#include "composite.h"
11
Maxime Ripard302d2f82023-05-05 13:26:03 +020012static int sprd_comp_determine_rate(struct clk_hw *hw,
13 struct clk_rate_request *req)
Chunyan Zhang4fcba552017-12-07 20:57:09 +080014{
15 struct sprd_comp *cc = hw_to_sprd_comp(hw);
16
Stephen Boyd587dd442023-06-13 12:54:42 -070017 return divider_determine_rate(hw, req, NULL, cc->div.width, 0);
Chunyan Zhang4fcba552017-12-07 20:57:09 +080018}
19
20static unsigned long sprd_comp_recalc_rate(struct clk_hw *hw,
21 unsigned long parent_rate)
22{
23 struct sprd_comp *cc = hw_to_sprd_comp(hw);
24
25 return sprd_div_helper_recalc_rate(&cc->common, &cc->div, parent_rate);
26}
27
28static int sprd_comp_set_rate(struct clk_hw *hw, unsigned long rate,
29 unsigned long parent_rate)
30{
31 struct sprd_comp *cc = hw_to_sprd_comp(hw);
32
33 return sprd_div_helper_set_rate(&cc->common, &cc->div,
34 rate, parent_rate);
35}
36
37static u8 sprd_comp_get_parent(struct clk_hw *hw)
38{
39 struct sprd_comp *cc = hw_to_sprd_comp(hw);
40
41 return sprd_mux_helper_get_parent(&cc->common, &cc->mux);
42}
43
44static int sprd_comp_set_parent(struct clk_hw *hw, u8 index)
45{
46 struct sprd_comp *cc = hw_to_sprd_comp(hw);
47
48 return sprd_mux_helper_set_parent(&cc->common, &cc->mux, index);
49}
50
51const struct clk_ops sprd_comp_ops = {
52 .get_parent = sprd_comp_get_parent,
53 .set_parent = sprd_comp_set_parent,
54
Maxime Ripard302d2f82023-05-05 13:26:03 +020055 .determine_rate = sprd_comp_determine_rate,
Chunyan Zhang4fcba552017-12-07 20:57:09 +080056 .recalc_rate = sprd_comp_recalc_rate,
57 .set_rate = sprd_comp_set_rate,
58};
59EXPORT_SYMBOL_GPL(sprd_comp_ops);