Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Blackfin CPLB initialization |
| 3 | * |
| 4 | * Copyright 2004-2007 Analog Devices Inc. |
| 5 | * |
| 6 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, see the file COPYING, or write |
| 20 | * to the Free Software Foundation, Inc., |
| 21 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 22 | */ |
| 23 | #include <linux/module.h> |
| 24 | |
| 25 | #include <asm/blackfin.h> |
| 26 | #include <asm/cplb.h> |
| 27 | #include <asm/cplbinit.h> |
Graf Yang | dbc895f | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 28 | #include <asm/mem_map.h> |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 29 | |
Mike Frysinger | c605999 | 2008-02-02 12:28:23 +0800 | [diff] [blame] | 30 | #if ANOMALY_05000263 |
| 31 | # error the MPU will not function safely while Anomaly 05000263 applies |
| 32 | #endif |
| 33 | |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 34 | struct cplb_entry icplb_tbl[NR_CPUS][MAX_CPLBS]; |
| 35 | struct cplb_entry dcplb_tbl[NR_CPUS][MAX_CPLBS]; |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 36 | |
| 37 | int first_switched_icplb, first_switched_dcplb; |
| 38 | int first_mask_dcplb; |
| 39 | |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 40 | void __init generate_cplb_tables_cpu(unsigned int cpu) |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 41 | { |
| 42 | int i_d, i_i; |
| 43 | unsigned long addr; |
| 44 | unsigned long d_data, i_data; |
| 45 | unsigned long d_cache = 0, i_cache = 0; |
| 46 | |
Mike Frysinger | 8cab028 | 2008-04-24 05:13:10 +0800 | [diff] [blame] | 47 | printk(KERN_INFO "MPU: setting up cplb tables with memory protection\n"); |
| 48 | |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 49 | #ifdef CONFIG_BFIN_ICACHE |
| 50 | i_cache = CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; |
| 51 | #endif |
| 52 | |
| 53 | #ifdef CONFIG_BFIN_DCACHE |
| 54 | d_cache = CPLB_L1_CHBL; |
Bernd Schmidt | dbfe44f | 2008-04-23 07:11:55 +0800 | [diff] [blame] | 55 | #ifdef CONFIG_BFIN_WT |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 56 | d_cache |= CPLB_L1_AOW | CPLB_WT; |
| 57 | #endif |
| 58 | #endif |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 59 | |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 60 | i_d = i_i = 0; |
| 61 | |
| 62 | /* Set up the zero page. */ |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 63 | dcplb_tbl[cpu][i_d].addr = 0; |
| 64 | dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 65 | |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 66 | icplb_tbl[cpu][i_i].addr = 0; |
Bernd Schmidt | bf324cb | 2009-02-04 16:49:45 +0800 | [diff] [blame] | 67 | icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB; |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 68 | |
| 69 | /* Cover kernel memory with 4M pages. */ |
| 70 | addr = 0; |
| 71 | d_data = d_cache | CPLB_SUPV_WR | CPLB_VALID | PAGE_SIZE_4MB | CPLB_DIRTY; |
| 72 | i_data = i_cache | CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4MB; |
| 73 | |
| 74 | for (; addr < memory_start; addr += 4 * 1024 * 1024) { |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 75 | dcplb_tbl[cpu][i_d].addr = addr; |
| 76 | dcplb_tbl[cpu][i_d++].data = d_data; |
| 77 | icplb_tbl[cpu][i_i].addr = addr; |
| 78 | icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0); |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 79 | } |
| 80 | |
| 81 | /* Cover L1 memory. One 4M area for code and data each is enough. */ |
| 82 | #if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0 |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 83 | dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu); |
| 84 | dcplb_tbl[cpu][i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB; |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 85 | #endif |
Sonic Zhang | f099f39 | 2008-10-09 14:11:57 +0800 | [diff] [blame] | 86 | #if L1_CODE_LENGTH > 0 |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 87 | icplb_tbl[cpu][i_i].addr = get_l1_code_start_cpu(cpu); |
| 88 | icplb_tbl[cpu][i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB; |
Sonic Zhang | f099f39 | 2008-10-09 14:11:57 +0800 | [diff] [blame] | 89 | #endif |
| 90 | |
| 91 | /* Cover L2 memory */ |
| 92 | #if L2_LENGTH > 0 |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 93 | dcplb_tbl[cpu][i_d].addr = L2_START; |
| 94 | dcplb_tbl[cpu][i_d++].data = L2_DMEMORY | PAGE_SIZE_1MB; |
| 95 | icplb_tbl[cpu][i_i].addr = L2_START; |
| 96 | icplb_tbl[cpu][i_i++].data = L2_IMEMORY | PAGE_SIZE_1MB; |
Sonic Zhang | f099f39 | 2008-10-09 14:11:57 +0800 | [diff] [blame] | 97 | #endif |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 98 | |
| 99 | first_mask_dcplb = i_d; |
| 100 | first_switched_dcplb = i_d + (1 << page_mask_order); |
| 101 | first_switched_icplb = i_i; |
| 102 | |
| 103 | while (i_d < MAX_CPLBS) |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 104 | dcplb_tbl[cpu][i_d++].data = 0; |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 105 | while (i_i < MAX_CPLBS) |
Graf Yang | b8a9898 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 106 | icplb_tbl[cpu][i_i++].data = 0; |
Bernd Schmidt | b97b8a9 | 2008-01-27 18:39:16 +0800 | [diff] [blame] | 107 | } |
Bernd Schmidt | dbdf20d | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 108 | |
| 109 | void generate_cplb_tables_all(void) |
| 110 | { |
| 111 | } |