blob: 164561f04c1d5172e9965a43fdaa1c04217e8dc9 [file] [log] [blame]
Klaus Gogerfce152a62017-12-15 12:44:27 +01001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
Alexandru M Stanf3ee3902015-07-07 20:04:32 +02002/*
3 * Google Veyron Jerry Rev 3+ board device tree source
4 *
5 * Copyright 2015 Google, Inc
Alexandru M Stanf3ee3902015-07-07 20:04:32 +02006 */
7
8/dts-v1/;
9#include "rk3288-veyron-chromebook.dtsi"
10#include "cros-ec-sbs.dtsi"
11
12/ {
13 model = "Google Jerry";
Douglas Anderson0c4cac52019-03-22 12:59:24 -070014 compatible = "google,veyron-jerry-rev15", "google,veyron-jerry-rev14",
15 "google,veyron-jerry-rev13", "google,veyron-jerry-rev12",
16 "google,veyron-jerry-rev11", "google,veyron-jerry-rev10",
17 "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020018 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
19 "google,veyron-jerry-rev3", "google,veyron-jerry",
20 "google,veyron", "rockchip,rk3288";
21
22 panel_regulator: panel-regulator {
23 compatible = "regulator-fixed";
24 enable-active-high;
Andy Yane9e79d52016-10-22 20:54:55 +080025 gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020026 pinctrl-names = "default";
27 pinctrl-0 = <&lcd_enable_h>;
28 regulator-name = "panel_regulator";
Heiko Stuebner1f45e8c2015-11-29 19:46:09 +010029 startup-delay-us = <100000>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020030 vin-supply = <&vcc33_sys>;
31 };
32
33 vcc18_lcd: vcc18-lcd {
34 compatible = "regulator-fixed";
35 enable-active-high;
Andy Yane9e79d52016-10-22 20:54:55 +080036 gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020037 pinctrl-names = "default";
38 pinctrl-0 = <&avdd_1v8_disp_en>;
39 regulator-name = "vcc18_lcd";
40 regulator-always-on;
41 regulator-boot-on;
42 vin-supply = <&vcc18_wl>;
43 };
44
45 backlight_regulator: backlight-regulator {
46 compatible = "regulator-fixed";
47 enable-active-high;
Andy Yane9e79d52016-10-22 20:54:55 +080048 gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020049 pinctrl-names = "default";
50 pinctrl-0 = <&bl_pwr_en>;
51 regulator-name = "backlight_regulator";
52 vin-supply = <&vcc33_sys>;
53 startup-delay-us = <15000>;
54 };
55};
56
Heiko Stuebner03deaf42015-12-14 17:15:25 +010057&backlight {
58 power-supply = <&backlight_regulator>;
59};
60
61&panel {
62 power-supply= <&panel_regulator>;
63};
64
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020065&rk808 {
66 pinctrl-names = "default";
Douglas Anderson21f843f2019-03-22 09:52:09 -070067 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
68 dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
69 <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020070
71 regulators {
72 mic_vcc: LDO_REG2 {
73 regulator-name = "mic_vcc";
74 regulator-always-on;
75 regulator-boot-on;
76 regulator-min-microvolt = <1800000>;
77 regulator-max-microvolt = <1800000>;
78 regulator-state-mem {
Brian Norris467fb182015-08-19 15:18:41 -070079 regulator-off-in-suspend;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020080 };
81 };
82 };
83};
84
85&sdmmc {
86 disable-wp;
87 pinctrl-names = "default";
88 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
89 &sdmmc_bus4>;
90};
91
92&vcc_5v {
93 enable-active-high;
Andy Yane9e79d52016-10-22 20:54:55 +080094 gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +020095 pinctrl-names = "default";
96 pinctrl-0 = <&drv_5v>;
97};
98
99&vcc50_hdmi {
100 enable-active-high;
Andy Yane9e79d52016-10-22 20:54:55 +0800101 gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200102 pinctrl-names = "default";
103 pinctrl-0 = <&vcc50_hdmi_en>;
104};
105
Douglas Anderson0ca87bd2019-05-21 13:32:15 -0700106&gpio0 {
107 gpio-line-names = "PMIC_SLEEP_AP",
108 "DDRIO_PWROFF",
109 "DDRIO_RETEN",
110 "TS3A227E_INT_L",
111 "PMIC_INT_L",
112 "PWR_KEY_L",
113 "AP_LID_INT_L",
114 "EC_IN_RW",
115
116 "AC_PRESENT_AP",
117 /*
118 * RECOVERY_SW_L is Chrome OS ABI. Schematics call
119 * it REC_MODE_L.
120 */
121 "RECOVERY_SW_L",
122 "OTP_OUT",
123 "HOST1_PWR_EN",
124 "USBOTG_PWREN_H",
125 "AP_WARM_RESET_H",
126 "nFAULT2",
127 "I2C0_SDA_PMIC",
128
129 "I2C0_SCL_PMIC",
130 "SUSPEND_L",
131 "USB_INT";
132};
133
134&gpio2 {
135 gpio-line-names = "CONFIG0",
136 "CONFIG1",
137 "CONFIG2",
138 "",
139 "",
140 "",
141 "",
142 "CONFIG3",
143
144 "",
145 "EMMC_RST_L",
146 "",
147 "",
148 "BL_PWR_EN",
149 "AVDD_1V8_DISP_EN";
150};
151
152&gpio3 {
153 gpio-line-names = "FLASH0_D0",
154 "FLASH0_D1",
155 "FLASH0_D2",
156 "FLASH0_D3",
157 "FLASH0_D4",
158 "FLASH0_D5",
159 "FLASH0_D6",
160 "FLASH0_D7",
161
162 "",
163 "",
164 "",
165 "",
166 "",
167 "",
168 "",
169 "",
170
171 "FLASH0_CS2/EMMC_CMD",
172 "",
173 "FLASH0_DQS/EMMC_CLKO";
174};
175
176&gpio4 {
177 gpio-line-names = "",
178 "",
179 "",
180 "",
181 "",
182 "",
183 "",
184 "",
185
186 "",
187 "",
188 "",
189 "",
190 "",
191 "",
192 "",
193 "",
194
195 "UART0_RXD",
196 "UART0_TXD",
197 "UART0_CTS",
198 "UART0_RTS",
199 "SDIO0_D0",
200 "SDIO0_D1",
201 "SDIO0_D2",
202 "SDIO0_D3",
203
204 "SDIO0_CMD",
205 "SDIO0_CLK",
206 "BT_DEV_WAKE",
207 "",
208 "WIFI_ENABLE_H",
209 "BT_ENABLE_L",
210 "WIFI_HOST_WAKE",
211 "BT_HOST_WAKE";
212};
213
214&gpio5 {
215 gpio-line-names = "",
216 "",
217 "",
218 "",
219 "",
220 "",
221 "",
222 "",
223
224 "",
225 "",
226 "",
227 "",
228 "SPI0_CLK",
229 "SPI0_CS0",
230 "SPI0_TXD",
231 "SPI0_RXD",
232
233 "",
234 "",
235 "",
236 "VCC50_HDMI_EN";
237};
238
239&gpio6 {
240 gpio-line-names = "I2S0_SCLK",
241 "I2S0_LRCK_RX",
242 "I2S0_LRCK_TX",
243 "I2S0_SDI",
244 "I2S0_SDO0",
245 "HP_DET_H",
246 "",
247 "INT_CODEC",
248
249 "I2S0_CLK",
250 "I2C2_SDA",
251 "I2C2_SCL",
252 "MICDET",
253 "",
254 "",
255 "",
256 "",
257
258 "SDMMC_D0",
259 "SDMMC_D1",
260 "SDMMC_D2",
261 "SDMMC_D3",
262 "SDMMC_CLK",
263 "SDMMC_CMD";
264};
265
266&gpio7 {
267 gpio-line-names = "LCDC_BL",
268 "PWM_LOG",
269 "BL_EN",
270 "TRACKPAD_INT",
271 "TPM_INT_H",
272 "SDMMC_DET_L",
273 /*
274 * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
275 * it FW_WP_AP.
276 */
277 "AP_FLASH_WP_L",
278 "EC_INT",
279
280 "CPU_NMI",
281 "DVSOK",
282 "",
283 "EDP_HPD",
284 "DVS1",
285 "nFAULT1",
286 "LCD_EN",
287 "DVS2",
288
289 "VCC5V_GOOD_H",
290 "I2C4_SDA_TP",
291 "I2C4_SCL_TP",
292 "I2C5_SDA_HDMI",
293 "I2C5_SCL_HDMI",
294 "5V_DRV",
295 "UART2_RXD",
296 "UART2_TXD";
297};
298
299&gpio8 {
300 gpio-line-names = "RAM_ID0",
301 "RAM_ID1",
302 "RAM_ID2",
303 "RAM_ID3",
304 "I2C1_SDA_TPM",
305 "I2C1_SCL_TPM",
306 "SPI2_CLK",
307 "SPI2_CS0",
308
309 "SPI2_RXD",
310 "SPI2_TXD";
311};
312
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200313&pinctrl {
314 backlight {
315 bl_pwr_en: bl_pwr_en {
Heiko Stuebner07f08d92019-04-02 14:08:57 +0200316 rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200317 };
318 };
319
320 buck-5v {
321 drv_5v: drv-5v {
Heiko Stuebner07f08d92019-04-02 14:08:57 +0200322 rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200323 };
324 };
325
326 hdmi {
327 vcc50_hdmi_en: vcc50-hdmi-en {
Heiko Stuebner07f08d92019-04-02 14:08:57 +0200328 rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200329 };
330 };
331
332 lcd {
333 lcd_enable_h: lcd-en {
Heiko Stuebner07f08d92019-04-02 14:08:57 +0200334 rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200335 };
336
337 avdd_1v8_disp_en: avdd-1v8-disp-en {
Heiko Stuebner07f08d92019-04-02 14:08:57 +0200338 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200339 };
340 };
341
342 pmic {
343 dvs_1: dvs-1 {
Heiko Stuebner07f08d92019-04-02 14:08:57 +0200344 rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200345 };
346
347 dvs_2: dvs-2 {
Heiko Stuebner07f08d92019-04-02 14:08:57 +0200348 rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200349 };
350 };
351};
352
353&i2c4 {
354 status = "okay";
355
356 /*
357 * Trackpad pin control is shared between Elan and Synaptics devices
358 * so we have to pull it up to the bus level.
359 */
360 pinctrl-names = "default";
361 pinctrl-0 = <&i2c4_xfer &trackpad_int>;
362
363 trackpad@15 {
364 /*
365 * Remove the inherited pinctrl settings to avoid clashing
366 * with bus-wide ones.
367 */
368 /delete-property/pinctrl-names;
369 /delete-property/pinctrl-0;
370 };
371
372 trackpad@2c {
373 compatible = "hid-over-i2c";
374 interrupt-parent = <&gpio7>;
Andy Yane9e79d52016-10-22 20:54:55 +0800375 interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
Alexandru M Stanf3ee3902015-07-07 20:04:32 +0200376 reg = <0x2c>;
377 hid-descr-addr = <0x0020>;
378 vcc-supply = <&vcc33_io>;
379 wakeup-source;
380 };
381};