Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * BRIEF MODULE DESCRIPTION |
| 4 | * IT8172 Consumer IR port generic routines. |
| 5 | * |
| 6 | * Copyright 2001 MontaVista Software Inc. |
| 7 | * Author: MontaVista Software, Inc. |
| 8 | * ppopov@mvista.com or source@mvista.com |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your |
| 13 | * option) any later version. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 16 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 17 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 18 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 21 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 22 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 25 | * |
| 26 | * You should have received a copy of the GNU General Public License along |
| 27 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 28 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 29 | */ |
| 30 | |
| 31 | #include <linux/config.h> |
| 32 | |
| 33 | #ifdef CONFIG_IT8172_CIR |
| 34 | |
| 35 | #include <linux/types.h> |
| 36 | #include <linux/pci.h> |
| 37 | #include <linux/kernel.h> |
| 38 | #include <linux/init.h> |
| 39 | |
| 40 | #include <asm/it8172/it8172.h> |
| 41 | #include <asm/it8172/it8172_cir.h> |
| 42 | |
| 43 | |
| 44 | volatile struct it8172_cir_regs *cir_regs[NUM_CIR_PORTS] = { |
| 45 | (volatile struct it8172_cir_regs *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_CIR0_BASE)), |
| 46 | (volatile struct it8172_cir_regs *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_CIR1_BASE))}; |
| 47 | |
| 48 | |
| 49 | /* |
| 50 | * Initialize Consumer IR Port. |
| 51 | */ |
| 52 | int cir_port_init(struct cir_port *cir) |
| 53 | { |
| 54 | int port = cir->port; |
| 55 | unsigned char data; |
| 56 | |
| 57 | /* set baud rate */ |
| 58 | cir_regs[port]->bdlr = cir->baud_rate & 0xff; |
| 59 | cir_regs[port]->bdhr = (cir->baud_rate >> 8) & 0xff; |
| 60 | |
| 61 | /* set receiver control register */ |
| 62 | cir_regs[port]->rcr = (CIR_SET_RDWOS(cir->rdwos) | CIR_SET_RXDCR(cir->rxdcr)); |
| 63 | |
| 64 | /* set carrier frequency register */ |
| 65 | cir_regs[port]->cfr = (CIR_SET_CF(cir->cfq) | CIR_SET_HS(cir->hcfs)); |
| 66 | |
| 67 | /* set fifo threshold */ |
| 68 | data = cir_regs[port]->mstcr & 0xf3; |
| 69 | data |= CIR_SET_FIFO_TL(cir->fifo_tl); |
| 70 | cir_regs[port]->mstcr = data; |
| 71 | |
| 72 | clear_fifo(cir); |
| 73 | enable_receiver(cir); |
| 74 | disable_rx_demodulation(cir); |
| 75 | |
| 76 | set_rx_active(cir); |
| 77 | int_enable(cir); |
| 78 | rx_int_enable(cir); |
| 79 | |
| 80 | return 0; |
| 81 | } |
| 82 | |
| 83 | |
| 84 | void clear_fifo(struct cir_port *cir) |
| 85 | { |
| 86 | cir_regs[cir->port]->mstcr |= CIR_FIFO_CLEAR; |
| 87 | } |
| 88 | |
| 89 | void enable_receiver(struct cir_port *cir) |
| 90 | { |
| 91 | cir_regs[cir->port]->rcr |= CIR_RXEN; |
| 92 | } |
| 93 | |
| 94 | void disable_receiver(struct cir_port *cir) |
| 95 | { |
| 96 | cir_regs[cir->port]->rcr &= ~CIR_RXEN; |
| 97 | } |
| 98 | |
| 99 | void enable_rx_demodulation(struct cir_port *cir) |
| 100 | { |
| 101 | cir_regs[cir->port]->rcr |= CIR_RXEND; |
| 102 | } |
| 103 | |
| 104 | void disable_rx_demodulation(struct cir_port *cir) |
| 105 | { |
| 106 | cir_regs[cir->port]->rcr &= ~CIR_RXEND; |
| 107 | } |
| 108 | |
| 109 | void set_rx_active(struct cir_port *cir) |
| 110 | { |
| 111 | cir_regs[cir->port]->rcr |= CIR_RXACT; |
| 112 | } |
| 113 | |
| 114 | void int_enable(struct cir_port *cir) |
| 115 | { |
| 116 | cir_regs[cir->port]->ier |= CIR_IEC; |
| 117 | } |
| 118 | |
| 119 | void rx_int_enable(struct cir_port *cir) |
| 120 | { |
| 121 | cir_regs[cir->port]->ier |= CIR_RDAIE; |
| 122 | } |
| 123 | |
| 124 | void dump_regs(struct cir_port *cir) |
| 125 | { |
| 126 | printk("mstcr %x ier %x iir %x cfr %x rcr %x tcr %x tfsr %x rfsr %x\n", |
| 127 | cir_regs[cir->port]->mstcr, |
| 128 | cir_regs[cir->port]->ier, |
| 129 | cir_regs[cir->port]->iir, |
| 130 | cir_regs[cir->port]->cfr, |
| 131 | cir_regs[cir->port]->rcr, |
| 132 | cir_regs[cir->port]->tcr, |
| 133 | cir_regs[cir->port]->tfsr, |
| 134 | cir_regs[cir->port]->rfsr); |
| 135 | |
| 136 | while (cir_regs[cir->port]->iir & CIR_RDAI) { |
| 137 | printk("data %x\n", cir_regs[cir->port]->dr); |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | void dump_reg_addr(struct cir_port *cir) |
| 142 | { |
| 143 | printk("dr %x mstcr %x ier %x iir %x cfr %x rcr %x tcr %x bdlr %x bdhr %x tfsr %x rfsr %x\n", |
| 144 | (unsigned)&cir_regs[cir->port]->dr, |
| 145 | (unsigned)&cir_regs[cir->port]->mstcr, |
| 146 | (unsigned)&cir_regs[cir->port]->ier, |
| 147 | (unsigned)&cir_regs[cir->port]->iir, |
| 148 | (unsigned)&cir_regs[cir->port]->cfr, |
| 149 | (unsigned)&cir_regs[cir->port]->rcr, |
| 150 | (unsigned)&cir_regs[cir->port]->tcr, |
| 151 | (unsigned)&cir_regs[cir->port]->bdlr, |
| 152 | (unsigned)&cir_regs[cir->port]->bdhr, |
| 153 | (unsigned)&cir_regs[cir->port]->tfsr, |
| 154 | (unsigned)&cir_regs[cir->port]->rfsr); |
| 155 | } |
| 156 | |
| 157 | int cir_get_rx_count(struct cir_port *cir) |
| 158 | { |
| 159 | return cir_regs[cir->port]->rfsr & CIR_RXFBC_MASK; |
| 160 | } |
| 161 | |
| 162 | char cir_read_data(struct cir_port *cir) |
| 163 | { |
| 164 | return cir_regs[cir->port]->dr; |
| 165 | } |
| 166 | |
| 167 | char get_int_status(struct cir_port *cir) |
| 168 | { |
| 169 | return cir_regs[cir->port]->iir; |
| 170 | } |
| 171 | #endif |