blob: 32141e1006c4a4907c5d6bbc4caba20aa30cb5db [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Adrian Bunkb00dc832008-05-19 16:52:27 -07002/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * sbus.c: UltraSparc SBUS controller support.
4 *
5 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
6 */
7
8#include <linux/kernel.h>
9#include <linux/types.h>
10#include <linux/mm.h>
11#include <linux/spinlock.h>
12#include <linux/slab.h>
Paul Gortmaker7b64db62011-07-18 15:57:46 -040013#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/init.h>
15#include <linux/interrupt.h>
David S. Miller9dc69232008-08-27 19:54:01 -070016#include <linux/of.h>
17#include <linux/of_device.h>
Anshuman Khandual98fa15f2019-03-05 15:42:58 -080018#include <linux/numa.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
20#include <asm/page.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <asm/io.h>
22#include <asm/upa.h>
23#include <asm/cache.h>
24#include <asm/dma.h>
25#include <asm/irq.h>
David S. Miller25c75812006-06-22 20:21:22 -070026#include <asm/prom.h>
David S. Miller9dc69232008-08-27 19:54:01 -070027#include <asm/oplib.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <asm/starfire.h>
29
30#include "iommu_common.h"
31
Linus Torvalds1da177e2005-04-16 15:20:36 -070032#define MAP_BASE ((u32)0xc0000000)
33
Linus Torvalds1da177e2005-04-16 15:20:36 -070034/* Offsets from iommu_regs */
35#define SYSIO_IOMMUREG_BASE 0x2400UL
36#define IOMMU_CONTROL (0x2400UL - 0x2400UL) /* IOMMU control register */
37#define IOMMU_TSBBASE (0x2408UL - 0x2400UL) /* TSB base address register */
38#define IOMMU_FLUSH (0x2410UL - 0x2400UL) /* IOMMU flush register */
39#define IOMMU_VADIAG (0x4400UL - 0x2400UL) /* SBUS virtual address diagnostic */
40#define IOMMU_TAGCMP (0x4408UL - 0x2400UL) /* TLB tag compare diagnostics */
41#define IOMMU_LRUDIAG (0x4500UL - 0x2400UL) /* IOMMU LRU queue diagnostics */
42#define IOMMU_TAGDIAG (0x4580UL - 0x2400UL) /* TLB tag diagnostics */
43#define IOMMU_DRAMDIAG (0x4600UL - 0x2400UL) /* TLB data RAM diagnostics */
44
45#define IOMMU_DRAM_VALID (1UL << 30UL)
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047/* Offsets from strbuf_regs */
48#define SYSIO_STRBUFREG_BASE 0x2800UL
49#define STRBUF_CONTROL (0x2800UL - 0x2800UL) /* Control */
50#define STRBUF_PFLUSH (0x2808UL - 0x2800UL) /* Page flush/invalidate */
51#define STRBUF_FSYNC (0x2810UL - 0x2800UL) /* Flush synchronization */
52#define STRBUF_DRAMDIAG (0x5000UL - 0x2800UL) /* data RAM diagnostic */
53#define STRBUF_ERRDIAG (0x5400UL - 0x2800UL) /* error status diagnostics */
54#define STRBUF_PTAGDIAG (0x5800UL - 0x2800UL) /* Page tag diagnostics */
55#define STRBUF_LTAGDIAG (0x5900UL - 0x2800UL) /* Line tag diagnostics */
56
57#define STRBUF_TAG_VALID 0x02UL
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059/* Enable 64-bit DVMA mode for the given device. */
David S. Miller63237ee2008-08-26 23:33:42 -070060void sbus_set_sbus64(struct device *dev, int bursts)
Linus Torvalds1da177e2005-04-16 15:20:36 -070061{
David S. Miller63237ee2008-08-26 23:33:42 -070062 struct iommu *iommu = dev->archdata.iommu;
Grant Likelycd4cd732010-07-22 16:04:30 -060063 struct platform_device *op = to_platform_device(dev);
David S. Miller63237ee2008-08-26 23:33:42 -070064 const struct linux_prom_registers *regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -070065 unsigned long cfg_reg;
David S. Miller63237ee2008-08-26 23:33:42 -070066 int slot;
Linus Torvalds1da177e2005-04-16 15:20:36 -070067 u64 val;
68
Grant Likely61c7a082010-04-13 16:12:29 -070069 regs = of_get_property(op->dev.of_node, "reg", NULL);
David S. Miller63237ee2008-08-26 23:33:42 -070070 if (!regs) {
Rob Herringa412c852018-11-16 15:06:54 -060071 printk(KERN_ERR "sbus_set_sbus64: Cannot find regs for %pOF\n",
72 op->dev.of_node);
David S. Miller63237ee2008-08-26 23:33:42 -070073 return;
74 }
75 slot = regs->which_io;
76
David S. Miller3e4d2652007-04-25 15:58:22 -070077 cfg_reg = iommu->write_complete_reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -070078 switch (slot) {
79 case 0:
80 cfg_reg += 0x20UL;
81 break;
82 case 1:
83 cfg_reg += 0x28UL;
84 break;
85 case 2:
86 cfg_reg += 0x30UL;
87 break;
88 case 3:
89 cfg_reg += 0x38UL;
90 break;
91 case 13:
92 cfg_reg += 0x40UL;
93 break;
94 case 14:
95 cfg_reg += 0x48UL;
96 break;
97 case 15:
98 cfg_reg += 0x50UL;
99 break;
100
101 default:
102 return;
Joe Perches6cb79b32011-06-03 14:45:23 +0000103 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104
105 val = upa_readq(cfg_reg);
106 if (val & (1UL << 14UL)) {
107 /* Extended transfer mode already enabled. */
108 return;
109 }
110
111 val |= (1UL << 14UL);
112
113 if (bursts & DMA_BURST8)
114 val |= (1UL << 1UL);
115 if (bursts & DMA_BURST16)
116 val |= (1UL << 2UL);
117 if (bursts & DMA_BURST32)
118 val |= (1UL << 3UL);
119 if (bursts & DMA_BURST64)
120 val |= (1UL << 4UL);
121 upa_writeq(val, cfg_reg);
122}
Sam Ravnborg917c3662009-01-08 16:58:20 -0800123EXPORT_SYMBOL(sbus_set_sbus64);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125/* INO number to IMAP register offset for SYSIO external IRQ's.
126 * This should conform to both Sunfire/Wildfire server and Fusion
127 * desktop designs.
128 */
David S. Millerec4d18f2007-06-07 16:58:22 -0700129#define SYSIO_IMAP_SLOT0 0x2c00UL
130#define SYSIO_IMAP_SLOT1 0x2c08UL
131#define SYSIO_IMAP_SLOT2 0x2c10UL
132#define SYSIO_IMAP_SLOT3 0x2c18UL
133#define SYSIO_IMAP_SCSI 0x3000UL
134#define SYSIO_IMAP_ETH 0x3008UL
135#define SYSIO_IMAP_BPP 0x3010UL
136#define SYSIO_IMAP_AUDIO 0x3018UL
137#define SYSIO_IMAP_PFAIL 0x3020UL
138#define SYSIO_IMAP_KMS 0x3028UL
139#define SYSIO_IMAP_FLPY 0x3030UL
140#define SYSIO_IMAP_SHW 0x3038UL
141#define SYSIO_IMAP_KBD 0x3040UL
142#define SYSIO_IMAP_MS 0x3048UL
143#define SYSIO_IMAP_SER 0x3050UL
144#define SYSIO_IMAP_TIM0 0x3060UL
145#define SYSIO_IMAP_TIM1 0x3068UL
146#define SYSIO_IMAP_UE 0x3070UL
147#define SYSIO_IMAP_CE 0x3078UL
148#define SYSIO_IMAP_SBERR 0x3080UL
149#define SYSIO_IMAP_PMGMT 0x3088UL
150#define SYSIO_IMAP_GFX 0x3090UL
151#define SYSIO_IMAP_EUPA 0x3098UL
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152
153#define bogon ((unsigned long) -1)
154static unsigned long sysio_irq_offsets[] = {
155 /* SBUS Slot 0 --> 3, level 1 --> 7 */
156 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
157 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
158 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
159 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
160 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
161 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
162 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
163 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
164
165 /* Onboard devices (not relevant/used on SunFire). */
166 SYSIO_IMAP_SCSI,
167 SYSIO_IMAP_ETH,
168 SYSIO_IMAP_BPP,
169 bogon,
170 SYSIO_IMAP_AUDIO,
171 SYSIO_IMAP_PFAIL,
172 bogon,
173 bogon,
174 SYSIO_IMAP_KMS,
175 SYSIO_IMAP_FLPY,
176 SYSIO_IMAP_SHW,
177 SYSIO_IMAP_KBD,
178 SYSIO_IMAP_MS,
179 SYSIO_IMAP_SER,
180 bogon,
181 bogon,
182 SYSIO_IMAP_TIM0,
183 SYSIO_IMAP_TIM1,
184 bogon,
185 bogon,
186 SYSIO_IMAP_UE,
187 SYSIO_IMAP_CE,
188 SYSIO_IMAP_SBERR,
189 SYSIO_IMAP_PMGMT,
190};
191
192#undef bogon
193
Tobias Klauser84c1a132005-11-09 12:03:42 -0800194#define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195
196/* Convert Interrupt Mapping register pointer to associated
197 * Interrupt Clear register pointer, SYSIO specific version.
198 */
199#define SYSIO_ICLR_UNUSED0 0x3400UL
David S. Millerec4d18f2007-06-07 16:58:22 -0700200#define SYSIO_ICLR_SLOT0 0x3408UL
201#define SYSIO_ICLR_SLOT1 0x3448UL
202#define SYSIO_ICLR_SLOT2 0x3488UL
203#define SYSIO_ICLR_SLOT3 0x34c8UL
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204static unsigned long sysio_imap_to_iclr(unsigned long imap)
205{
206 unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
207 return imap + diff;
208}
209
Grant Likelycd4cd732010-07-22 16:04:30 -0600210static unsigned int sbus_build_irq(struct platform_device *op, unsigned int ino)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211{
David S. Miller046e26a2008-08-27 04:54:04 -0700212 struct iommu *iommu = op->dev.archdata.iommu;
David S. Miller3e4d2652007-04-25 15:58:22 -0700213 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214 unsigned long imap, iclr;
David S. Miller37cdcd92006-06-20 01:21:57 -0700215 int sbus_level = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216
217 imap = sysio_irq_offsets[ino];
218 if (imap == ((unsigned long)-1)) {
David S. Miller37cdcd92006-06-20 01:21:57 -0700219 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
220 ino);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221 prom_halt();
222 }
223 imap += reg_base;
224
225 /* SYSIO inconsistency. For external SLOTS, we have to select
226 * the right ICLR register based upon the lower SBUS irq level
227 * bits.
228 */
229 if (ino >= 0x20) {
230 iclr = sysio_imap_to_iclr(imap);
231 } else {
232 int sbus_slot = (ino & 0x18)>>3;
233
234 sbus_level = ino & 0x7;
235
236 switch(sbus_slot) {
237 case 0:
238 iclr = reg_base + SYSIO_ICLR_SLOT0;
239 break;
240 case 1:
241 iclr = reg_base + SYSIO_ICLR_SLOT1;
242 break;
243 case 2:
244 iclr = reg_base + SYSIO_ICLR_SLOT2;
245 break;
246 default:
247 case 3:
248 iclr = reg_base + SYSIO_ICLR_SLOT3;
249 break;
Joe Perches6cb79b32011-06-03 14:45:23 +0000250 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700251
252 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
253 }
David S. Millere18e2a02006-06-20 01:23:32 -0700254 return build_irq(sbus_level, iclr, imap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255}
256
257/* Error interrupt handling. */
258#define SYSIO_UE_AFSR 0x0030UL
259#define SYSIO_UE_AFAR 0x0038UL
260#define SYSIO_UEAFSR_PPIO 0x8000000000000000UL /* Primary PIO cause */
261#define SYSIO_UEAFSR_PDRD 0x4000000000000000UL /* Primary DVMA read cause */
262#define SYSIO_UEAFSR_PDWR 0x2000000000000000UL /* Primary DVMA write cause */
263#define SYSIO_UEAFSR_SPIO 0x1000000000000000UL /* Secondary PIO is cause */
264#define SYSIO_UEAFSR_SDRD 0x0800000000000000UL /* Secondary DVMA read cause */
265#define SYSIO_UEAFSR_SDWR 0x0400000000000000UL /* Secondary DVMA write cause*/
266#define SYSIO_UEAFSR_RESV1 0x03ff000000000000UL /* Reserved */
267#define SYSIO_UEAFSR_DOFF 0x0000e00000000000UL /* Doubleword Offset */
268#define SYSIO_UEAFSR_SIZE 0x00001c0000000000UL /* Bad transfer size 2^SIZE */
269#define SYSIO_UEAFSR_MID 0x000003e000000000UL /* UPA MID causing the fault */
270#define SYSIO_UEAFSR_RESV2 0x0000001fffffffffUL /* Reserved */
Al Viro6d24c8d2006-10-08 08:23:28 -0400271static irqreturn_t sysio_ue_handler(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272{
Grant Likelycd4cd732010-07-22 16:04:30 -0600273 struct platform_device *op = dev_id;
David S. Miller046e26a2008-08-27 04:54:04 -0700274 struct iommu *iommu = op->dev.archdata.iommu;
David S. Miller3e4d2652007-04-25 15:58:22 -0700275 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276 unsigned long afsr_reg, afar_reg;
277 unsigned long afsr, afar, error_bits;
David S. Miller046e26a2008-08-27 04:54:04 -0700278 int reported, portid;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279
280 afsr_reg = reg_base + SYSIO_UE_AFSR;
281 afar_reg = reg_base + SYSIO_UE_AFAR;
282
283 /* Latch error status. */
284 afsr = upa_readq(afsr_reg);
285 afar = upa_readq(afar_reg);
286
287 /* Clear primary/secondary error status bits. */
288 error_bits = afsr &
289 (SYSIO_UEAFSR_PPIO | SYSIO_UEAFSR_PDRD | SYSIO_UEAFSR_PDWR |
290 SYSIO_UEAFSR_SPIO | SYSIO_UEAFSR_SDRD | SYSIO_UEAFSR_SDWR);
291 upa_writeq(error_bits, afsr_reg);
292
Grant Likely61c7a082010-04-13 16:12:29 -0700293 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
David S. Miller046e26a2008-08-27 04:54:04 -0700294
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295 /* Log the error. */
296 printk("SYSIO[%x]: Uncorrectable ECC Error, primary error type[%s]\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700297 portid,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298 (((error_bits & SYSIO_UEAFSR_PPIO) ?
299 "PIO" :
300 ((error_bits & SYSIO_UEAFSR_PDRD) ?
301 "DVMA Read" :
302 ((error_bits & SYSIO_UEAFSR_PDWR) ?
303 "DVMA Write" : "???")))));
304 printk("SYSIO[%x]: DOFF[%lx] SIZE[%lx] MID[%lx]\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700305 portid,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306 (afsr & SYSIO_UEAFSR_DOFF) >> 45UL,
307 (afsr & SYSIO_UEAFSR_SIZE) >> 42UL,
308 (afsr & SYSIO_UEAFSR_MID) >> 37UL);
David S. Miller046e26a2008-08-27 04:54:04 -0700309 printk("SYSIO[%x]: AFAR[%016lx]\n", portid, afar);
310 printk("SYSIO[%x]: Secondary UE errors [", portid);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311 reported = 0;
312 if (afsr & SYSIO_UEAFSR_SPIO) {
313 reported++;
314 printk("(PIO)");
315 }
316 if (afsr & SYSIO_UEAFSR_SDRD) {
317 reported++;
318 printk("(DVMA Read)");
319 }
320 if (afsr & SYSIO_UEAFSR_SDWR) {
321 reported++;
322 printk("(DVMA Write)");
323 }
324 if (!reported)
325 printk("(none)");
326 printk("]\n");
327
328 return IRQ_HANDLED;
329}
330
331#define SYSIO_CE_AFSR 0x0040UL
332#define SYSIO_CE_AFAR 0x0048UL
333#define SYSIO_CEAFSR_PPIO 0x8000000000000000UL /* Primary PIO cause */
334#define SYSIO_CEAFSR_PDRD 0x4000000000000000UL /* Primary DVMA read cause */
335#define SYSIO_CEAFSR_PDWR 0x2000000000000000UL /* Primary DVMA write cause */
336#define SYSIO_CEAFSR_SPIO 0x1000000000000000UL /* Secondary PIO cause */
337#define SYSIO_CEAFSR_SDRD 0x0800000000000000UL /* Secondary DVMA read cause */
338#define SYSIO_CEAFSR_SDWR 0x0400000000000000UL /* Secondary DVMA write cause*/
339#define SYSIO_CEAFSR_RESV1 0x0300000000000000UL /* Reserved */
340#define SYSIO_CEAFSR_ESYND 0x00ff000000000000UL /* Syndrome Bits */
341#define SYSIO_CEAFSR_DOFF 0x0000e00000000000UL /* Double Offset */
342#define SYSIO_CEAFSR_SIZE 0x00001c0000000000UL /* Bad transfer size 2^SIZE */
343#define SYSIO_CEAFSR_MID 0x000003e000000000UL /* UPA MID causing the fault */
344#define SYSIO_CEAFSR_RESV2 0x0000001fffffffffUL /* Reserved */
Al Viro6d24c8d2006-10-08 08:23:28 -0400345static irqreturn_t sysio_ce_handler(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346{
Grant Likelycd4cd732010-07-22 16:04:30 -0600347 struct platform_device *op = dev_id;
David S. Miller046e26a2008-08-27 04:54:04 -0700348 struct iommu *iommu = op->dev.archdata.iommu;
David S. Miller3e4d2652007-04-25 15:58:22 -0700349 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350 unsigned long afsr_reg, afar_reg;
351 unsigned long afsr, afar, error_bits;
David S. Miller046e26a2008-08-27 04:54:04 -0700352 int reported, portid;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353
354 afsr_reg = reg_base + SYSIO_CE_AFSR;
355 afar_reg = reg_base + SYSIO_CE_AFAR;
356
357 /* Latch error status. */
358 afsr = upa_readq(afsr_reg);
359 afar = upa_readq(afar_reg);
360
361 /* Clear primary/secondary error status bits. */
362 error_bits = afsr &
363 (SYSIO_CEAFSR_PPIO | SYSIO_CEAFSR_PDRD | SYSIO_CEAFSR_PDWR |
364 SYSIO_CEAFSR_SPIO | SYSIO_CEAFSR_SDRD | SYSIO_CEAFSR_SDWR);
365 upa_writeq(error_bits, afsr_reg);
366
Grant Likely61c7a082010-04-13 16:12:29 -0700367 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
David S. Miller046e26a2008-08-27 04:54:04 -0700368
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 printk("SYSIO[%x]: Correctable ECC Error, primary error type[%s]\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700370 portid,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 (((error_bits & SYSIO_CEAFSR_PPIO) ?
372 "PIO" :
373 ((error_bits & SYSIO_CEAFSR_PDRD) ?
374 "DVMA Read" :
375 ((error_bits & SYSIO_CEAFSR_PDWR) ?
376 "DVMA Write" : "???")))));
377
378 /* XXX Use syndrome and afar to print out module string just like
379 * XXX UDB CE trap handler does... -DaveM
380 */
381 printk("SYSIO[%x]: DOFF[%lx] ECC Syndrome[%lx] Size[%lx] MID[%lx]\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700382 portid,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700383 (afsr & SYSIO_CEAFSR_DOFF) >> 45UL,
384 (afsr & SYSIO_CEAFSR_ESYND) >> 48UL,
385 (afsr & SYSIO_CEAFSR_SIZE) >> 42UL,
386 (afsr & SYSIO_CEAFSR_MID) >> 37UL);
David S. Miller046e26a2008-08-27 04:54:04 -0700387 printk("SYSIO[%x]: AFAR[%016lx]\n", portid, afar);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388
David S. Miller046e26a2008-08-27 04:54:04 -0700389 printk("SYSIO[%x]: Secondary CE errors [", portid);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390 reported = 0;
391 if (afsr & SYSIO_CEAFSR_SPIO) {
392 reported++;
393 printk("(PIO)");
394 }
395 if (afsr & SYSIO_CEAFSR_SDRD) {
396 reported++;
397 printk("(DVMA Read)");
398 }
399 if (afsr & SYSIO_CEAFSR_SDWR) {
400 reported++;
401 printk("(DVMA Write)");
402 }
403 if (!reported)
404 printk("(none)");
405 printk("]\n");
406
407 return IRQ_HANDLED;
408}
409
410#define SYSIO_SBUS_AFSR 0x2010UL
411#define SYSIO_SBUS_AFAR 0x2018UL
412#define SYSIO_SBAFSR_PLE 0x8000000000000000UL /* Primary Late PIO Error */
413#define SYSIO_SBAFSR_PTO 0x4000000000000000UL /* Primary SBUS Timeout */
414#define SYSIO_SBAFSR_PBERR 0x2000000000000000UL /* Primary SBUS Error ACK */
415#define SYSIO_SBAFSR_SLE 0x1000000000000000UL /* Secondary Late PIO Error */
416#define SYSIO_SBAFSR_STO 0x0800000000000000UL /* Secondary SBUS Timeout */
417#define SYSIO_SBAFSR_SBERR 0x0400000000000000UL /* Secondary SBUS Error ACK */
418#define SYSIO_SBAFSR_RESV1 0x03ff000000000000UL /* Reserved */
419#define SYSIO_SBAFSR_RD 0x0000800000000000UL /* Primary was late PIO read */
420#define SYSIO_SBAFSR_RESV2 0x0000600000000000UL /* Reserved */
421#define SYSIO_SBAFSR_SIZE 0x00001c0000000000UL /* Size of transfer */
422#define SYSIO_SBAFSR_MID 0x000003e000000000UL /* MID causing the error */
423#define SYSIO_SBAFSR_RESV3 0x0000001fffffffffUL /* Reserved */
Al Viro6d24c8d2006-10-08 08:23:28 -0400424static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425{
Grant Likelycd4cd732010-07-22 16:04:30 -0600426 struct platform_device *op = dev_id;
David S. Miller046e26a2008-08-27 04:54:04 -0700427 struct iommu *iommu = op->dev.archdata.iommu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428 unsigned long afsr_reg, afar_reg, reg_base;
429 unsigned long afsr, afar, error_bits;
David S. Miller046e26a2008-08-27 04:54:04 -0700430 int reported, portid;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431
David S. Miller3e4d2652007-04-25 15:58:22 -0700432 reg_base = iommu->write_complete_reg - 0x2000UL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433 afsr_reg = reg_base + SYSIO_SBUS_AFSR;
434 afar_reg = reg_base + SYSIO_SBUS_AFAR;
435
436 afsr = upa_readq(afsr_reg);
437 afar = upa_readq(afar_reg);
438
439 /* Clear primary/secondary error status bits. */
440 error_bits = afsr &
441 (SYSIO_SBAFSR_PLE | SYSIO_SBAFSR_PTO | SYSIO_SBAFSR_PBERR |
442 SYSIO_SBAFSR_SLE | SYSIO_SBAFSR_STO | SYSIO_SBAFSR_SBERR);
443 upa_writeq(error_bits, afsr_reg);
444
Grant Likely61c7a082010-04-13 16:12:29 -0700445 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
David S. Miller046e26a2008-08-27 04:54:04 -0700446
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 /* Log the error. */
448 printk("SYSIO[%x]: SBUS Error, primary error type[%s] read(%d)\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700449 portid,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450 (((error_bits & SYSIO_SBAFSR_PLE) ?
451 "Late PIO Error" :
452 ((error_bits & SYSIO_SBAFSR_PTO) ?
453 "Time Out" :
454 ((error_bits & SYSIO_SBAFSR_PBERR) ?
455 "Error Ack" : "???")))),
456 (afsr & SYSIO_SBAFSR_RD) ? 1 : 0);
457 printk("SYSIO[%x]: size[%lx] MID[%lx]\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700458 portid,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459 (afsr & SYSIO_SBAFSR_SIZE) >> 42UL,
460 (afsr & SYSIO_SBAFSR_MID) >> 37UL);
David S. Miller046e26a2008-08-27 04:54:04 -0700461 printk("SYSIO[%x]: AFAR[%016lx]\n", portid, afar);
462 printk("SYSIO[%x]: Secondary SBUS errors [", portid);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 reported = 0;
464 if (afsr & SYSIO_SBAFSR_SLE) {
465 reported++;
466 printk("(Late PIO Error)");
467 }
468 if (afsr & SYSIO_SBAFSR_STO) {
469 reported++;
470 printk("(Time Out)");
471 }
472 if (afsr & SYSIO_SBAFSR_SBERR) {
473 reported++;
474 printk("(Error Ack)");
475 }
476 if (!reported)
477 printk("(none)");
478 printk("]\n");
479
480 /* XXX check iommu/strbuf for further error status XXX */
481
482 return IRQ_HANDLED;
483}
484
485#define ECC_CONTROL 0x0020UL
486#define SYSIO_ECNTRL_ECCEN 0x8000000000000000UL /* Enable ECC Checking */
487#define SYSIO_ECNTRL_UEEN 0x4000000000000000UL /* Enable UE Interrupts */
488#define SYSIO_ECNTRL_CEEN 0x2000000000000000UL /* Enable CE Interrupts */
489
490#define SYSIO_UE_INO 0x34
491#define SYSIO_CE_INO 0x35
492#define SYSIO_SBUSERR_INO 0x36
493
Grant Likelycd4cd732010-07-22 16:04:30 -0600494static void __init sysio_register_error_handlers(struct platform_device *op)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495{
David S. Miller046e26a2008-08-27 04:54:04 -0700496 struct iommu *iommu = op->dev.archdata.iommu;
David S. Miller3e4d2652007-04-25 15:58:22 -0700497 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498 unsigned int irq;
499 u64 control;
David S. Miller046e26a2008-08-27 04:54:04 -0700500 int portid;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501
Grant Likely61c7a082010-04-13 16:12:29 -0700502 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
David S. Miller046e26a2008-08-27 04:54:04 -0700503
504 irq = sbus_build_irq(op, SYSIO_UE_INO);
David S. Miller96a496f2007-05-07 23:08:39 -0700505 if (request_irq(irq, sysio_ue_handler, 0,
David S. Miller046e26a2008-08-27 04:54:04 -0700506 "SYSIO_UE", op) < 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507 prom_printf("SYSIO[%x]: Cannot register UE interrupt.\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700508 portid);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509 prom_halt();
510 }
511
David S. Miller046e26a2008-08-27 04:54:04 -0700512 irq = sbus_build_irq(op, SYSIO_CE_INO);
David S. Miller96a496f2007-05-07 23:08:39 -0700513 if (request_irq(irq, sysio_ce_handler, 0,
David S. Miller046e26a2008-08-27 04:54:04 -0700514 "SYSIO_CE", op) < 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700515 prom_printf("SYSIO[%x]: Cannot register CE interrupt.\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700516 portid);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517 prom_halt();
518 }
519
David S. Miller046e26a2008-08-27 04:54:04 -0700520 irq = sbus_build_irq(op, SYSIO_SBUSERR_INO);
David S. Miller96a496f2007-05-07 23:08:39 -0700521 if (request_irq(irq, sysio_sbus_error_handler, 0,
David S. Miller046e26a2008-08-27 04:54:04 -0700522 "SYSIO_SBERR", op) < 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 prom_printf("SYSIO[%x]: Cannot register SBUS Error interrupt.\n",
David S. Miller046e26a2008-08-27 04:54:04 -0700524 portid);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 prom_halt();
526 }
527
528 /* Now turn the error interrupts on and also enable ECC checking. */
529 upa_writeq((SYSIO_ECNTRL_ECCEN |
530 SYSIO_ECNTRL_UEEN |
531 SYSIO_ECNTRL_CEEN),
532 reg_base + ECC_CONTROL);
533
David S. Miller3e4d2652007-04-25 15:58:22 -0700534 control = upa_readq(iommu->write_complete_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 control |= 0x100UL; /* SBUS Error Interrupt Enable */
David S. Miller3e4d2652007-04-25 15:58:22 -0700536 upa_writeq(control, iommu->write_complete_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537}
538
539/* Boot time initialization. */
Grant Likelycd4cd732010-07-22 16:04:30 -0600540static void __init sbus_iommu_init(struct platform_device *op)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541{
Stephen Rothwell6a23acf2007-04-23 15:53:27 -0700542 const struct linux_prom64_registers *pr;
Grant Likely61c7a082010-04-13 16:12:29 -0700543 struct device_node *dp = op->dev.of_node;
David S. Miller3e4d2652007-04-25 15:58:22 -0700544 struct iommu *iommu;
545 struct strbuf *strbuf;
546 unsigned long regs, reg_base;
David S. Miller046e26a2008-08-27 04:54:04 -0700547 int i, portid;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548 u64 control;
David S. Miller25c75812006-06-22 20:21:22 -0700549
550 pr = of_get_property(dp, "reg", NULL);
551 if (!pr) {
David S. Millerad7ad572007-07-27 22:39:14 -0700552 prom_printf("sbus_iommu_init: Cannot map SYSIO "
553 "control registers.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554 prom_halt();
555 }
David S. Miller25c75812006-06-22 20:21:22 -0700556 regs = pr->phys_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700557
David S. Millerad7ad572007-07-27 22:39:14 -0700558 iommu = kzalloc(sizeof(*iommu), GFP_ATOMIC);
David S. Millerad7ad572007-07-27 22:39:14 -0700559 strbuf = kzalloc(sizeof(*strbuf), GFP_ATOMIC);
Cong Ding04cef492013-01-17 03:28:43 +0000560 if (!iommu || !strbuf)
David S. Millerad7ad572007-07-27 22:39:14 -0700561 goto fatal_memory_error;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562
David S. Miller046e26a2008-08-27 04:54:04 -0700563 op->dev.archdata.iommu = iommu;
564 op->dev.archdata.stc = strbuf;
Anshuman Khandual98fa15f2019-03-05 15:42:58 -0800565 op->dev.archdata.numa_node = NUMA_NO_NODE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566
David S. Miller3e4d2652007-04-25 15:58:22 -0700567 reg_base = regs + SYSIO_IOMMUREG_BASE;
568 iommu->iommu_control = reg_base + IOMMU_CONTROL;
569 iommu->iommu_tsbbase = reg_base + IOMMU_TSBBASE;
570 iommu->iommu_flush = reg_base + IOMMU_FLUSH;
David S. Millerad7ad572007-07-27 22:39:14 -0700571 iommu->iommu_tags = iommu->iommu_control +
572 (IOMMU_TAGDIAG - IOMMU_CONTROL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700573
David S. Miller3e4d2652007-04-25 15:58:22 -0700574 reg_base = regs + SYSIO_STRBUFREG_BASE;
575 strbuf->strbuf_control = reg_base + STRBUF_CONTROL;
576 strbuf->strbuf_pflush = reg_base + STRBUF_PFLUSH;
577 strbuf->strbuf_fsync = reg_base + STRBUF_FSYNC;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700578
David S. Miller3e4d2652007-04-25 15:58:22 -0700579 strbuf->strbuf_enabled = 1;
580
581 strbuf->strbuf_flushflag = (volatile unsigned long *)
582 ((((unsigned long)&strbuf->__flushflag_buf[0])
583 + 63UL)
584 & ~63UL);
585 strbuf->strbuf_flushflag_pa = (unsigned long)
586 __pa(strbuf->strbuf_flushflag);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587
588 /* The SYSIO SBUS control register is used for dummy reads
589 * in order to ensure write completion.
590 */
David S. Miller3e4d2652007-04-25 15:58:22 -0700591 iommu->write_complete_reg = regs + 0x2000UL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592
Grant Likely61c7a082010-04-13 16:12:29 -0700593 portid = of_getintprop_default(op->dev.of_node, "portid", -1);
David S. Miller046e26a2008-08-27 04:54:04 -0700594 printk(KERN_INFO "SYSIO: UPA portID %x, at %016lx\n",
595 portid, regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596
597 /* Setup for TSB_SIZE=7, TBW_SIZE=0, MMU_DE=1, MMU_EN=1 */
David S. Millerc1b1a5f12008-03-19 04:52:48 -0700598 if (iommu_table_init(iommu, IO_TSB_SIZE, MAP_BASE, 0xffffffff, -1))
David S. Millerad7ad572007-07-27 22:39:14 -0700599 goto fatal_memory_error;
David S. Miller2f3a2ef2007-04-11 21:38:45 -0700600
David S. Miller3e4d2652007-04-25 15:58:22 -0700601 control = upa_readq(iommu->iommu_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 control = ((7UL << 16UL) |
603 (0UL << 2UL) |
604 (1UL << 1UL) |
605 (1UL << 0UL));
David S. Miller3e4d2652007-04-25 15:58:22 -0700606 upa_writeq(control, iommu->iommu_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607
608 /* Clean out any cruft in the IOMMU using
609 * diagnostic accesses.
610 */
611 for (i = 0; i < 16; i++) {
David S. Miller3e4d2652007-04-25 15:58:22 -0700612 unsigned long dram, tag;
613
614 dram = iommu->iommu_control + (IOMMU_DRAMDIAG - IOMMU_CONTROL);
615 tag = iommu->iommu_control + (IOMMU_TAGDIAG - IOMMU_CONTROL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616
617 dram += (unsigned long)i * 8UL;
618 tag += (unsigned long)i * 8UL;
619 upa_writeq(0, dram);
620 upa_writeq(0, tag);
621 }
David S. Miller3e4d2652007-04-25 15:58:22 -0700622 upa_readq(iommu->write_complete_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623
624 /* Give the TSB to SYSIO. */
David S. Miller3e4d2652007-04-25 15:58:22 -0700625 upa_writeq(__pa(iommu->page_table), iommu->iommu_tsbbase);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626
627 /* Setup streaming buffer, DE=1 SB_EN=1 */
628 control = (1UL << 1UL) | (1UL << 0UL);
David S. Miller3e4d2652007-04-25 15:58:22 -0700629 upa_writeq(control, strbuf->strbuf_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630
631 /* Clear out the tags using diagnostics. */
632 for (i = 0; i < 16; i++) {
633 unsigned long ptag, ltag;
634
David S. Miller3e4d2652007-04-25 15:58:22 -0700635 ptag = strbuf->strbuf_control +
636 (STRBUF_PTAGDIAG - STRBUF_CONTROL);
637 ltag = strbuf->strbuf_control +
638 (STRBUF_LTAGDIAG - STRBUF_CONTROL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639 ptag += (unsigned long)i * 8UL;
640 ltag += (unsigned long)i * 8UL;
641
642 upa_writeq(0UL, ptag);
643 upa_writeq(0UL, ltag);
644 }
645
646 /* Enable DVMA arbitration for all devices/slots. */
David S. Miller3e4d2652007-04-25 15:58:22 -0700647 control = upa_readq(iommu->write_complete_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648 control |= 0x3fUL;
David S. Miller3e4d2652007-04-25 15:58:22 -0700649 upa_writeq(control, iommu->write_complete_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650
651 /* Now some Xfire specific grot... */
652 if (this_is_starfire)
David S. Miller046e26a2008-08-27 04:54:04 -0700653 starfire_hookup(portid);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654
David S. Miller046e26a2008-08-27 04:54:04 -0700655 sysio_register_error_handlers(op);
David S. Millerad7ad572007-07-27 22:39:14 -0700656 return;
657
658fatal_memory_error:
Cong Ding04cef492013-01-17 03:28:43 +0000659 kfree(iommu);
660 kfree(strbuf);
David S. Millerad7ad572007-07-27 22:39:14 -0700661 prom_printf("sbus_iommu_init: Fatal memory allocation error.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662}
David S. Miller8fae0972006-06-20 15:23:28 -0700663
David S. Miller046e26a2008-08-27 04:54:04 -0700664static int __init sbus_init(void)
David S. Miller576c3522006-06-23 15:55:45 -0700665{
David S. Miller046e26a2008-08-27 04:54:04 -0700666 struct device_node *dp;
667
668 for_each_node_by_name(dp, "sbus") {
Grant Likelycd4cd732010-07-22 16:04:30 -0600669 struct platform_device *op = of_find_device_by_node(dp);
David S. Miller046e26a2008-08-27 04:54:04 -0700670
671 sbus_iommu_init(op);
672 of_propagate_archdata(op);
673 }
David S. Miller576c3522006-06-23 15:55:45 -0700674
David S. Miller046e26a2008-08-27 04:54:04 -0700675 return 0;
David S. Miller576c3522006-06-23 15:55:45 -0700676}
David S. Miller046e26a2008-08-27 04:54:04 -0700677
678subsys_initcall(sbus_init);